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| author | Matthew Raybuck <matthew.raybuck@ibm.com> | 2019-04-05 08:57:50 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2019-04-30 09:37:07 -0500 |
| commit | f177dd883e86aef80c75e40de11adc43e304e014 (patch) | |
| tree | c4046533e2ee040a4f0b29d8adf544cf3be3fc30 /src/usr/hwas/common/hwas.C | |
| parent | 6fbd4f33e00e69a97a97a77c8e5185795b6662f7 (diff) | |
| download | talos-hostboot-f177dd883e86aef80c75e40de11adc43e304e014.tar.gz talos-hostboot-f177dd883e86aef80c75e40de11adc43e304e014.zip | |
Collect IDEC for Explorer chip
The OCMB Explorer Chip doesn't read for IDEC but instead assumes hardcoded
values. Since the Explorer chip is held in reset until iStep 10.4, this
commit will prevent IDEC reads during discoverTargets and instead
perform the read when exp_check_for_ready() is successful.
Change-Id: I4ef5a01badb195acca0c2187ef76ea55f58eafe4
RTC:201996
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75881
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/usr/hwas/common/hwas.C')
| -rw-r--r-- | src/usr/hwas/common/hwas.C | 25 |
1 files changed, 15 insertions, 10 deletions
diff --git a/src/usr/hwas/common/hwas.C b/src/usr/hwas/common/hwas.C index 45a88cf85..569061814 100644 --- a/src/usr/hwas/common/hwas.C +++ b/src/usr/hwas/common/hwas.C @@ -728,19 +728,23 @@ errlHndl_t discoverTargets() MOD_DISCOVER_TARGETS, RC_PARTIAL_GOOD_INFORMATION); - if( (pTarget->getAttr<ATTR_CLASS>() == CLASS_CHIP) && - (l_targetType != TYPE_TPM) && - (l_targetType != TYPE_SP) && - (l_targetType != TYPE_BMC) && - (l_targetType != TYPE_I2C_MUX)) + if( (pTarget->getAttr<ATTR_CLASS>() == CLASS_CHIP) + && (l_targetType != TYPE_TPM) + && (l_targetType != TYPE_SP) + && (l_targetType != TYPE_BMC) + && (l_targetType != TYPE_I2C_MUX) + && (l_targetType != TYPE_OCMB_CHIP)) { // read Chip ID/EC data from these physical chips errl = platReadIDEC(pTarget); if (errl) - { // read of ID/EC failed even tho we THOUGHT we were present. - HWAS_INF("pTarget %.8X - read IDEC failed (eid 0x%X) - bad", - errl->eid(), pTarget->getAttr<ATTR_HUID>()); + { + // read of ID/EC failed even tho we THOUGHT we were present. + HWAS_INF("pTarget 0x%.8X - read IDEC failed " + "(eid 0x%X) - bad", + get_huid(pTarget), errl->eid()); + // chip NOT present and NOT functional, so that FSP doesn't // include this for HB to process chipPresent = false; @@ -758,8 +762,9 @@ errlHndl_t discoverTargets() if (errl) { // read of PG failed even tho we were present.. - HWAS_INF("pTarget %.8X - read PG failed (eid 0x%X)- bad", - errl->eid(), pTarget->getAttr<ATTR_HUID>()); + HWAS_INF("pTarget 0x%.8X - read PG failed " + "(eid 0x%X) - bad", + get_huid(pTarget), errl->eid()); chipFunctional = false; errlEid = errl->eid(); |
