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author | Christian Geddes <crgeddes@us.ibm.com> | 2018-08-21 15:15:25 -0500 |
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committer | William G. Hoffa <wghoffa@us.ibm.com> | 2018-09-05 07:50:51 -0500 |
commit | e82098f4237a0f0fd6c00dc206b581d4d0d0156f (patch) | |
tree | 7c6d995113491360f4414e9826d1ee05abca24f6 /src/usr/hwas/common/hwas.C | |
parent | 2c8610bff34febfdfeb97fba484a75983141a8b3 (diff) | |
download | talos-hostboot-e82098f4237a0f0fd6c00dc206b581d4d0d0156f.tar.gz talos-hostboot-e82098f4237a0f0fd6c00dc206b581d4d0d0156f.zip |
Update PG detection for new Axone memory targets
Add support for presence detection of new OMI, OMIC, and MCC targets.
Detection is done by looking at the MC01, and MC23 PG data.
Change-Id: I2706bb28f64df653546ce22451e690507be09d8e
RTC: 197541
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64966
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Diffstat (limited to 'src/usr/hwas/common/hwas.C')
-rw-r--r-- | src/usr/hwas/common/hwas.C | 45 |
1 files changed, 34 insertions, 11 deletions
diff --git a/src/usr/hwas/common/hwas.C b/src/usr/hwas/common/hwas.C index 0f5a20f1d..851ad897e 100644 --- a/src/usr/hwas/common/hwas.C +++ b/src/usr/hwas/common/hwas.C @@ -1422,35 +1422,58 @@ bool isDescFunctional(const TARGETING::TargetHandle_t &i_desc, l_descFunctional = false; } } - else // MC/MI/DMI is found on Cumulus chips + // MC/MI/DMI is found on Cumulus chips + else // MC/MI/MCC/OMI/OMIC is found on Axone chips if ((i_desc->getAttr<ATTR_TYPE>() == TYPE_MC) || (i_desc->getAttr<ATTR_TYPE>() == TYPE_MI) || - (i_desc->getAttr<ATTR_TYPE>() == TYPE_DMI)) + (i_desc->getAttr<ATTR_TYPE>() == TYPE_DMI) || + (i_desc->getAttr<ATTR_TYPE>() == TYPE_MCC) || + (i_desc->getAttr<ATTR_TYPE>() == TYPE_OMIC) || + (i_desc->getAttr<ATTR_TYPE>() == TYPE_OMI)) { ATTR_CHIP_UNIT_type index = i_desc->getAttr<ATTR_CHIP_UNIT>(); + // ** Cumulus ** // 2 MCs/chip, 2 MIs/MC, 2 DMIs/MI + // ** Axone ** + // 2 MCs/chip, 2 MIs/MC, 2 MCCs/MI, 2 OMIs/MCC + // 3 OMICs/MC size_t indexMC = 0; - size_t indexMI = 0; if (i_desc->getAttr<ATTR_TYPE>() == TYPE_MC) { - indexMC = index; - indexMI = index * 2; + indexMC = index; } else if (i_desc->getAttr<ATTR_TYPE>() == TYPE_MI) { - indexMI = index; - indexMC = index / 2; + indexMC = index / 2; } else if (i_desc->getAttr<ATTR_TYPE>() == TYPE_DMI) { - indexMI = index / 2; indexMC = index / 4; } + else + if (i_desc->getAttr<ATTR_TYPE>() == TYPE_MCC) + { + indexMC = index / 4; + } + else + if (i_desc->getAttr<ATTR_TYPE>() == TYPE_OMIC) + { + indexMC = index / 3; + } + else + if (i_desc->getAttr<ATTR_TYPE>() == TYPE_OMI) + { + indexMC = index / 8; + } + + // if indexMC == 1 , then use MC23 PG Index + // if indexMC == 0 , then use MC01 PG Index + size_t mcPgIndex = indexMC ? VPD_CP00_PG_MC23_INDEX : VPD_CP00_PG_MC01_INDEX; // Check MCS01 bit in N3 entry if first MC if ((0 == indexMC) && @@ -1483,14 +1506,14 @@ bool isDescFunctional(const TARGETING::TargetHandle_t &i_desc, } else // Check bits in MCxx entry except those in partial good region - if (i_pgData[VPD_CP00_PG_MCxx_INDEX[indexMI]] != + if (i_pgData[mcPgIndex] != VPD_CP00_PG_MCxx_GOOD) { HWAS_INF("pDesc %.8X - MC%d pgData[%d]: " "actual 0x%04X, expected 0x%04X - bad", i_desc->getAttr<ATTR_HUID>(), indexMC, - VPD_CP00_PG_MCxx_INDEX[indexMI], - i_pgData[VPD_CP00_PG_MCxx_INDEX[indexMI]], + mcPgIndex, + i_pgData[mcPgIndex], VPD_CP00_PG_MCxx_GOOD); l_descFunctional = false; } |