diff options
author | Sheldon Bailey <baileysh@us.ibm.com> | 2017-03-15 12:49:16 -0500 |
---|---|---|
committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-03-30 18:12:27 -0400 |
commit | a36424c41b711c1361db33a9f2e2db2788fd91a9 (patch) | |
tree | 817460f02e04337ec4422bea172569a789169a83 /src/usr/htmgt/htmgt_occ.C | |
parent | 1fa7778144abe8e64ad6ae4109be9689422442ad (diff) | |
download | talos-hostboot-a36424c41b711c1361db33a9f2e2db2788fd91a9.tar.gz talos-hostboot-a36424c41b711c1361db33a9f2e2db2788fd91a9.zip |
HTMGT: Push2 BringUp changes needed to get HTMGT to work.
Thermal Control CMD data enhancments.
AVS Bus Data enhancments.
OCC checkpoint fix.
Change-Id: Iaefe4a2a7cfd8408aefeafe818245524be84c253
RTC:170737
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38370
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/usr/htmgt/htmgt_occ.C')
-rw-r--r-- | src/usr/htmgt/htmgt_occ.C | 33 |
1 files changed, 16 insertions, 17 deletions
diff --git a/src/usr/htmgt/htmgt_occ.C b/src/usr/htmgt/htmgt_occ.C index 6949eec49..f53b6fccb 100644 --- a/src/usr/htmgt/htmgt_occ.C +++ b/src/usr/htmgt/htmgt_occ.C @@ -41,7 +41,7 @@ #include <occ/occ.H> #include <occ/occ_common.H> #include <errl/errludlogregister.H> -#include <buffer.H> +#include <fapi2.H> #include <isteps/pm/pm_common_ext.H> @@ -1016,24 +1016,25 @@ namespace HTMGT { nanosleep(0, NS_BETWEEN_READ); + TARGETING::ConstTargetHandle_t procTarget = + TARGETING::getParentChip(occ->getTarget() ); + // Read SRAM response buffer to check for OCC checkpoint errlHndl_t l_err = nullptr; - const uint16_t l_length = 8; - - fapi2::buffer<uint64_t> l_buffer; - l_err = HBOCC::readSRAM(occ->getTarget(), + const uint16_t l_length = 8; //Note: number of bytes + uint8_t l_sram_data[l_length] = { 0x0 }; + l_err = HBOCC::readSRAM(procTarget, OCC_RSP_SRAM_ADDR, - l_buffer.pointer(), + (uint64_t*)(&(l_sram_data)), l_length); if (nullptr == l_err) { // Pull status from response (byte 2) - uint8_t status = 0; - l_buffer.extractToRight<16, 8>(status); + uint8_t status = l_sram_data[2]; + // Pull checkpoint from response (byte 6-7) - uint16_t checkpoint = 0; - l_buffer.extractToRight<48,16>(checkpoint); + uint16_t checkpoint= l_sram_data[6]<<8 | l_sram_data[7]; if (checkpoint != lastCheckpoint) { @@ -1051,14 +1052,12 @@ namespace HTMGT occReady = true; break; } - if( ( ( checkpoint & OCC_INIT_FAILURE ) == - OCC_INIT_FAILURE ) || - ( status != OCC_RC_OCC_INIT_CHECKPOINT ) ) + if( ((checkpoint & OCC_INIT_FAILURE ) == + OCC_INIT_FAILURE ) || + ( status == OCC_RC_INIT_FAILURE ) ) { - - TMGT_ERR("_waitForOccCheckpoint: Final checkpoint " - "not reached byt OCC%d stopped " - "(0x%02X, 0x%04X)", + TMGT_ERR("_waitForOccCheckpoint: OCC%d failed " + "during initialization (0x%02X, 0x%04X)", occ->getInstance(), status, checkpoint ); |