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authornagurram-in <nagendra.g@in.ibm.com>2017-08-08 09:30:56 -0500
committerDaniel M. Crowell <dcrowell@us.ibm.com>2017-08-22 14:09:09 -0400
commite41fb18f82b08bcefc0635e97fbf0771aab3c615 (patch)
tree380cfd60a2daf2bf090151b7534748ca8ae53c1c /src/usr/hdat
parent296e030c007d1d747462b2fbece221c070cc6628 (diff)
downloadtalos-hostboot-e41fb18f82b08bcefc0635e97fbf0771aab3c615.tar.gz
talos-hostboot-e41fb18f82b08bcefc0635e97fbf0771aab3c615.zip
EC level array support added in 10.4t HDAT spec in SPPCRD struct
Change-Id: If0e348b064bf2e378fcab03e791dd53c520dc5c2 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44343 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: VENKATESH SAINATH <venkatesh.sainath@in.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/usr/hdat')
-rwxr-xr-xsrc/usr/hdat/hdatmsarea.C22
-rwxr-xr-xsrc/usr/hdat/hdatmsarea.H11
-rw-r--r--src/usr/hdat/hdatpcrd.C57
-rw-r--r--src/usr/hdat/hdatpcrd.H7
-rwxr-xr-xsrc/usr/hdat/hdatutil.H11
5 files changed, 83 insertions, 25 deletions
diff --git a/src/usr/hdat/hdatmsarea.C b/src/usr/hdat/hdatmsarea.C
index a4566e857..78c3633e8 100755
--- a/src/usr/hdat/hdatmsarea.C
+++ b/src/usr/hdat/hdatmsarea.C
@@ -130,8 +130,8 @@ HdatMsArea::HdatMsArea(errlHndl_t &o_errlHndl,
iv_ecArrayHdr.hdatOffset = sizeof(hdatHDIFDataArray_t);
iv_ecArrayHdr.hdatArrayCnt = 0;
- iv_ecArrayHdr.hdatAllocSize = sizeof(hdatMsAreaEcLvl_t);
- iv_ecArrayHdr.hdatActSize = sizeof(hdatMsAreaEcLvl_t);
+ iv_ecArrayHdr.hdatAllocSize = sizeof(hdatEcLvl_t);
+ iv_ecArrayHdr.hdatActSize = sizeof(hdatEcLvl_t);
l_slcaIdx = i_slcaIdx;
@@ -182,7 +182,7 @@ HdatMsArea::HdatMsArea(errlHndl_t &o_errlHndl,
if (NULL == o_errlHndl)
{
iv_fru.hdatSlcaIdx = l_slcaIdx;
- iv_ecLvl = new hdatMsAreaEcLvl_t[iv_maxEcCnt];
+ iv_ecLvl = new hdatEcLvl_t[iv_maxEcCnt];
}
// Allocate space for the RAM entries
if (NULL == o_errlHndl)
@@ -365,13 +365,13 @@ errlHndl_t HdatMsArea::addEcEntry(uint32_t i_manfId,
{
HDAT_ENTER();
errlHndl_t l_errlHndl = NULL;
- hdatMsAreaEcLvl_t *l_ec;
+ hdatEcLvl_t *l_ec;
if (iv_ecArrayHdr.hdatArrayCnt < iv_maxEcCnt)
{
- l_ec = reinterpret_cast<hdatMsAreaEcLvl_t*>(reinterpret_cast<char*>
- (iv_ecLvl) + iv_ecArrayHdr.hdatArrayCnt * sizeof(hdatMsAreaEcLvl_t));
+ l_ec = reinterpret_cast<hdatEcLvl_t*>(reinterpret_cast<char*>
+ (iv_ecLvl) + iv_ecArrayHdr.hdatArrayCnt * sizeof(hdatEcLvl_t));
l_ec->hdatChipManfId = i_manfId;
l_ec->hdatChipEcLvl = i_ecLvl;
iv_ecArrayHdr.hdatArrayCnt++;
@@ -522,7 +522,7 @@ void HdatMsArea::finalizeObjSize()
this->addData(HDAT_MS_AREA_AFF, sizeof(hdatMsAreaAffinity_t));
this->addData(HDAT_MS_AREA_EC_ARRAY, sizeof(hdatHDIFDataArray_t) +
- iv_maxEcCnt * sizeof(hdatMsAreaEcLvl_t));
+ iv_maxEcCnt * sizeof(hdatEcLvl_t));
this->addData(HDAT_MS_AREA_HOST_I2C, iv_msaHostI2cSize);
this->align();
@@ -587,7 +587,7 @@ uint32_t HdatMsArea::getMsAreaSize()
l_size += sizeof(hdatHDIFDataArray_t);
- l_size += (iv_maxEcCnt * sizeof(hdatMsAreaEcLvl_t));
+ l_size += (iv_maxEcCnt * sizeof(hdatEcLvl_t));
l_size += sizeof(iv_msaI2cHdr);
@@ -652,7 +652,7 @@ void HdatMsArea::commit(UtilMem &i_data)
i_data.write(&iv_ecArrayHdr, sizeof(hdatHDIFDataArray_t));
- i_data.write(iv_ecLvl,iv_maxEcCnt * sizeof(hdatMsAreaEcLvl_t));
+ i_data.write(iv_ecLvl,iv_maxEcCnt * sizeof(hdatEcLvl_t));
i_data.write(&iv_msaI2cHdr, sizeof(iv_msaI2cHdr));
@@ -695,7 +695,7 @@ void HdatMsArea::commitRamAreas(UtilMem &i_data)
void HdatMsArea::prt()
{
uint32_t l_cnt;
- hdatMsAreaEcLvl_t *l_ec;
+ hdatEcLvl_t *l_ec;
hdatMsAreaAddrRange_t *l_addr;
HdatRam *l_ramObj;
@@ -746,7 +746,7 @@ void HdatMsArea::prt()
HDAT_INF(" hdatMsAreaModuleId = %u", iv_aff.hdatMsAreaModuleId);
HDAT_INF(" hdatMsAffinityDomain = %u", iv_aff.hdatMsAffinityDomain);
- HDAT_INF(" **hdatMsAreaEcLvl_t**");
+ HDAT_INF(" **hdatEcLvl_t**");
hdatPrintHdrs(NULL, NULL, &iv_ecArrayHdr, NULL);
l_ec = iv_ecLvl;
for (l_cnt = 0; l_cnt < iv_ecArrayHdr.hdatArrayCnt; l_cnt++)
diff --git a/src/usr/hdat/hdatmsarea.H b/src/usr/hdat/hdatmsarea.H
index c80c03677..f39ad3737 100755
--- a/src/usr/hdat/hdatmsarea.H
+++ b/src/usr/hdat/hdatmsarea.H
@@ -151,15 +151,6 @@ struct hdatMsAreaAffinity_t
} __attribute__ ((packed));
-/** @brief Structure definition for an entry in the chip's engineering change
- * level array
- */
-struct hdatMsAreaEcLvl_t
-{
- uint32_t hdatChipManfId; // 0x0000 Memory interface chip manufacturing id
- uint32_t hdatChipEcLvl; // 0x0004 Memory interface chip EC level
-} __attribute__ ((packed));
-
/*----------------------------------------------------------------------------*/
/* Constants */
/*----------------------------------------------------------------------------*/
@@ -617,7 +608,7 @@ private:
hdatMsAreaAddrRange_t *iv_addrRange;
hdatMsAreaAffinity_t iv_aff;
hdatHDIFDataArray_t iv_ecArrayHdr;
- hdatMsAreaEcLvl_t *iv_ecLvl;
+ hdatEcLvl_t *iv_ecLvl;
hdatHDIFVersionedDataArray_t iv_msaI2cHdr;
uint8_t *iv_msaI2cDataPtr;
HdatRam **iv_ramPtrs;
diff --git a/src/usr/hdat/hdatpcrd.C b/src/usr/hdat/hdatpcrd.C
index 29794ad60..9ffe9cff1 100644
--- a/src/usr/hdat/hdatpcrd.C
+++ b/src/usr/hdat/hdatpcrd.C
@@ -133,6 +133,10 @@ static errlHndl_t hdatSetPcrdHdrs(hdatSpPcrd_t *i_pcrd)
i_pcrd->hdatPcrdIntData[HDAT_PCRD_DA_SMP].hdatOffset = 0;
i_pcrd->hdatPcrdIntData[HDAT_PCRD_DA_SMP].hdatSize = 0;
+ i_pcrd->hdatPcrdIntData[HDAT_PCRD_CHIP_EC_LVL].hdatOffset = 0;
+ i_pcrd->hdatPcrdIntData[HDAT_PCRD_CHIP_EC_LVL].hdatSize = 0;
+
+
return l_errlHndl;
}
@@ -510,7 +514,8 @@ errlHndl_t HdatPcrd::hdatLoadPcrd(uint32_t &o_size, uint32_t &o_count)
uint8_t* l_temp = reinterpret_cast<uint8_t *>
(l_hostI2cFullPcrdHdrPtr);
- l_temp += l_pcrdHI2cTotalSize;
+ l_temp += sizeof(*l_hostI2cFullPcrdHdrPtr) + (sizeof(hdatI2cData_t)
+ * HDAT_PCRD_MAX_I2C_DEV);
l_pnor = reinterpret_cast<hdatPcrdPnor_t *>(l_temp);
}
@@ -615,6 +620,50 @@ errlHndl_t HdatPcrd::hdatLoadPcrd(uint32_t &o_size, uint32_t &o_count)
this->iv_spPcrd->hdatHdr.hdatSize +=
sizeof(hdatHDIFDataArray_t) + (sizeof(hdatSMPLinkInfo_t) * HDAT_PCRD_MAX_SMP_LINK);
+
+
+ // Need to populate EC level info
+ // PCRD is only one per chip . Hence the array count of EC level int pntr will be only 1.
+
+ hdatHDIFDataArray_t *l_ECLvlInfoPcrdHdrPtr = NULL;
+ l_ECLvlInfoPcrdHdrPtr = reinterpret_cast<hdatHDIFDataArray_t *>
+ ((uint8_t *)l_SMPInfoFullPcrdHdrPtr + sizeof(hdatHDIFDataArray_t) +
+ (sizeof(hdatSMPLinkInfo_t) * HDAT_PCRD_MAX_SMP_LINK));
+ uint32_t l_pcrdECLvlTotalSize = sizeof(hdatHDIFDataArray_t) +
+ sizeof(hdatEcLvl_t);
+
+
+ l_ECLvlInfoPcrdHdrPtr->hdatOffset = 0x0010; // All array entries start right after header which is of 4 word size
+ l_ECLvlInfoPcrdHdrPtr->hdatArrayCnt = 1;
+ l_ECLvlInfoPcrdHdrPtr->hdatAllocSize =
+ sizeof(hdatEcLvl_t);
+ l_ECLvlInfoPcrdHdrPtr->hdatActSize =
+ sizeof(hdatEcLvl_t);
+
+ uint32_t l_ecLevel = 0;
+ uint32_t l_chipId = 0;
+
+ l_errl = hdatGetIdEc( l_pProcTarget,
+ l_ecLevel,
+ l_chipId);
+ if(l_errl)
+ {
+ HDAT_ERR(" Getting the chip EC and ID value for proc chip with HUID 0X%8x failed",
+ l_pProcTarget->getAttr<ATTR_HUID>());
+ break;
+ }
+ hdatEcLvl_t *l_hdatEcLvl = reinterpret_cast<hdatEcLvl_t *>
+ ((uint8_t *)l_ECLvlInfoPcrdHdrPtr + sizeof(hdatHDIFDataArray_t));
+ l_hdatEcLvl->hdatChipManfId = l_chipId;
+ l_hdatEcLvl->hdatChipEcLvl = l_ecLevel;
+
+
+ this->iv_spPcrd->hdatPcrdIntData[HDAT_PCRD_CHIP_EC_LVL].hdatOffset =
+ this->iv_spPcrd->hdatPcrdIntData[HDAT_PCRD_DA_SMP].hdatOffset + sizeof(hdatHDIFDataArray_t) +
+ (sizeof(hdatSMPLinkInfo_t) * HDAT_PCRD_MAX_SMP_LINK);
+ this->iv_spPcrd->hdatPcrdIntData[HDAT_PCRD_CHIP_EC_LVL].hdatSize = l_pcrdECLvlTotalSize;
+ this->iv_spPcrd->hdatHdr.hdatSize += l_pcrdECLvlTotalSize;
+
if( NULL != l_errl)
{
break;
@@ -678,6 +727,12 @@ errlHndl_t HdatPcrd::hdatSetProcessorInfo(
iv_spPcrd->hdatChipData.hdatPcrdStatusFlags =
isFunctional(i_pProcTarget)? i_procstatus : HDAT_PROC_NOT_USABLE;
+ if(i_pProcTarget->getAttr<ATTR_PROC_MASTER_TYPE>() ==
+ TARGETING::PROC_MASTER_TYPE_ACTING_MASTER)
+ {
+ iv_spPcrd->hdatChipData.hdatPcrdStatusFlags |= HDAT_PROC_IPL_MASTER;
+ }
+
//Set NxFunctional State
iv_spPcrd->hdatChipData.hdatPcrdNxFunctional = 0;
TARGETING::PredicateCTM l_predNx(TARGETING::CLASS_UNIT,
diff --git a/src/usr/hdat/hdatpcrd.H b/src/usr/hdat/hdatpcrd.H
index e8b4f6428..dbef3da6a 100644
--- a/src/usr/hdat/hdatpcrd.H
+++ b/src/usr/hdat/hdatpcrd.H
@@ -59,7 +59,7 @@ const char HDAT_PCRD_STRUCT_NAME[7] = "SPPCRD";
#define HDAT_SW_CHKSTP_FIR_SCOM_BIT_POS 0x1F
//Max number of I2c devices for any given proc
-#define HDAT_PCRD_MAX_I2C_DEV 64
+#define HDAT_PCRD_MAX_I2C_DEV 128
#define HDAT_PCRD_MAX_SMP_LINK 12
/** @enum hdatDataPtrs
@@ -76,8 +76,9 @@ enum hdatPcrdDataPtrs
HDAT_PCRD_DA_HOST_I2C = 5,
HDAT_PCRD_DA_PNOR = 6,
HDAT_PCRD_DA_SMP = 7,
- HDAT_PCRD_DA_CNT = 8,
- HDAT_PCRD_DA_LAST = 9,
+ HDAT_PCRD_CHIP_EC_LVL = 8,
+ HDAT_PCRD_DA_CNT = 9,
+ HDAT_PCRD_DA_LAST = 10,
};
/*----------------------------------------------------------------------------*/
diff --git a/src/usr/hdat/hdatutil.H b/src/usr/hdat/hdatutil.H
index 109921f3a..a509a1feb 100755
--- a/src/usr/hdat/hdatutil.H
+++ b/src/usr/hdat/hdatutil.H
@@ -167,6 +167,17 @@ enum hdatWitherspoonNVCnfg
};
+/** @brief Structure definition for an entry in the chip's engineering change
+ * level array
+ */
+struct hdatEcLvl_t
+{
+ uint32_t hdatChipManfId; // 0x0000 Memory interface chip manufacturing id
+ uint32_t hdatChipEcLvl; // 0x0004 Memory interface chip EC level
+} __attribute__ ((packed));
+
+
+
/**
* @brief Create/Build an Error log and add HADT component trace
* if the log exists then FFDC will be added to the existing log and
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