Collection of testcase updates for FSI and SCOM.

-Updated bbuild to c0131a_1205.760 (released 1205.760 driver)
-Removed writes to MCRSP32 regs from testcase (see Issue 35803)
-Removed access to made-up reg 0x12345 from scom test
-Removed Simics workaround for reg 0x02011403 in scom test
-Updated debug FFDC for FSI errors

Change-Id: I2714d3b179406d35f7e460a6c0629c961083e6df
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/647
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

3 files changed, 55 insertions, 16 deletions

diff --git a/src/usr/fsi/fsidd.C b/src/usr/fsi/fsidd.C
index 4f829df5f..bcb6810fb 100644
--- a/src/usr/fsi/fsidd.C
+++ b/src/usr/fsi/fsidd.C
@@ -56,9 +56,6 @@ TRAC_INIT(&g_trac_fsir, "FSIR", 4096); //4K
 //#define TRACUCOMP(args...)  TRACFCOMP(args)
 #define TRACUCOMP(args...)  
 
-//@fixme - VPO Debug
-bool INSIDE_DEBUG = false;
-
 //@todo - This should come from the target/attribute code somewhere
 uint64_t target_to_uint64(const TARGETING::Target* i_target)
 {
@@ -864,15 +861,54 @@ errlHndl_t FsiDD::handleOpbErrors(const FsiAddrInfo_t& i_addrInfo,
                                             i_addrInfo.absAddr),
                                         TWO_UINT32_TO_UINT64(i_opbStatReg,0));
 
-        if( !INSIDE_DEBUG )
+        // Collect some FFDC but avoid an infinite loop
+        if( !iv_ffdcCollection )
         {
-            INSIDE_DEBUG = true;
+            iv_ffdcCollection = true;
             uint32_t data = 0;
-            read( 0x31D0, &data ); TRACFCOMP( g_trac_fsi, "MESRB0(1D0) = %.8X", data );
-            read( 0x31D4, &data ); TRACFCOMP( g_trac_fsi, "MCSCSB0(1D4) = %.8X", data );
-            read( 0x31D8, &data ); TRACFCOMP( g_trac_fsi, "MATRB0(1D8) = %.8X", data );
-            read( 0x31DC, &data ); TRACFCOMP( g_trac_fsi, "MDTRB0(1DC) = %.8X", data );
-            INSIDE_DEBUG = false;
+            errlHndl_t l_err2 = NULL;
+
+            l_err2 = read( 0x31D0, &data );
+            if( l_err2 )
+            {
+                delete l_err2;
+            }
+            else
+            {
+                TRACFCOMP( g_trac_fsi, "MESRB0(1D0) = %.8X", data );
+            }
+
+            l_err2 = read( 0x31D4, &data );
+            if( l_err2 )
+            {
+                delete l_err2;
+            }
+            else
+            {
+                TRACFCOMP( g_trac_fsi, "MCSCSB0(1D4) = %.8X", data );
+            }
+
+            l_err2 = read( 0x31D8, &data );
+            if( l_err2 )
+            {
+                delete l_err2;
+            }
+            else
+            {
+                TRACFCOMP( g_trac_fsi, "MATRB0(1D8) = %.8X", data );
+            }
+
+            l_err2 = read( 0x31DC, &data );
+            if( l_err2 )
+            {
+                delete l_err2;
+            }
+            else
+            {
+                TRACFCOMP( g_trac_fsi, "MDTRB0(1DC) = %.8X", data );
+            }
+
+            iv_ffdcCollection = false;
         }
 
         l_err->collectTrace("FSI");
diff --git a/src/usr/fsi/fsidd.H b/src/usr/fsi/fsidd.H
index 26cf04966..69060544e 100644
--- a/src/usr/fsi/fsidd.H
+++ b/src/usr/fsi/fsidd.H
@@ -457,6 +457,11 @@ class FsiDD
      */
     TARGETING::Target* iv_master;
 
+    /**
+     * Flag to avoid infinite recursion
+     */
+    bool iv_ffdcCollection;
+
   private:
 
     // let my testcase poke around
diff --git a/src/usr/fsi/test/fsiddtest.H b/src/usr/fsi/test/fsiddtest.H
index 66a7ba6c5..815fabfc1 100644
--- a/src/usr/fsi/test/fsiddtest.H
+++ b/src/usr/fsi/test/fsiddtest.H
@@ -200,10 +200,7 @@ class FsiDDTest : public CxxTest::TestSuite
             // version number
             { PROC0, 0x003074, 0x91010800, false, true }, //CMFSI MVER
             { PROC0, 0x003474, 0x91010800, false, true }, //MFSI MVER
-
-            // clock rate delay for ports 32-63 (unused ports)
-            { PROC0, 0x00340C, 0x11111111, true, true }, //MFSI MCRSP32
-            { PROC0, 0x00300C, 0x22222222, true, true }, //CMFSI MCRSP32
+            //@fixme - should be 0x92010800 but Simics is wrong
 
             //** Slave Regs (cheating)
             { PROC0, 0x080000, 0xC0010EA0, false, false }, //Config Table entry for slave0 off MFSI-0 
@@ -215,7 +212,7 @@ class FsiDDTest : public CxxTest::TestSuite
             { PROCWRAP, 0x000000, 0xC0010EA0, false, false }, //Config Table entry for slave0 off MFSI-0 
             { PROCWRAP, 0x001000, 0x12345678, false, false }, //DATA_0 from FSI2PIB off MFSI-0 
             { PROCWRAP, 0x001004, 0xA5A5A5A5, true, false }, //DATA_1 from FSI2PIB off MFSI-0
-            //@fixme SW106529  { PROCWRAP, 0x001028, 0x120EA049, false, false }, //CHIPID from FSI2PIB off MFSI-0 
+            { PROCWRAP, 0x001028, 0x120EA049, false, false }, //CHIPID from FSI2PIB off MFSI-0 
 
             //** Slave Regs
             { PROC1, 0x001000, 0x88776655, true, false }, //FEL from SHIFT off MFSI-1
@@ -226,7 +223,8 @@ class FsiDDTest : public CxxTest::TestSuite
             { PROC2, 0x001028, 0x120EA049, false, false }, //CHIPID from FSI2PIB off MFSI-2
 
             //** Slave Regs
-            { CENTAUR0, 0x000000, 0xC0010E9C, false, false }, //Config Table entry for slave0 off cMFSI-0 
+            { CENTAUR0, 0x000000, 0xC0010E9C, false, false }, //Config Table entry for slave0 off cMFSI-0
+            //@fixme - should be 0xC0010E95 but Simics is wrong
             { CENTAUR0, 0x001028, 0x160E9049, false, false }, //CHIPID from FSI2PIB off cMFSI-0
             { CENTAUR0, 0x000C08, 0x12344321, true, false }, //FEL from SHIFT off cMFSI-0