diff options
| author | Dan Crowell <dcrowell@us.ibm.com> | 2014-03-08 15:51:02 -0600 |
|---|---|---|
| committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2014-03-21 10:26:12 -0500 |
| commit | 9789508b0d23b4c253588c6f5f88c6ebab2c7ade (patch) | |
| tree | 182beb26daaa8e26ea394a189031c0162864d322 /src/usr/fsi | |
| parent | 46e34007e23485adf58a0b3df32b36c262644133 (diff) | |
| download | talos-hostboot-9789508b0d23b4c253588c6f5f88c6ebab2c7ade.tar.gz talos-hostboot-9789508b0d23b4c253588c6f5f88c6ebab2c7ade.zip | |
Force low-level hardware ops to use delayed deconfig
Some code (PRD) chooses to commit errors from register accesses
immediately and then continue on. If the error ends up
deconfiguring a target that can then lead to even more confusing
results downstream.
Change-Id: I289b43506a6d7c9d18d4ac6792fffbfc733daea6
CQ: SW250177
Backport: release-fips810
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/9415
Tested-by: Jenkins Server
Reviewed-by: Michael Baiocchi <baiocchi@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/fsi')
| -rw-r--r-- | src/usr/fsi/fsidd.C | 31 | ||||
| -rw-r--r-- | src/usr/fsi/fsipres.C | 8 |
2 files changed, 23 insertions, 16 deletions
diff --git a/src/usr/fsi/fsidd.C b/src/usr/fsi/fsidd.C index 1b8a795ed..30a611d64 100644 --- a/src/usr/fsi/fsidd.C +++ b/src/usr/fsi/fsidd.C @@ -110,7 +110,8 @@ errlHndl_t ddOp(DeviceFW::OperationType i_opType, FSI::MOD_FSIDD_DDOP, FSI::RC_INVALID_LENGTH, i_addr, - TO_UINT64(io_buflen)); + TO_UINT64(io_buflen), + true /*SW error*/); l_err->collectTrace(FSI_COMP_NAME); break; } @@ -134,7 +135,8 @@ errlHndl_t ddOp(DeviceFW::OperationType i_opType, FSI::MOD_FSIDD_DDOP, FSI::RC_NULL_TARGET, i_addr, - TO_UINT64(i_opType)); + TO_UINT64(i_opType), + true /*SW error*/); l_err->collectTrace(FSI_COMP_NAME); break; } @@ -154,7 +156,8 @@ errlHndl_t ddOp(DeviceFW::OperationType i_opType, FSI::MOD_FSIDD_DDOP, FSI::RC_MASTER_TARGET, i_addr, - TO_UINT64(i_opType)); + TO_UINT64(i_opType), + true /*SW error*/); l_err->collectTrace(FSI_COMP_NAME); break; } @@ -198,7 +201,8 @@ errlHndl_t ddOp(DeviceFW::OperationType i_opType, FSI::MOD_FSIDD_DDOP, FSI::RC_INVALID_OPERATION, i_addr, - TO_UINT64(i_opType)); + TO_UINT64(i_opType), + true /*SW error*/); l_err->collectTrace(FSI_COMP_NAME); break; } @@ -1261,7 +1265,7 @@ errlHndl_t FsiDD::handleOpbErrors(FsiAddrInfo_t& i_addrInfo, TRACFCOMP( g_trac_fsi, "Parity Error in MESRB0 = %.8X", mesrb0_data ); l_err->addHwCallout( i_addrInfo.accessInfo.master, HWAS::SRCI_PRIORITY_HIGH, - HWAS::DECONFIG, + HWAS::DELAYED_DECONFIG, HWAS::GARD_Predictive ); } // bit 16 is a Register Access Error @@ -1282,7 +1286,7 @@ errlHndl_t FsiDD::handleOpbErrors(FsiAddrInfo_t& i_addrInfo, // error is inside the OPB logic l_err->addHwCallout( i_addrInfo.opbTarg, HWAS::SRCI_PRIORITY_HIGH, - HWAS::DECONFIG, + HWAS::DELAYED_DECONFIG, HWAS::GARD_NULL ); root_cause_found = true; break; @@ -1294,7 +1298,7 @@ errlHndl_t FsiDD::handleOpbErrors(FsiAddrInfo_t& i_addrInfo, // could also be something weird in the chip l_err->addHwCallout( i_addrInfo.fsiTarg, HWAS::SRCI_PRIORITY_LOW, - HWAS::DECONFIG, + HWAS::DELAYED_DECONFIG, HWAS::GARD_NULL ); root_cause_found = true; break; @@ -1308,7 +1312,7 @@ errlHndl_t FsiDD::handleOpbErrors(FsiAddrInfo_t& i_addrInfo, // problem is on the slave side of the bus l_err->addHwCallout( i_addrInfo.fsiTarg, HWAS::SRCI_PRIORITY_HIGH, - HWAS::DECONFIG, + HWAS::DELAYED_DECONFIG, HWAS::GARD_Predictive ); root_cause_found = true; break; @@ -1323,7 +1327,7 @@ errlHndl_t FsiDD::handleOpbErrors(FsiAddrInfo_t& i_addrInfo, // callout the slave side explicitly to deconfig l_err->addHwCallout( i_addrInfo.fsiTarg, HWAS::SRCI_PRIORITY_LOW, - HWAS::DECONFIG, + HWAS::DELAYED_DECONFIG, HWAS::GARD_Predictive ); root_cause_found = true; break; @@ -1346,7 +1350,7 @@ errlHndl_t FsiDD::handleOpbErrors(FsiAddrInfo_t& i_addrInfo, HWAS::SRCI_PRIORITY_HIGH ); l_err->addHwCallout( i_addrInfo.fsiTarg, HWAS::SRCI_PRIORITY_LOW, - HWAS::DECONFIG, + HWAS::DELAYED_DECONFIG, HWAS::GARD_NULL ); } @@ -1467,7 +1471,7 @@ errlHndl_t FsiDD::pollForComplete(FsiAddrInfo_t& i_addrInfo, //most likely this is an issue with the slave chip l_err->addHwCallout( i_addrInfo.fsiTarg, HWAS::SRCI_PRIORITY_HIGH, - HWAS::DECONFIG, + HWAS::DELAYED_DECONFIG, HWAS::GARD_NULL ); //also could be a problem with the OPB logic @@ -1526,7 +1530,7 @@ errlHndl_t FsiDD::pollForComplete(FsiAddrInfo_t& i_addrInfo, //most likely this is an issue with the slave chip l_err->addHwCallout( i_addrInfo.fsiTarg, HWAS::SRCI_PRIORITY_HIGH, - HWAS::DECONFIG, + HWAS::DELAYED_DECONFIG, HWAS::GARD_NULL ); //also could be a problem with the master @@ -2506,7 +2510,8 @@ errlHndl_t FsiDD::verifyPresent( TARGETING::Target* i_target ) slaves), TWO_UINT32_TO_UINT64( TARGETING::get_huid(i_target), - TARGETING::get_huid(chipinfo.master))); + TARGETING::get_huid(chipinfo.master)), + true /*SW error*/); l_err->collectTrace(FSI_COMP_NAME); // log the current MLEVP which contains the detected slave diff --git a/src/usr/fsi/fsipres.C b/src/usr/fsi/fsipres.C index 400f5aba0..8abb8e985 100644 --- a/src/usr/fsi/fsipres.C +++ b/src/usr/fsi/fsipres.C @@ -5,7 +5,7 @@ /* */ /* IBM CONFIDENTIAL */ /* */ -/* COPYRIGHT International Business Machines Corp. 2011,2013 */ +/* COPYRIGHT International Business Machines Corp. 2011,2014 */ /* */ /* p1 */ /* */ @@ -82,7 +82,8 @@ errlHndl_t procPresenceDetect(DeviceFW::OperationType i_opType, new ERRORLOG::ErrlEntry(ERRORLOG::ERRL_SEV_UNRECOVERABLE, FSI::MOD_FSIPRES_PROCPRESENCEDETECT, FSI::RC_INVALID_LENGTH, - TO_UINT64(io_buflen)); + TO_UINT64(io_buflen), + true /*SW error*/); io_buflen = 0; return l_errl; } @@ -264,7 +265,8 @@ errlHndl_t membPresenceDetect(DeviceFW::OperationType i_opType, new ERRORLOG::ErrlEntry(ERRORLOG::ERRL_SEV_UNRECOVERABLE, FSI::MOD_FSIPRES_MEMBPRESENCEDETECT, FSI::RC_INVALID_LENGTH, - TO_UINT64(io_buflen)); + TO_UINT64(io_buflen), + true /*SW error*/); io_buflen = 0; return l_errl; } |
