summaryrefslogtreecommitdiffstats
path: root/src/usr/fapi2/test
diff options
context:
space:
mode:
authorMatt Derksen <mderkse1@us.ibm.com>2018-09-12 10:54:15 -0500
committerDaniel M. Crowell <dcrowell@us.ibm.com>2018-11-09 13:27:20 -0600
commit1e1b50096bb42d57f06af3016cd1e7c6977d0021 (patch)
tree349d0c3199a2010686b1b9c6f056668a61031a19 /src/usr/fapi2/test
parent8351efdb3b65ed4fc5472e78efd5db315663e42f (diff)
downloadtalos-hostboot-1e1b50096bb42d57f06af3016cd1e7c6977d0021.tar.gz
talos-hostboot-1e1b50096bb42d57f06af3016cd1e7c6977d0021.zip
Support fapi2 MMIO functions
There will be a new set of interfaces in fapi2 to perform mmio (aka inband) operations directly. This is needed for OCMB access in the memory HWPs, specifically as part of the command/response protocol. Change-Id: If473e8e53fa6f76a05ad897e150b58075c769902 RTC:191344 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66045 Reviewed-by: Richard Ward <rward15@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/usr/fapi2/test')
-rw-r--r--src/usr/fapi2/test/fapi2MmioAccessTest.H221
-rw-r--r--src/usr/fapi2/test/fapi2Test.mk2
-rw-r--r--src/usr/fapi2/test/p9_mmiotests.C299
-rw-r--r--src/usr/fapi2/test/p9_mmiotests.H71
4 files changed, 593 insertions, 0 deletions
diff --git a/src/usr/fapi2/test/fapi2MmioAccessTest.H b/src/usr/fapi2/test/fapi2MmioAccessTest.H
new file mode 100644
index 000000000..dca8421a0
--- /dev/null
+++ b/src/usr/fapi2/test/fapi2MmioAccessTest.H
@@ -0,0 +1,221 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/fapi2/test/fapi2MmioAccessTest.H $ */
+/* */
+/* OpenPOWER HostBoot Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2018 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+#ifndef __FAPI2_MMIOACCESSTEST_H
+#define __FAPI2_MMIOACCESSTEST_H
+
+/**
+ * @file src/usr/fapi2/test/fapi2MmioAccessTest.H
+ *
+ * @brief Test various types of MMIO access with FAPI2 Macros
+ */
+
+#include <cxxtest/TestSuite.H>
+#include <errl/errlmanager.H>
+#include <errl/errlentry.H>
+#include <fapi2.H>
+#include <fapi2TestUtils.H>
+#include <p9_mmiotests.H>
+#include <plat_hwp_invoker.H>
+
+using namespace fapi2;
+
+class Fapi2MmioAccessTest : public CxxTest::TestSuite
+{
+public:
+//******************************************************************************
+// test_fapi2MmioInvalidTarget
+// Try calling mmio operation on invalid targets
+//******************************************************************************
+void test_fapi2MmioInvalidTarget()
+{
+ errlHndl_t l_errl = nullptr;
+ int numTests = 0;
+ int numFails = 0;
+
+ // Create a vector of TARGETING::Target pointers
+ TARGETING::TargetHandleList l_procTargetList;
+
+ // Get a list of all of the proc chips
+ TARGETING::getAllChips(l_procTargetList, TARGETING::TYPE_PROC, true);
+
+ for (auto & l_proc: l_procTargetList)
+ {
+ Target<fapi2::TARGET_TYPE_PROC_CHIP> fapi2_procTarget( l_proc );
+
+ numTests++;
+ FAPI_INVOKE_HWP(l_errl, p9_mmiotest_getmmio_invalid_target, fapi2_procTarget);
+ if(l_errl != nullptr)
+ {
+ delete l_errl; // delete expected error log
+ l_errl = nullptr;
+ }
+ else
+ {
+ TS_FAIL("No error from p9_mmiotest_getmmio_invalid_target !!");
+ numFails++;
+ }
+
+ numTests++;
+ FAPI_INVOKE_HWP(l_errl, p9_mmiotest_putmmio_invalid_target, fapi2_procTarget);
+ if(l_errl != nullptr)
+ {
+ delete l_errl; // delete expected error log
+ l_errl = nullptr;
+ }
+ else
+ {
+ TS_FAIL("No error from p9_mmiotest_putmmio_invalid_target !!");
+ numFails++;
+ }
+ }
+ FAPI_INF("test_fapi2MmioInvalidTarget Test Complete. %d/%d fails", numFails, numTests);
+}
+
+//******************************************************************************
+// test_fapi2MmioInvalidSizes
+// Try calling mmio operation with invalid input sizes
+//******************************************************************************
+void test_fapi2MmioInvalidSizes()
+{
+ errlHndl_t l_errl = nullptr;
+ int numTests = 0;
+ int numFails = 0;
+
+ // Create a vector of TARGETING::Target pointers
+ TARGETING::TargetHandleList l_ocmbTargetList;
+
+ // Get a list of all of the OCMB chips
+ TARGETING::getAllChips(l_ocmbTargetList, TARGETING::TYPE_OCMB_CHIP, true);
+
+ for (auto & l_ocmb: l_ocmbTargetList)
+ {
+ Target<fapi2::TARGET_TYPE_OCMB_CHIP> fapi2_ocmbTarget( l_ocmb );
+
+ numTests++;
+ FAPI_INVOKE_HWP(l_errl, p9_mmiotest_indivisible_by_section_size, fapi2_ocmbTarget);
+ if(l_errl != nullptr)
+ {
+ delete l_errl; // delete expected error log
+ l_errl = nullptr;
+ }
+ else
+ {
+ TS_FAIL("No error from p9_mmiotest_indivisible_by_section_size !!");
+ numFails++;
+ }
+
+ numTests++;
+ FAPI_INVOKE_HWP(l_errl, p9_mmiotest_invalid_section_size, fapi2_ocmbTarget);
+ if(l_errl != nullptr)
+ {
+ delete l_errl; // delete expected error log
+ l_errl = nullptr;
+ }
+ else
+ {
+ TS_FAIL("No error from p9_mmiotest_invalid_section_size !!");
+ numFails++;
+ }
+ }
+
+ FAPI_INF("test_fapi2MmioInvalidSizes Test Complete. %d/%d fails", numFails, numTests);
+}
+
+//******************************************************************************
+// test_fapi2MmioAccess
+//******************************************************************************
+void test_fapi2MmioAccess()
+{
+ int numTests = 0;
+ int numFails = 0;
+
+ errlHndl_t l_errl = nullptr;
+
+ // Create a vector of TARGETING::Target pointers
+ TARGETING::TargetHandleList l_chipList;
+
+ // Get a list of all of the OCMB chips
+ TARGETING::getAllChips(l_chipList, TARGETING::TYPE_OCMB_CHIP, true);
+
+ for (auto & l_ocmb: l_chipList)
+ {
+ Target<fapi2::TARGET_TYPE_OCMB_CHIP> l_fapi2_target( l_ocmb );
+
+ numTests++;
+ FAPI_INVOKE_HWP(l_errl, p9_mmiotest_getmmio_pass, l_fapi2_target);
+ if(l_errl)
+ {
+ TS_FAIL("Error from p9_mmiotest_getmmio_pass !!");
+ numFails++;
+ errlCommit(l_errl,FAPI2_COMP_ID);
+ delete l_errl; // delete unexpected error log so we dont get
+ // a false negative on the next case
+ l_errl = nullptr;
+ }
+
+ numTests++;
+ FAPI_INVOKE_HWP(l_errl, p9_mmiotest_putmmio_pass, l_fapi2_target);
+ if(l_errl)
+ {
+ TS_FAIL("Error from p9_mmiotest_putmmio_pass !!");
+ numFails++;
+ errlCommit(l_errl,FAPI2_COMP_ID);
+ delete l_errl; // delete unexpected error log so we dont get
+ // a false negative on the next case
+ l_errl = nullptr;
+ }
+
+ numTests++;
+ FAPI_INVOKE_HWP(l_errl, p9_mmiotest_double_read_pass, l_fapi2_target);
+ if(l_errl)
+ {
+ TS_FAIL("Error from p9_mmiotest_double_read_pass !!");
+ numFails++;
+ errlCommit(l_errl,FAPI2_COMP_ID);
+ delete l_errl; // delete unexpected error log so we dont get
+ // a false negative on the next case
+ l_errl = nullptr;
+ }
+
+ numTests++;
+ FAPI_INVOKE_HWP(l_errl, p9_mmiotest_write_read_pass, l_fapi2_target);
+ if(l_errl)
+ {
+ TS_FAIL("Error from p9_mmiotest_write_read_pass !!");
+ numFails++;
+ errlCommit(l_errl,FAPI2_COMP_ID);
+ delete l_errl; // delete unexpected error log so we dont get
+ // a false negative on the next case
+ l_errl = nullptr;
+ }
+ }
+
+ FAPI_INF("fapi2MmioAccessTest Test Complete. %d/%d fails", numFails, numTests);
+}
+
+
+};
+
+#endif // End __FAPI2_MMIOACCESSTEST_H
diff --git a/src/usr/fapi2/test/fapi2Test.mk b/src/usr/fapi2/test/fapi2Test.mk
index 6c3619a32..16c779b6e 100644
--- a/src/usr/fapi2/test/fapi2Test.mk
+++ b/src/usr/fapi2/test/fapi2Test.mk
@@ -57,6 +57,7 @@ ifeq (${HOSTBOOT_RUNTIME},1)
## Remove non-runtime tests (grep -v testname.H)
TESTS += ${shell ls ${ROOTPATH}/src/usr/fapi2/test/*Test.H | \
grep -v fapi2I2cAccessTest.H | \
+ grep -v fapi2MmioAccessTest.H | \
sort | xargs}
################################################################################
@@ -68,6 +69,7 @@ else
TESTS += ${shell ls ${ROOTPATH}/src/usr/fapi2/test/*Test.H | \
sort | xargs}
OBJS += p9_i2ctests.o
+OBJS += p9_mmiotests.o
################################################################################
endif
diff --git a/src/usr/fapi2/test/p9_mmiotests.C b/src/usr/fapi2/test/p9_mmiotests.C
new file mode 100644
index 000000000..264e88117
--- /dev/null
+++ b/src/usr/fapi2/test/p9_mmiotests.C
@@ -0,0 +1,299 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/fapi2/test/p9_mmiotests.C $ */
+/* */
+/* OpenPOWER HostBoot Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2018 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+//------------------------------------------------------------------------------
+/// @file p9_mmiotests.C
+///
+/// @brief These procedures test the fapi2 mmio_access interfaces.
+//-----------------------------------------------------------------------------
+#include <sys/time.h>
+
+#include <cxxtest/TestSuite.H>
+#include <fapi2.H>
+#include <mmio_access.H>
+#include <errl/errlentry.H>
+#include <plat_hwp_invoker.H>
+#include <sbe/sbe_common.H>
+
+
+fapi2::ReturnCode p9_mmiotest_getmmio_invalid_target(
+ fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target)
+{
+ // This will fail because PROC_CHIP not supported type
+ FAPI_INF("Entering p9_mmiotest_getmmio_invalid_target...");
+
+ std::vector<uint8_t> l_mmiodata;
+ l_mmiodata.resize(8);
+
+ FAPI_INF("Do getMMIO on a proc target for 8 bytes");
+ FAPI_TRY(fapi2::getMMIO(i_target,
+ 0x1000, // mmio address relative to target
+ 8, // mmio transaction size
+ l_mmiodata));
+ fapi_try_exit:
+
+ FAPI_INF("Exiting p9_mmiotest_getmmio_invalid_target...");
+
+ return fapi2::current_err;
+
+}
+
+
+fapi2::ReturnCode p9_mmiotest_putmmio_invalid_target(
+ fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target)
+{
+ // This will fail because PROC_CHIP not supported type
+ FAPI_INF("Entering p9_mmiotest_putmmio_invalid_target...");
+
+ std::vector<uint8_t> l_mmiodata;
+ l_mmiodata.push_back(1);
+ l_mmiodata.push_back(2);
+ l_mmiodata.push_back(3);
+ l_mmiodata.push_back(4);
+
+
+ FAPI_INF( "Do putMMIO on proc target" );
+ FAPI_TRY(fapi2::putMMIO(i_target,
+ 0x1000,
+ 4,
+ l_mmiodata));
+
+ fapi_try_exit:
+
+ FAPI_INF( "Exiting p9_mmiotest_putmmio_invalid_target... rc = 0x%.8X",
+ (uint64_t)fapi2::current_err );
+
+ return fapi2::current_err;
+
+}
+
+
+fapi2::ReturnCode p9_mmiotest_indivisible_by_section_size(
+ fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target)
+{
+ // This will fail because data can not be divided evenly among multiple section size transfers
+ FAPI_INF("Entering p9_mmiotest_indivisible_by_section_size...");
+
+ std::vector<uint8_t> l_mmiodata;
+ l_mmiodata.resize(10);
+
+ FAPI_INF("Do getMMIO on a target for 10 bytes");
+ FAPI_TRY(fapi2::getMMIO(i_target,
+ 0x1000, // mmio address relative to target
+ 8, // mmio transaction size
+ l_mmiodata));
+ fapi_try_exit:
+
+ FAPI_INF("Exiting p9_mmiotest_indivisible_by_section_size...");
+
+ return fapi2::current_err;
+
+}
+
+
+fapi2::ReturnCode p9_mmiotest_invalid_section_size(
+ fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target)
+{
+ // This will fail because an invalid section transfer size is being requested
+ FAPI_INF("Entering p9_mmiotest_invalid_section_size...");
+
+ std::vector<uint8_t> l_mmiodata;
+ l_mmiodata.resize(12);
+
+ FAPI_INF("Do getMMIO on a target for 12 bytes");
+ FAPI_TRY(fapi2::getMMIO(i_target,
+ 0x1000, // mmio address relative to target
+ 12, // mmio transaction size
+ l_mmiodata));
+ fapi_try_exit:
+
+ FAPI_INF("Exiting p9_mmiotest_invalid_section_size...");
+
+ return fapi2::current_err;
+
+}
+
+////////////////////////////////////////////////////////////////////////////////
+//
+////////////////////////////////////////////////////////////////////////////////
+fapi2::ReturnCode p9_mmiotest_getmmio_pass(
+ fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target)
+{
+ std::vector<uint8_t> l_mmiodata;
+
+ FAPI_INF("Entering p9_mmiotest_getmmio_pass...");
+
+ const size_t l_mmiodataSize = 4;
+ l_mmiodata.resize(l_mmiodataSize); // do a single mmio transaction
+
+ FAPI_INF("Do single-read transaction getMMIO on an OCMB target");
+ FAPI_TRY(fapi2::getMMIO(i_target,
+ 0x1000,
+ l_mmiodataSize,
+ l_mmiodata) );
+
+
+ l_mmiodata.resize(l_mmiodataSize*2); // do a double mmio transaction
+ FAPI_INF("Do double-read transaction getMMIO on an OCMB target");
+ FAPI_TRY(fapi2::getMMIO(i_target,
+ 0x1000,
+ l_mmiodataSize,
+ l_mmiodata) );
+
+ fapi_try_exit:
+
+ FAPI_INF("Exiting p9_mmiotest_getmmio_pass...");
+
+ return fapi2::current_err;
+
+}
+
+
+fapi2::ReturnCode p9_mmiotest_double_read_pass(
+ fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target)
+{
+ std::vector<uint8_t> l_1st_read;
+ std::vector<uint8_t> l_2nd_read;
+
+ FAPI_INF("Entering p9_mmiotest_double_read_pass...");
+
+ const size_t l_mmioTransactionSize = 4;
+ l_1st_read.resize(4);
+
+ FAPI_INF("Do first getMMIO on an ocmb target");
+ FAPI_TRY(fapi2::getMMIO(i_target,
+ 0x1000,
+ l_mmioTransactionSize,
+ l_1st_read) );
+
+ // Initialize to some bad data
+ l_2nd_read.push_back('T');
+ l_2nd_read.push_back('e');
+ l_2nd_read.push_back('s');
+ l_2nd_read.push_back('t');
+
+ FAPI_INF("Do second getMMIO on an ocmb target");
+ FAPI_TRY(fapi2::getMMIO(i_target,
+ 0x1000,
+ l_mmioTransactionSize,
+ l_2nd_read) );
+
+ // read data should match
+ if (l_2nd_read != l_1st_read)
+ {
+ TS_FAIL("1st read data (%d) does NOT match 2nd read data (%d)",
+ l_1st_read.size(), l_2nd_read.size());
+ TRACFBIN(g_fapiTd, "1st data", l_1st_read.data(), l_1st_read.size());
+ TRACFBIN(g_fapiTd, "2nd data", l_2nd_read.data(), l_2nd_read.size());
+ }
+
+ fapi_try_exit:
+
+ FAPI_INF("Exiting p9_mmiotest_double_read_pass...");
+
+ return fapi2::current_err;
+}
+
+
+fapi2::ReturnCode p9_mmiotest_putmmio_pass(
+ fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target)
+{
+ FAPI_INF("Entering p9_mmiotest_putmmio_pass...");
+
+ std::vector<uint8_t> l_mmiodata;
+ l_mmiodata.push_back('P');
+ l_mmiodata.push_back('U');
+ l_mmiodata.push_back('T');
+ l_mmiodata.push_back('M');
+ l_mmiodata.push_back('M');
+ l_mmiodata.push_back('I');
+ l_mmiodata.push_back('O');
+ l_mmiodata.push_back('-');
+ l_mmiodata.push_back('P');
+ l_mmiodata.push_back('A');
+ l_mmiodata.push_back('S');
+ l_mmiodata.push_back('S');
+
+ FAPI_INF("Do putMMIO on OCMB target");
+ FAPI_TRY(fapi2::putMMIO(i_target,
+ 0x1000,
+ 4,
+ l_mmiodata));
+ fapi_try_exit:
+
+ FAPI_INF("Exiting p9_mmiotest_putmmio_pass...");
+
+ return fapi2::current_err;
+}
+
+
+fapi2::ReturnCode p9_mmiotest_write_read_pass(
+ fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target)
+{
+ FAPI_INF("Entering p9_mmiotest_write_read_pass...");
+
+ const size_t l_mmioTransactionSize = 4;
+ std::vector<uint8_t> l_mmio_data;
+ std::vector<uint8_t> l_read_mmio_data;
+
+ const uint8_t l_data[] = {'p','9','_','m', 'm','i','o','t',
+ 'e','s','t','_', 'w','r','i','t',
+ 'e','_','r','e', 'a','d','_','p',
+ 'a','s','s','!'};
+ const size_t l_data_size = sizeof(l_data);
+ l_mmio_data.insert( l_mmio_data.end(), &l_data[0], &l_data[l_data_size] );
+
+ // Write out a known value (name of this test)
+ FAPI_INF("Calling putMMIO on the target (size: %d)", l_data_size);
+ FAPI_TRY(fapi2::putMMIO(i_target, 0x1000,
+ l_mmioTransactionSize, l_mmio_data));
+
+ // now read it out and verify it was written correctly
+ FAPI_INF("Now read the just written data");
+ l_read_mmio_data.resize(l_data_size);
+ FAPI_TRY(fapi2::getMMIO(i_target,
+ 0x1000,
+ l_mmioTransactionSize,
+ l_read_mmio_data));
+
+ if (l_mmio_data == l_read_mmio_data)
+ {
+ FAPI_INF("Data found matches what was written");
+ }
+ else
+ {
+ TS_FAIL( "Data found (%d) does NOT match written values (%d)",
+ l_read_mmio_data.size(), l_mmio_data.size() );
+ TRACFBIN(g_fapiTd, "getMMIO returned",
+ l_read_mmio_data.data(), l_read_mmio_data.size());
+ TRACFBIN(g_fapiTd, "putMMIO wrote", l_mmio_data.data(),
+ l_mmio_data.size());
+ }
+
+ fapi_try_exit:
+
+ FAPI_INF("Exiting p9_mmiotest_write_read_pass...");
+
+ return fapi2::current_err;
+}
diff --git a/src/usr/fapi2/test/p9_mmiotests.H b/src/usr/fapi2/test/p9_mmiotests.H
new file mode 100644
index 000000000..bfcaebf33
--- /dev/null
+++ b/src/usr/fapi2/test/p9_mmiotests.H
@@ -0,0 +1,71 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/fapi2/test/p9_mmiotests.H $ */
+/* */
+/* OpenPOWER HostBoot Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2018 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+//------------------------------------------------------------------------------
+/// @file p9_mmiotests.C
+///
+/// @brief These procedures test the fapi2 mmio_access interfaces.
+//------------------------------------------------------------------------------
+#ifndef _P9_MMIOTESTS_H_
+#define _P9_MMIOTESTS_H_
+
+#include <fapi2.H>
+
+//-----------------------------------------------------------------------
+// FAILURE TESTCASES
+//-----------------------------------------------------------------------
+// Unsupported target
+fapi2::ReturnCode p9_mmiotest_getmmio_invalid_target(
+ fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target);
+
+fapi2::ReturnCode p9_mmiotest_putmmio_invalid_target(
+ fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target);
+
+// Expected size cannot be broken evenly into section sizes
+fapi2::ReturnCode p9_mmiotest_indivisible_by_section_size(
+ fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target);
+
+// Try unsupported section size
+fapi2::ReturnCode p9_mmiotest_invalid_section_size(
+ fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target);
+
+//-----------------------------------------------------------------------
+// GOOD-CASE TESTCASES
+//-----------------------------------------------------------------------
+// Simple getMMIO, try with two get sizes
+fapi2::ReturnCode p9_mmiotest_getmmio_pass(
+ fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target);
+
+// Simple putMMIO, try with two put sizes
+fapi2::ReturnCode p9_mmiotest_putmmio_pass(
+ fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target);
+
+// Verify same read of the same thing twice matches
+fapi2::ReturnCode p9_mmiotest_double_read_pass(
+ fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target);
+
+// Verify we read exactly what we wrote
+fapi2::ReturnCode p9_mmiotest_write_read_pass(
+ fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target);
+#endif
OpenPOWER on IntegriCloud