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authorGlenn Miles <milesg@ibm.com>2019-07-01 15:14:26 -0500
committerNicholas E. Bofferding <bofferdn@us.ibm.com>2019-07-09 08:54:29 -0500
commit025067bcd46e8a97852576e378fc52f3acc4e62d (patch)
tree3730ffc25c7afb56680f102ec647f952179609d6 /src/usr/expaccess
parent4e69f8fe6542a0db74b3ed017ce623bf6ac8bfed (diff)
downloadtalos-hostboot-025067bcd46e8a97852576e378fc52f3acc4e62d.tar.gz
talos-hostboot-025067bcd46e8a97852576e378fc52f3acc4e62d.zip
Testcases to verify MMIO and I2C Scoms to Explorer work consistently
Now that MMIO is functional we can enable tests that test writing with I2C and making sure we read back the same value with MMIO and vice versa. Change-Id: I95ac8694117784e6da2a7b38608c9b890d84938e RTC: 211130 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/79870 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Diffstat (limited to 'src/usr/expaccess')
-rw-r--r--src/usr/expaccess/test/expscomtest.H709
1 files changed, 391 insertions, 318 deletions
diff --git a/src/usr/expaccess/test/expscomtest.H b/src/usr/expaccess/test/expscomtest.H
index 366f50ca2..9e9a750f8 100644
--- a/src/usr/expaccess/test/expscomtest.H
+++ b/src/usr/expaccess/test/expscomtest.H
@@ -58,10 +58,11 @@ struct testExpscomAddrData
// Test table values
const testExpscomAddrData g_expscomAddrTable[] =
{
- {0x501C, 0x00000000DEADBEEF},
- {0x209004, 0x00000000C0DEDEAD},
- {0x8010002, 0xDEADC0DEC0DEBEEF}
+ {0x501C, 0x00000000DEADBEEF}, // UART scratch register
+ {0x209004, 0x00000000C0DEDEAD}, // PVT_CTRL - TM_SCRATCH register
+ {0x8010002, 0xDEADC0DEC0DEBEEF} // PSCOM_ERROR_MASK register
};
+
const uint32_t g_expscomAddrTableSz =
sizeof(g_expscomAddrTable)/sizeof(testExpscomAddrData);
@@ -81,7 +82,7 @@ TS_FAIL(STRING , \
l_testEntry.addr, \
get_huid(TARGET)); \
l_err = fapi2::rcToErrl(l_rc); \
-errlCommit(l_err, 0x10);
+errlCommit(l_err, CXXTEST_COMP_ID);
#define FAIL_TEST_ERRL(TARGET, STRING) \
l_fails++; \
@@ -89,7 +90,7 @@ TS_FAIL(STRING , \
l_testEntry.data, \
l_testEntry.addr, \
get_huid(TARGET)); \
-errlCommit(l_err, 0x10);
+errlCommit(l_err, CXXTEST_COMP_ID);
class expscomTest: public CxxTest::TestSuite
{
@@ -111,11 +112,12 @@ private:
// use this to keep track of if we need to unload any
// modules loaded by this testcase
bool mss_module_loaded;
- TARGETING::HB_MUTEX_SERIALIZE_TEST_LOCK_ATTR iv_serializeTestMutex;
+ HB_MUTEX_SERIALIZE_TEST_LOCK_ATTR iv_serializeTestMutex;
+
public:
/**
- * @brief EXPSCOM test I2C Path
+ * @brief EXPSCOM test I2C Path of FAPI HWP interfaces
* Write value and read back to verify i2c scoms to OCMBs
*/
void testExpscomI2c(void)
@@ -159,17 +161,19 @@ public:
fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP> l_lastExpChip_fapi(l_lastExpChip);
// Save away original scom switch info so we can restore it at the end of the test
- auto first_ocmb_info = l_firstExpChip->getAttr<TARGETING::ATTR_SCOM_SWITCHES>();
- auto last_ocmb_info = l_lastExpChip->getAttr<TARGETING::ATTR_SCOM_SWITCHES>();
+ auto first_ocmb_info =
+ l_firstExpChip->getAttr<ATTR_SCOM_SWITCHES>();
+ auto last_ocmb_info =
+ l_lastExpChip->getAttr<ATTR_SCOM_SWITCHES>();
// Inband operations can't be run at the same time
// atomic section >>
mutex_lock(iv_serializeTestMutex);
- // This goal of this tests is to make sure I2C scom to OCMB is working so force
- // scom to go over I2C path for these targets
- l_firstExpChip->setAttr<TARGETING::ATTR_SCOM_SWITCHES>(forceI2CScom);
- l_lastExpChip->setAttr<TARGETING::ATTR_SCOM_SWITCHES>(forceI2CScom);
+ // The goal of these tests is to make sure I2C scom to OCMB is
+ // working so force scom to go over I2C path for these targets
+ l_firstExpChip->setAttr<ATTR_SCOM_SWITCHES>(forceI2CScom);
+ l_lastExpChip->setAttr<ATTR_SCOM_SWITCHES>(forceI2CScom);
// Loop through table for first and last OCMB targets
for( uint32_t l_num=0; l_num < g_expscomAddrTableSz; l_num++)
@@ -264,8 +268,8 @@ public:
}
// Set ATTR_SCOM_SWITCHES back to their original values
- l_firstExpChip->setAttr<TARGETING::ATTR_SCOM_SWITCHES>(first_ocmb_info);
- l_lastExpChip->setAttr<TARGETING::ATTR_SCOM_SWITCHES>(last_ocmb_info);
+ l_firstExpChip->setAttr<ATTR_SCOM_SWITCHES>(first_ocmb_info);
+ l_lastExpChip->setAttr<ATTR_SCOM_SWITCHES>(last_ocmb_info);
// << atomic section
mutex_unlock(iv_serializeTestMutex);
@@ -275,9 +279,11 @@ public:
return;
}
+ /**
+ * @brief Test platform level interfaces over I2C
+ */
void testExpscomI2cPlatform(void)
{
-
TRACFCOMP( g_trac_expscom, ">> Enter testExpscomI2cPlatform");
// Keep trace of pass/fails
uint32_t l_tests = 0;
@@ -315,8 +321,10 @@ public:
auto l_lastExpChip = l_explorerList.back();
// Save away original scom switch info so we can restore it at the end of the test
- auto first_ocmb_info = l_firstExpChip->getAttr<TARGETING::ATTR_SCOM_SWITCHES>();
- auto last_ocmb_info = l_lastExpChip->getAttr<TARGETING::ATTR_SCOM_SWITCHES>();
+ auto first_ocmb_info =
+ l_firstExpChip->getAttr<ATTR_SCOM_SWITCHES>();
+ auto last_ocmb_info =
+ l_lastExpChip->getAttr<ATTR_SCOM_SWITCHES>();
// Inband operations can't be run at the same time
// atomic section >>
@@ -324,8 +332,8 @@ public:
// This goal of this tests is to make sure I2C scom to OCMB is working so force
// scom to go over I2C path for these targets
- l_firstExpChip->setAttr<TARGETING::ATTR_SCOM_SWITCHES>(forceI2CScom);
- l_lastExpChip->setAttr<TARGETING::ATTR_SCOM_SWITCHES>(forceI2CScom);
+ l_firstExpChip->setAttr<ATTR_SCOM_SWITCHES>(forceI2CScom);
+ l_lastExpChip->setAttr<ATTR_SCOM_SWITCHES>(forceI2CScom);
// Loop through table for first and last OCMB targets
for( uint32_t l_num=0; l_num < g_expscomAddrTableSz; l_num++)
@@ -419,8 +427,8 @@ public:
}
// Set ATTR_SCOM_SWITCHES back to their original values
- l_firstExpChip->setAttr<TARGETING::ATTR_SCOM_SWITCHES>(first_ocmb_info);
- l_lastExpChip->setAttr<TARGETING::ATTR_SCOM_SWITCHES>(last_ocmb_info);
+ l_firstExpChip->setAttr<ATTR_SCOM_SWITCHES>(first_ocmb_info);
+ l_lastExpChip->setAttr<ATTR_SCOM_SWITCHES>(last_ocmb_info);
// << atomic section
mutex_unlock(iv_serializeTestMutex);
@@ -431,303 +439,368 @@ public:
return;
}
-// TODO RTC: 189447 Enable MMIO tests when MMIO drivers avail
- /**
+ /**
* @brief EXPSCOM test MMIO
* Write value and read back to verify MMIO scoms to OCMBs
+ * using fapi HWPs.
*/
-// void testExpscomMmio(void)
-// {
-// TargetHandleList l_explorerList;
-// uint32_t l_tests = 0;
-// uint32_t l_fails = 0;
-// errlHndl_t l_err = nullptr;
-// fapi2::ReturnCode l_rc = fapi2::FAPI2_RC_SUCCESS;
-// fapi2::buffer<uint64_t> l_scom_buffer;
-//
-// // Get the system's procs
-// getAllChips( l_explorerList,
-// TYPE_OCMB_CHIP,
-// true ); // true: return functional OCMBs
-//
-// auto l_firstExpChip = l_explorerList.front();
-// auto l_lastExpChip = l_explorerList.back();
-//
-// fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP> l_firstExpChip_fapi(l_firstExpChip);
-// fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP> l_lastExpChip_fapi(l_lastExpChip);
-//
-// auto first_ocmb_info = l_firstExpChip->getAttr<TARGETING::ATTR_SCOM_SWITCHES>();
-// auto last_ocmb_info = l_lastExpChip->getAttr<TARGETING::ATTR_SCOM_SWITCHES>();
-//
-//
-// // Loop through table for first and last OCMB, perform i2c write, then
-// // mmio read, and mmio write followed by i2c read.
-// for( uint32_t l_num=0; l_num < g_expscomAddrTableSz; l_num++)
-// {
-// testExpscomAddrData l_testEntry = g_expscomAddrTable[l_num];
-// if(l_testEntry.addr & mss::exp::i2c::IBM_SCOM_INDICATOR)
-// {
-// l_scom_buffer.insert<0,64,0,uint64_t>(l_testEntry.data);
-// }
-// else
-// {
-// l_scom_buffer.insert<0,32,0,uint32_t>(l_testEntry.data);
-// }
-//
-// // putScom to first OCMB over mmio
-// l_rc = put_scom(l_firstExpChip_fapi,
-// l_testEntry.addr,
-// l_scom_buffer);
-// l_tests++;
-// if(l_rc)
-// {
-// l_fails++;
-// TS_FAIL("testExpscomMmio>> Failed putScom writing 0x%.16X to 0x%.8X on target w/ huid 0x%.8X",
-// l_testEntry.data,
-// l_testEntry.addr,
-// get_huid(l_firstExpChip));
-// l_err = fapi2::rcToErrl(l_rc);
-// errlCommit(l_err, 0x10);
-// }
-//
-// // putScom to last OCMB over mmio
-// l_rc = put_scom(l_lastExpChip_fapi,
-// l_testEntry.addr,
-// l_scom_buffer);
-// l_tests++;
-// if(l_rc)
-// {
-// l_fails++;
-// TS_FAIL("testExpscomMmio>> Failed putScom writing 0x%.16X to 0x%.8X on target w/ huid 0x%.8X",
-// l_testEntry.data,
-// l_testEntry.addr,
-// get_huid(l_lastExpChip));
-// l_err = fapi2::rcToErrl(l_rc);
-// errlCommit(l_err, 0x10);
-// }
-//
-// // Flush scom buffer so it doesnt mess up next test
-// l_scom_buffer.flush<0>();
-//
-//
-// // getScom to first OCMB over mmio
-// l_rc = get_scom(l_firstExpChip_fapi,
-// l_testEntry.addr,
-// l_scom_buffer);
-// l_tests++;
-// if(l_rc)
-// {
-// l_fails++;
-// TS_FAIL("testExpscomMmio>> Failed getScom reading 0x%.16X to 0x%.8X on target w/ huid 0x%.8X",
-// l_testEntry.data,
-// l_testEntry.addr,
-// get_huid(l_firstExpChip));
-// l_err = fapi2::rcToErrl(l_rc);
-// errlCommit(l_err, 0x10);
-// }
-//
-// l_tests++;
-// if(l_scom_buffer() != l_testEntry.data)
-// {
-// l_fails++;
-// TS_FAIL("testExpscomMmio>> Expected 0x%.16X but got 0x%.16X on target w/ huid 0x%.8X",
-// l_testEntry.data,
-// l_scom_buffer(),
-// get_huid(l_firstExpChip));
-// l_err = fapi2::rcToErrl(l_rc);
-// errlCommit(l_err, 0x10);
-// }
-//
-// // Flush scom buffer so it doesnt mess up next test
-// l_scom_buffer.flush<0>();
-//
-// // getScom to last OCMB over mmio
-// l_rc = get_scom(l_lastExpChip_fapi,
-// l_testEntry.addr,
-// l_scom_buffer);
-// l_tests++;
-// if(l_rc)
-// {
-// l_fails++;
-// TS_FAIL("testExpscomMmio>> Failed getScom reading 0x%.16X to 0x%.8X on target w/ huid 0x%.8X",
-// l_testEntry.data,
-// l_testEntry.addr,
-// get_huid(l_lastExpChip));
-// l_err = fapi2::rcToErrl(l_rc);
-// errlCommit(l_err, 0x10);
-// }
-//
-// l_tests++;
-// if(l_scom_buffer() != l_testEntry.data)
-// {
-// l_fails++;
-// TS_FAIL("testExpscomMmio>> Expected 0x%.16X but got 0x%.16X on target w/ huid 0x%.8X",
-// l_testEntry.data,
-// l_scom_buffer(),
-// get_huid(l_lastExpChip));
-// l_err = fapi2::rcToErrl(l_rc);
-// errlCommit(l_err, 0x10);
-// }
-// }
-// // Set ATTR_SCOM_SWITCHES back to their original values
-// l_firstExpChip->setAttr<TARGETING::ATTR_SCOM_SWITCHES>(first_ocmb_info);
-// l_lastExpChip->setAttr<TARGETING::ATTR_SCOM_SWITCHES>(last_ocmb_info);
-// return;
-// }
-
- /**
- * @brief EXPSCOM test MMIO
- * Write value and read back to verify MMIO
- */
-// void testExpscomCombined(void)
-// {
-// TargetHandleList l_explorerList;
-// uint32_t l_tests = 0;
-// uint32_t l_fails = 0;
-// fapi2::ReturnCode l_rc = fapi2::FAPI2_RC_SUCCESS;
-// fapi2::buffer<uint64_t> l_scom_buffer;
-//
-// // Get the system's procs
-// getAllChips( l_explorerList,
-// TYPE_OCMB_CHIP,
-// true ); // true: return functional OCMBs
-//
-// auto l_firstExpChip = l_explorerList.front();
-// auto l_lastExpChip = l_explorerList.back();
-//
-// fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP> l_firstExpChip_fapi(l_firstExpChip);
-// fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP> l_lastExpChip_fapi(l_lastExpChip);
-//
-// auto first_ocmb_info = l_firstExpChip->getAttr<TARGETING::ATTR_SCOM_SWITCHES>();
-// auto last_ocmb_info = l_lastExpChip->getAttr<TARGETING::ATTR_SCOM_SWITCHES>();
-//
-// // Loop through table for first and last OCMB
-// for( uint32_t l_num=0; l_num < g_expscomAddrTableSz; l_num++)
-// {
-// testExpscomAddrData l_testEntry = g_expscomAddrTable[l_num];
-//
-// if(l_testEntry.addr & mss::exp::i2c::IBM_SCOM_INDICATOR)
-// {
-// l_scom_buffer.insert<0,64,0,uint64_t>(l_testEntry.data);
-// }
-// else
-// {
-// l_scom_buffer.insert<0,32,0,uint32_t>(l_testEntry.data);
-// }
-//
-// // ODD tests : first target writes MMIO, last target writes I2C
-// // EVEN tests : first target writes I2C, last target writes MMIO
-// if(l_num % 2)
-// {
-// l_firstExpChip->setAttr<TARGETING::ATTR_SCOM_SWITCHES>(forceMMIOScom);
-// l_lastExpChip->setAttr<TARGETING::ATTR_SCOM_SWITCHES>(forceI2CScom);
-// }
-// else
-// {
-// l_firstExpChip->setAttr<TARGETING::ATTR_SCOM_SWITCHES>(forceI2CScom);
-// l_lastExpChip->setAttr<TARGETING::ATTR_SCOM_SWITCHES>(forceMMIOScom);
-// }
-//
-// // putScom to first OCMB over mmio
-// l_rc = put_scom(l_firstExpChip_fapi,
-// l_testEntry.addr,
-// l_scom_buffer);
-// l_tests++;
-// if(l_rc)
-// {
-// l_fails++;
-// TS_FAIL("testExpscomMmio>> Failed putScom writing 0x%.16X to 0x%.8X on target w/ huid 0x%.8X",
-// l_testEntry.data,
-// l_testEntry.addr,
-// get_huid(l_firstExpChip));
-// }
-//
-// // putScom to last OCMB over mmio
-// l_rc = put_scom(l_lastExpChip_fapi,
-// l_testEntry.addr,
-// l_scom_buffer);
-// l_tests++;
-// if(l_rc)
-// {
-// l_fails++;
-// TS_FAIL("testExpscomMmio>> Failed putScom writing 0x%.16X to 0x%.8X on target w/ huid 0x%.8X",
-// l_testEntry.data,
-// l_testEntry.addr,
-// get_huid(l_lastExpChip));
-// }
-//
-// // Flush scom buffer so it doesnt mess up next test
-// l_scom_buffer.flush<0>();
-//
-// // getScom to first OCMB over mmio
-// l_rc = get_scom(l_firstExpChip_fapi,
-// l_testEntry.addr,
-// l_scom_buffer);
-// l_tests++;
-// if(l_rc)
-// {
-// l_fails++;
-// TS_FAIL("testExpscomMmio>> Failed getScom reading 0x%.16X to 0x%.8X on target w/ huid 0x%.8X",
-// l_testEntry.data,
-// l_testEntry.addr,
-// get_huid(l_firstExpChip));
-// }
-//
-// l_tests++;
-// if(l_scom_buffer() != l_testEntry.data)
-// {
-// l_fails++;
-// TS_FAIL("testExpscomMmio>> Expected 0x%.16X but got 0x%.16X on target w/ huid 0x%.8X",
-// l_testEntry.data,
-// l_scom_buffer(),
-// get_huid(l_firstExpChip));
-// }
-//
-// // ODD tests : first target reads I2C, last target reads MMIO
-// // EVEN tests : first target reads MMIO, last target reads I2C
-// if(l_num % 2)
-// {
-// l_firstExpChip->setAttr<TARGETING::ATTR_SCOM_SWITCHES>(forceI2CScom);
-// l_lastExpChip->setAttr<TARGETING::ATTR_SCOM_SWITCHES>(forceMMIOScom);
-// }
-// else
-// {
-// l_firstExpChip->setAttr<TARGETING::ATTR_SCOM_SWITCHES>(forceMMIOScom);
-// l_lastExpChip->setAttr<TARGETING::ATTR_SCOM_SWITCHES>(forceI2CScom);
-// }
-//
-// // Flush scom buffer so it doesnt mess up next test
-// l_scom_buffer.flush<0>();
-//
-// // getScom to last OCMB over mmio
-// l_rc = get_scom(l_lastExpChip_fapi,
-// l_testEntry.addr,
-// l_scom_buffer);
-// l_tests++;
-// if(l_rc)
-// {
-// l_fails++;
-// TS_FAIL("testExpscomMmio>> Failed getScom reading 0x%.16X to 0x%.8X on target w/ huid 0x%.8X",
-// l_testEntry.data,
-// l_testEntry.addr,
-// get_huid(l_lastExpChip));
-// }
-//
-// l_tests++;
-// if(l_scom_buffer() != l_testEntry.data)
-// {
-// l_fails++;
-// TS_FAIL("testExpscomMmio>> Expected 0x%.16X but got 0x%.16X on target w/ huid 0x%.8X",
-// l_testEntry.data,
-// l_scom_buffer(),
-// get_huid(l_lastExpChip));
-// }
-// }
-// // Set ATTR_SCOM_SWITCHES back to their original values
-// l_firstExpChip->setAttr<TARGETING::ATTR_SCOM_SWITCHES>(first_ocmb_info);
-// l_lastExpChip->setAttr<TARGETING::ATTR_SCOM_SWITCHES>(last_ocmb_info);
-// return;
-// }
+ void testExpscomMmio(void)
+ {
+ TargetHandleList l_explorerList;
+ uint32_t l_tests = 0;
+ uint32_t l_fails = 0;
+ errlHndl_t l_err = nullptr;
+ fapi2::ReturnCode l_rc = fapi2::FAPI2_RC_SUCCESS;
+ fapi2::buffer<uint64_t> l_scom_buffer;
+
+ TRACFCOMP(g_trac_expscom, ">> Enter testExpscomMmio");
+
+ do{
+ if (!iv_serializeTestMutex)
+ {
+ TS_FAIL("iv_serializedTestMutex is not setup");
+ break;
+ }
+
+ // Get the system's procs
+ getAllChips( l_explorerList,
+ TYPE_OCMB_CHIP,
+ true ); // true: return functional OCMBs
+
+ if(l_explorerList.size() == 0 )
+ {
+ TRACFCOMP(g_trac_expscom, "No OCMB targets found, skipping testExpscomMmio");
+ break;
+ }
+
+ auto l_firstExpChip = l_explorerList.front();
+ auto l_lastExpChip = l_explorerList.back();
+
+ fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>
+ l_firstExpChip_fapi(l_firstExpChip);
+ fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>
+ l_lastExpChip_fapi(l_lastExpChip);
+
+ auto first_ocmb_info =
+ l_firstExpChip->getAttr<ATTR_SCOM_SWITCHES>();
+ auto last_ocmb_info =
+ l_lastExpChip->getAttr<ATTR_SCOM_SWITCHES>();
+
+ // Inband operations can't be run at the same time
+ // atomic section >>
+ mutex_lock(iv_serializeTestMutex);
+
+ // Force use of MMIO
+ l_firstExpChip->setAttr<ATTR_SCOM_SWITCHES>(forceMMIOScom);
+ l_lastExpChip->setAttr<ATTR_SCOM_SWITCHES>(forceMMIOScom);
+
+ // Loop through table for first and last OCMB, perform i2c write,
+ // then read it back
+ for( uint32_t l_num=0; l_num < g_expscomAddrTableSz; l_num++)
+ {
+ testExpscomAddrData l_testEntry = g_expscomAddrTable[l_num];
+ if(l_testEntry.addr & mss::exp::i2c::IBM_SCOM_INDICATOR)
+ {
+ l_scom_buffer.insert<0,64,0,uint64_t>(l_testEntry.data);
+ }
+ else
+ {
+ l_scom_buffer.insert<32,32,0,uint32_t>(l_testEntry.data);
+ }
+
+ // putScom to first OCMB over mmio
+ l_rc = put_scom(l_firstExpChip_fapi,
+ l_testEntry.addr,
+ l_scom_buffer);
+ l_tests++;
+ if(l_rc)
+ {
+ l_fails++;
+ TS_FAIL("testExpscomMmio>> Failed putScom writing 0x%.16X to 0x%.8X on target w/ huid 0x%.8X",
+ l_testEntry.data,
+ l_testEntry.addr,
+ get_huid(l_firstExpChip));
+ l_err = fapi2::rcToErrl(l_rc);
+ errlCommit(l_err, CXXTEST_COMP_ID);
+ }
+
+ // putScom to last OCMB over mmio
+ l_rc = put_scom(l_lastExpChip_fapi,
+ l_testEntry.addr,
+ l_scom_buffer);
+ l_tests++;
+ if(l_rc)
+ {
+ l_fails++;
+ TS_FAIL("testExpscomMmio>> Failed putScom writing 0x%.16X to 0x%.8X on target w/ huid 0x%.8X",
+ l_testEntry.data,
+ l_testEntry.addr,
+ get_huid(l_lastExpChip));
+ l_err = fapi2::rcToErrl(l_rc);
+ errlCommit(l_err, CXXTEST_COMP_ID);
+ }
+
+ // Flush scom buffer so it doesnt mess up next test
+ l_scom_buffer.flush<0>();
+
+ // getScom to first OCMB over mmio
+ l_rc = get_scom(l_firstExpChip_fapi,
+ l_testEntry.addr,
+ l_scom_buffer);
+ l_tests++;
+ if(l_rc)
+ {
+ l_fails++;
+ TS_FAIL("testExpscomMmio>> Failed getScom reading 0x%.16X to 0x%.8X on target w/ huid 0x%.8X",
+ l_testEntry.data,
+ l_testEntry.addr,
+ get_huid(l_firstExpChip));
+ l_err = fapi2::rcToErrl(l_rc);
+ errlCommit(l_err, CXXTEST_COMP_ID);
+ }
+
+ l_tests++;
+ if(l_scom_buffer() != l_testEntry.data)
+ {
+ l_fails++;
+ TS_FAIL("testExpscomMmio>> Expected 0x%.16X but got 0x%.16X on target w/ huid 0x%.8X",
+ l_testEntry.data,
+ l_scom_buffer(),
+ get_huid(l_firstExpChip));
+ l_err = fapi2::rcToErrl(l_rc);
+ errlCommit(l_err, CXXTEST_COMP_ID);
+ }
+
+ // Flush scom buffer so it doesnt mess up next test
+ l_scom_buffer.flush<0>();
+
+ // getScom to last OCMB over mmio
+ l_rc = get_scom(l_lastExpChip_fapi,
+ l_testEntry.addr,
+ l_scom_buffer);
+ l_tests++;
+ if(l_rc)
+ {
+ l_fails++;
+ TS_FAIL("testExpscomMmio>> Failed getScom reading 0x%.16X to 0x%.8X on target w/ huid 0x%.8X",
+ l_testEntry.data,
+ l_testEntry.addr,
+ get_huid(l_lastExpChip));
+ l_err = fapi2::rcToErrl(l_rc);
+ errlCommit(l_err, CXXTEST_COMP_ID);
+ }
+
+ l_tests++;
+ if(l_scom_buffer() != l_testEntry.data)
+ {
+ l_fails++;
+ TS_FAIL("testExpscomMmio>> Expected 0x%.16X but got 0x%.16X on target w/ huid 0x%.8X",
+ l_testEntry.data,
+ l_scom_buffer(),
+ get_huid(l_lastExpChip));
+ l_err = fapi2::rcToErrl(l_rc);
+ errlCommit(l_err, CXXTEST_COMP_ID);
+ }
+ }
+ // Set ATTR_SCOM_SWITCHES back to their original values
+ l_firstExpChip->setAttr<ATTR_SCOM_SWITCHES>(first_ocmb_info);
+ l_lastExpChip->setAttr<ATTR_SCOM_SWITCHES>(last_ocmb_info);
+
+ // << atomic section
+ mutex_unlock(iv_serializeTestMutex);
+ }while(0);
+
+
+ TRACFCOMP(g_trac_expscom, "<< Exit testExpscomMmio");
+ return;
+ }
+
+ /**
+ * @brief EXPSCOM test MMIO
+ * Combine I2C and MMIO reads/writes to verify that we
+ * get consistent results using FAPI HWPs.
+ */
+ void testExpscomCombined(void)
+ {
+ TargetHandleList l_explorerList;
+ uint32_t l_tests = 0;
+ uint32_t l_fails = 0;
+ fapi2::ReturnCode l_rc = fapi2::FAPI2_RC_SUCCESS;
+ fapi2::buffer<uint64_t> l_scom_buffer;
+
+ TRACFCOMP(g_trac_expscom, ">> Enter testExpscomCombined");
+
+ do{
+ if (!iv_serializeTestMutex)
+ {
+ TS_FAIL("iv_serializedTestMutex is not setup");
+ break;
+ }
+
+ // Get the system's procs
+ getAllChips( l_explorerList,
+ TYPE_OCMB_CHIP,
+ true ); // true: return functional OCMBs
+
+ if(l_explorerList.size() == 0 )
+ {
+ TRACFCOMP(g_trac_expscom, "No OCMB targets found, skipping testExpscomCombined");
+ break;
+ }
+
+ auto l_firstExpChip = l_explorerList.front();
+ auto l_lastExpChip = l_explorerList.back();
+
+ fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>
+ l_firstExpChip_fapi(l_firstExpChip);
+ fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>
+ l_lastExpChip_fapi(l_lastExpChip);
+
+ auto first_ocmb_info =
+ l_firstExpChip->getAttr<ATTR_SCOM_SWITCHES>();
+ auto last_ocmb_info =
+ l_lastExpChip->getAttr<ATTR_SCOM_SWITCHES>();
+
+ // Inband operations can't be run at the same time
+ // atomic section >>
+ mutex_lock(iv_serializeTestMutex);
+
+ // Loop through table for first and last OCMB, perform i2c write,
+ // then mmio read, and mmio write followed by i2c read.
+ for( uint32_t l_num=0; l_num < g_expscomAddrTableSz; l_num++)
+ {
+ testExpscomAddrData l_testEntry = g_expscomAddrTable[l_num];
+
+ if(l_testEntry.addr & mss::exp::i2c::IBM_SCOM_INDICATOR)
+ {
+ l_scom_buffer.insert<0,64,0,uint64_t>(l_testEntry.data);
+ }
+ else
+ {
+ l_scom_buffer.insert<32,32,0,uint32_t>(l_testEntry.data);
+ }
+
+ // ODD tests : first target writes MMIO, last target writes I2C
+ // EVEN tests : first target writes I2C, last target writes MMIO
+ if(l_num % 2)
+ {
+ l_firstExpChip->setAttr<ATTR_SCOM_SWITCHES>(forceMMIOScom);
+ l_lastExpChip->setAttr<ATTR_SCOM_SWITCHES>(forceI2CScom);
+ }
+ else
+ {
+ l_firstExpChip->setAttr<ATTR_SCOM_SWITCHES>(forceI2CScom);
+ l_lastExpChip->setAttr<ATTR_SCOM_SWITCHES>(forceMMIOScom);
+ }
+
+ // putScom to first OCMB
+ l_rc = put_scom(l_firstExpChip_fapi,
+ l_testEntry.addr,
+ l_scom_buffer);
+ l_tests++;
+ if(l_rc)
+ {
+ l_fails++;
+ TS_FAIL("testExpscomCombined>> Failed putScom writing 0x%.16X to 0x%.8X on target w/ huid 0x%.8X",
+ l_testEntry.data,
+ l_testEntry.addr,
+ get_huid(l_firstExpChip));
+ }
+
+ // putScom to last OCMB
+ l_rc = put_scom(l_lastExpChip_fapi,
+ l_testEntry.addr,
+ l_scom_buffer);
+ l_tests++;
+ if(l_rc)
+ {
+ l_fails++;
+ TS_FAIL("testExpscomCombined>> Failed putScom writing 0x%.16X to 0x%.8X on target w/ huid 0x%.8X",
+ l_testEntry.data,
+ l_testEntry.addr,
+ get_huid(l_lastExpChip));
+ }
+
+ // Flush scom buffer so it doesnt mess up next test
+ l_scom_buffer.flush<0>();
+
+ // getScom to first OCMB
+ l_rc = get_scom(l_firstExpChip_fapi,
+ l_testEntry.addr,
+ l_scom_buffer);
+ l_tests++;
+ if(l_rc)
+ {
+ l_fails++;
+ TS_FAIL("testExpscomCombined>> Failed getScom reading 0x%.16X to 0x%.8X on target w/ huid 0x%.8X",
+ l_testEntry.data,
+ l_testEntry.addr,
+ get_huid(l_firstExpChip));
+ }
+
+ l_tests++;
+ if(l_scom_buffer() != l_testEntry.data)
+ {
+ l_fails++;
+ TS_FAIL("testExpscomCombined>> Expected 0x%.16X but got 0x%.16X on target w/ huid 0x%.8X",
+ l_testEntry.data,
+ l_scom_buffer(),
+ get_huid(l_firstExpChip));
+ }
+
+ // ODD tests : first target reads I2C, last target reads MMIO
+ // EVEN tests : first target reads MMIO, last target reads I2C
+ if(l_num % 2)
+ {
+ l_firstExpChip->setAttr<ATTR_SCOM_SWITCHES>(forceI2CScom);
+ l_lastExpChip->setAttr<ATTR_SCOM_SWITCHES>(forceMMIOScom);
+ }
+ else
+ {
+ l_firstExpChip->setAttr<ATTR_SCOM_SWITCHES>(forceMMIOScom);
+ l_lastExpChip->setAttr<ATTR_SCOM_SWITCHES>(forceI2CScom);
+ }
+
+ // Flush scom buffer so it doesnt mess up next test
+ l_scom_buffer.flush<0>();
+
+ // getScom to last OCMB
+ l_rc = get_scom(l_lastExpChip_fapi,
+ l_testEntry.addr,
+ l_scom_buffer);
+ l_tests++;
+ if(l_rc)
+ {
+ l_fails++;
+ TS_FAIL("testExpscomCombined>> Failed getScom reading 0x%.16X to 0x%.8X on target w/ huid 0x%.8X",
+ l_testEntry.data,
+ l_testEntry.addr,
+ get_huid(l_lastExpChip));
+ }
+
+ l_tests++;
+ if(l_scom_buffer() != l_testEntry.data)
+ {
+ l_fails++;
+ TS_FAIL("testExpscomCombined>> Expected 0x%.16X but got 0x%.16X on target w/ huid 0x%.8X",
+ l_testEntry.data,
+ l_scom_buffer(),
+ get_huid(l_lastExpChip));
+ }
+ }
+
+ // Set ATTR_SCOM_SWITCHES back to their original values
+ l_firstExpChip->setAttr<ATTR_SCOM_SWITCHES>(first_ocmb_info);
+ l_lastExpChip->setAttr<ATTR_SCOM_SWITCHES>(last_ocmb_info);
+
+ // << atomic section
+ mutex_unlock(iv_serializeTestMutex);
+ }while(0);
+
+ TRACFCOMP(g_trac_expscom, "<< Exit testExpscomCombined");
+
+ return;
+ }
/**
* @brief Constructor
@@ -745,7 +818,7 @@ public:
if(err)
{
TS_FAIL("expscomTest() - Constuctor: failed to load MSS module");
- errlCommit( err, 0x10 );
+ errlCommit( err, CXXTEST_COMP_ID );
}
#endif
iv_serializeTestMutex = exptest::getTestMutex();
@@ -764,7 +837,7 @@ public:
if(err)
{
TS_FAIL("~expscomTest() - Destructor: failed to unload MSS module");
- errlCommit( err, 0x10 );
+ errlCommit( err, CXXTEST_COMP_ID );
}
}
};
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