PRD: COREFIR Nimbus DD1.0 recoverable attns workaround

Change-Id: I647f216778d01d332649373481874bfe53dd48fc
CQ: SW364673
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32482
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Benjamin J. Weisenbeck <bweisenb@us.ibm.com>
Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32585
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>

4 files changed, 122 insertions, 2 deletions

diff --git a/src/usr/diag/prdf/common/plat/p9/p9_ex.rule b/src/usr/diag/prdf/common/plat/p9/p9_ex.rule
index d4bfb2a20..1848635ca 100644
--- a/src/usr/diag/prdf/common/plat/p9/p9_ex.rule
+++ b/src/usr/diag/prdf/common/plat/p9/p9_ex.rule
@@ -408,10 +408,15 @@ group gL2FIR filter singlebit
      */
     (rL2FIR, bit(36)) ? self_th_1;
 
-    /** L2FIR[37:39]
+    /** L2FIR[37:38]
      *  spare
      */
-    (rL2FIR, bit(37|38|39)) ? defaultMaskedError;
+    (rL2FIR, bit(37|38)) ? defaultMaskedError;
+
+    /** L2FIR[39]
+     *  Core recovery event
+     */
+    (rL2FIR, bit(39)) ? core_recovery_workaround;
 
     /** L2FIR[40]
      *  scom error
diff --git a/src/usr/diag/prdf/common/plat/p9/p9_ex_actions.rule b/src/usr/diag/prdf/common/plat/p9/p9_ex_actions.rule
index 980212ddb..7e6b84d53 100644
--- a/src/usr/diag/prdf/common/plat/p9/p9_ex_actions.rule
+++ b/src/usr/diag/prdf/common/plat/p9/p9_ex_actions.rule
@@ -64,3 +64,8 @@ actionclass l2_power_bus_ce
     TBDDefaultCallout;
 };
 
+actionclass core_recovery_workaround
+{
+    try( analyze(connected(TYPE_CORE, 0)),
+         analyze(connected(TYPE_CORE, 1)) );
+};
diff --git a/src/usr/diag/prdf/common/plat/p9/p9_ex_regs.rule b/src/usr/diag/prdf/common/plat/p9/p9_ex_regs.rule
index f38639379..cc05b3425 100644
--- a/src/usr/diag/prdf/common/plat/p9/p9_ex_regs.rule
+++ b/src/usr/diag/prdf/common/plat/p9/p9_ex_regs.rule
@@ -33,3 +33,21 @@
         capture     group never;
     };
 
+    ############################################################################
+    # P9 EX target L2FIR
+    ############################################################################
+    register L2FIR_AND
+    {
+        name        "P9 EX target L2FIR AND";
+        scomaddr    0x010010801;
+        capture     group never;
+        access      write_only;
+    };
+
+    register L2FIR_OR
+    {
+        name        "P9 EX target L2FIR OR";
+        scomaddr    0x10010802;
+        capture     group never;
+        access      write_only;
+    };
diff --git a/src/usr/diag/prdf/common/plat/p9/prdfP9Ex.C b/src/usr/diag/prdf/common/plat/p9/prdfP9Ex.C
index 3d1cd6194..6ffe2ec9e 100644
--- a/src/usr/diag/prdf/common/plat/p9/prdfP9Ex.C
+++ b/src/usr/diag/prdf/common/plat/p9/prdfP9Ex.C
@@ -33,6 +33,8 @@
 #include <prdfMfgThresholdMgr.H>
 #include <prdfMfgThreshold.H>
 
+using namespace TARGETING;
+
 namespace PRDF
 {
 namespace p9_ex
@@ -51,6 +53,96 @@ int32_t Initialize( ExtensibleChip * i_exChip )
 PRDF_PLUGIN_DEFINE( p9_ex, Initialize );
 
 /**
+ * @brief  Plugin function called after analysis is complete but before PRD
+ *         exits.
+ * @param  i_exChip An EX chip.
+ * @param  io_sc     The step code data struct.
+ * @note   This is especially useful for any analysis that still needs to be
+ *         done after the framework clears the FIR bits that were at attention.
+ * @return SUCCESS.
+ */
+int32_t PostAnalysis( ExtensibleChip * i_exChip,
+                      STEP_CODE_DATA_STRUCT & io_sc )
+{
+    #define PRDF_FUNC "[p9_ex::PostAnalysis] "
+
+    int32_t l_rc = SUCCESS;
+
+    // For the core_recovery_workaround we need to clear L2FIR[39] if there are
+    // no attentions set in COREFIR_WOF
+    // Note: We clear L2FIR[39] first and then check for attentions in the
+    // COREFIR_WOF afterward to avoid the possibility of accidentally clearing
+    // L2FIR[39] despite new attentions appearing after we read COREFIR_WOF.
+
+    do
+    {
+        // get the L2FIR
+        SCAN_COMM_REGISTER_CLASS * l2fir_and =
+            i_exChip->getRegister("L2FIR_AND");
+        l2fir_and->setAllBits();
+
+        // clear L2FIR[39]
+        l2fir_and->ClearBit(39);
+
+        l_rc = l2fir_and->Write();
+        if ( SUCCESS != l_rc )
+        {
+            PRDF_ERR(PRDF_FUNC "ClearBit Write() failed on L2FIR_AND");
+            break;
+        }
+
+        // loop through all cores in EX
+        ExtensibleChipList ecChipList =
+            PlatServices::getConnected(i_exChip, TYPE_CORE);
+
+        for ( auto & ecChip : ecChipList )
+        {
+            // get the COREFIR_WOF
+            SCAN_COMM_REGISTER_CLASS * corefirwof =
+                ecChip->getRegister("COREFIR_WOF");
+            SCAN_COMM_REGISTER_CLASS * corefir_mask =
+                ecChip->getRegister("COREFIR_MASK");
+
+            // ForceRead COREFIR_WOF
+            l_rc  = corefirwof->ForceRead();
+            l_rc |= corefir_mask->ForceRead();
+            if ( SUCCESS != l_rc )
+            {
+                PRDF_ERR(PRDF_FUNC "ForceRead() failed on "
+                                    "COREFIR_WOF/COREFIR_MASK");
+                continue;
+            }
+
+            // if there are attentions in COREFIR_WOF, set L2FIR[39]
+            if ( corefirwof->GetBitFieldJustified(0,64) &
+                 ~corefir_mask->GetBitFieldJustified(0,64) )
+            {
+                SCAN_COMM_REGISTER_CLASS * l2fir_or =
+                    i_exChip->getRegister("L2FIR_OR");
+                l2fir_or->clearAllBits();
+
+                l2fir_or->SetBit(39);
+
+                l_rc = l2fir_or->Write();
+                if ( SUCCESS != l_rc )
+                {
+                    PRDF_ERR(PRDF_FUNC "SetBit Write() failed on L2FIR");
+                }
+
+                // There is no need to check the next core since we only need to
+                // know if there is at least one attention on any core.
+                break;
+            }
+        }
+    }while(0);
+
+    return SUCCESS; // Always return SUCCESS for this plugin.
+
+    #undef PRDF_FUNC
+}
+PRDF_PLUGIN_DEFINE( p9_ex, PostAnalysis );
+
+/**
  * @brief Handle an L3 CE
  * @param i_chip Ex chip.
  * @param i_stepcode Step Code data struct