PRD: shift UCS and HA chiplet masks to match chiplet FIRs

Change-Id: I68ae5505e814a178e4c15546cce322c1d745afca
CQ: SW433264
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60916
Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Benjamin J. Weisenbeck <bweisenb@us.ibm.com>
Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60928
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>

8 files changed, 24 insertions, 24 deletions

diff --git a/src/usr/diag/prdf/common/plat/mem/prdfMemUtils.C b/src/usr/diag/prdf/common/plat/mem/prdfMemUtils.C
index f02ca0a9f..c28eba4cf 100755
--- a/src/usr/diag/prdf/common/plat/mem/prdfMemUtils.C
+++ b/src/usr/diag/prdf/common/plat/mem/prdfMemUtils.C
@@ -677,14 +677,14 @@ void __cleanupChnlFail<TYPE_DMI,TYPE_MEMBUF>( ExtensibleChip * i_dmiChip,
     reg = mcChip->getRegister( "MC_CHIPLET_UCS_FIR_MASK" );
     if ( SUCCESS == reg->Read() )
     {
-        reg->SetBit( 1 + (dmiPos * 2) ); // 1, 3, 5, 7
+        reg->SetBit( 0 + (dmiPos * 2) ); // 0, 2, 4, 6 (masks 1, 3, 5, 7)
         reg->Write();
     }
 
     reg = mcChip->getRegister( "MC_CHIPLET_HA_FIR_MASK" );
     if ( SUCCESS == reg->Read() )
     {
-        reg->SetBit( 1 + (dmiPos * 2) ); // 1, 3, 5, 7
+        reg->SetBit( 0 + (dmiPos * 2) ); // 0, 2, 4, 6 (masks 1, 3, 5, 7)
         reg->Write();
     }
 
diff --git a/src/usr/diag/prdf/common/plat/p9/p9_cumulus.rule b/src/usr/diag/prdf/common/plat/p9/p9_cumulus.rule
index ea5139e97..ec06dc908 100644
--- a/src/usr/diag/prdf/common/plat/p9/p9_cumulus.rule
+++ b/src/usr/diag/prdf/common/plat/p9/p9_cumulus.rule
@@ -2620,7 +2620,7 @@ group gN0_CHIPLET_FIR filter singlebit
 rule rN0_CHIPLET_UCS_FIR
 {
   UNIT_CS:
-    N0_CHIPLET_UCS_FIR & ~N0_CHIPLET_UCS_FIR_MASK & `7fffffffffffffff`;
+    N0_CHIPLET_UCS_FIR & ~(N0_CHIPLET_UCS_FIR_MASK >> 1) & `7fffffffffffffff`;
 };
 
 group gN0_CHIPLET_UCS_FIR filter singlebit
@@ -3257,7 +3257,7 @@ group gN1_CHIPLET_FIR filter singlebit
 rule rN1_CHIPLET_UCS_FIR
 {
   UNIT_CS:
-    N1_CHIPLET_UCS_FIR & ~N1_CHIPLET_UCS_FIR_MASK & `7fffffffffffffff`;
+    N1_CHIPLET_UCS_FIR & ~(N1_CHIPLET_UCS_FIR_MASK >> 1) & `7fffffffffffffff`;
 };
 
 group gN1_CHIPLET_UCS_FIR filter singlebit
@@ -3286,7 +3286,7 @@ group gN1_CHIPLET_UCS_FIR filter singlebit
 rule rN1_CHIPLET_HA_FIR
 {
   HOST_ATTN:
-    N1_CHIPLET_HA_FIR & ~N1_CHIPLET_HA_FIR_MASK & `7fffffffffffffff`;
+    N1_CHIPLET_HA_FIR & ~(N1_CHIPLET_HA_FIR_MASK >> 1) & `7fffffffffffffff`;
 };
 
 group gN1_CHIPLET_HA_FIR filter singlebit
@@ -3927,7 +3927,7 @@ group gN2_CHIPLET_FIR filter singlebit
 rule rN2_CHIPLET_UCS_FIR
 {
   UNIT_CS:
-    N2_CHIPLET_UCS_FIR & ~N2_CHIPLET_UCS_FIR_MASK & `7fffffffffffffff`;
+    N2_CHIPLET_UCS_FIR & ~(N2_CHIPLET_UCS_FIR_MASK >> 1) & `7fffffffffffffff`;
 };
 
 group gN2_CHIPLET_UCS_FIR filter singlebit
@@ -4209,7 +4209,7 @@ group gN3_CHIPLET_FIR filter singlebit
 rule rN3_CHIPLET_UCS_FIR
 {
   UNIT_CS:
-    N3_CHIPLET_UCS_FIR & ~N3_CHIPLET_UCS_FIR_MASK & `7fffffffffffffff`;
+    N3_CHIPLET_UCS_FIR & ~(N3_CHIPLET_UCS_FIR_MASK >> 1) & `7fffffffffffffff`;
 };
 
 group gN3_CHIPLET_UCS_FIR filter singlebit
@@ -4258,7 +4258,7 @@ group gN3_CHIPLET_UCS_FIR filter singlebit
 rule rN3_CHIPLET_HA_FIR
 {
   HOST_ATTN:
-    N3_CHIPLET_HA_FIR & ~N3_CHIPLET_HA_FIR_MASK & `7fffffffffffffff`;
+    N3_CHIPLET_HA_FIR & ~(N3_CHIPLET_HA_FIR_MASK >> 1) & `7fffffffffffffff`;
 };
 
 group gN3_CHIPLET_HA_FIR filter singlebit
@@ -7515,7 +7515,7 @@ group gXB_CHIPLET_FIR filter singlebit
 rule rXB_CHIPLET_UCS_FIR
 {
   UNIT_CS:
-    XB_CHIPLET_UCS_FIR & ~XB_CHIPLET_UCS_FIR_MASK & `7fffffffffffffff`;
+    XB_CHIPLET_UCS_FIR & ~(XB_CHIPLET_UCS_FIR_MASK >> 1) & `7fffffffffffffff`;
 };
 
 group gXB_CHIPLET_UCS_FIR filter singlebit
diff --git a/src/usr/diag/prdf/common/plat/p9/p9_ec.rule b/src/usr/diag/prdf/common/plat/p9/p9_ec.rule
index a839819f8..6a2ee0f9c 100644
--- a/src/usr/diag/prdf/common/plat/p9/p9_ec.rule
+++ b/src/usr/diag/prdf/common/plat/p9/p9_ec.rule
@@ -215,7 +215,7 @@ group gEC_CHIPLET_FIR attntype CHECK_STOP, RECOVERABLE filter singlebit
 rule rEC_CHIPLET_UCS_FIR
 {
   UNIT_CS:
-    EC_CHIPLET_UCS_FIR & ~EC_CHIPLET_UCS_FIR_MASK & `7fffffffffffffff`;
+    EC_CHIPLET_UCS_FIR & ~(EC_CHIPLET_UCS_FIR_MASK >> 1) & `7fffffffffffffff`;
 };
 
 group gEC_CHIPLET_UCS_FIR attntype UNIT_CS filter singlebit
diff --git a/src/usr/diag/prdf/common/plat/p9/p9_mc.rule b/src/usr/diag/prdf/common/plat/p9/p9_mc.rule
index 5a7989344..2acfd7b1d 100644
--- a/src/usr/diag/prdf/common/plat/p9/p9_mc.rule
+++ b/src/usr/diag/prdf/common/plat/p9/p9_mc.rule
@@ -327,7 +327,7 @@ group gMC_CHIPLET_FIR attntype CHECK_STOP, RECOVERABLE filter singlebit
 rule rMC_CHIPLET_UCS_FIR
 {
   UNIT_CS:
-    MC_CHIPLET_UCS_FIR & ~MC_CHIPLET_UCS_FIR_MASK & `7fffffffffffffff`;
+    MC_CHIPLET_UCS_FIR & ~(MC_CHIPLET_UCS_FIR_MASK >> 1) & `7fffffffffffffff`;
 };
 
 group gMC_CHIPLET_UCS_FIR attntype UNIT_CS filter singlebit
@@ -376,7 +376,7 @@ group gMC_CHIPLET_UCS_FIR attntype UNIT_CS filter singlebit
 rule rMC_CHIPLET_HA_FIR
 {
   HOST_ATTN:
-    MC_CHIPLET_HA_FIR & ~MC_CHIPLET_HA_FIR_MASK & `7fffffffffffffff`;
+    MC_CHIPLET_HA_FIR & ~(MC_CHIPLET_HA_FIR_MASK >> 1) & `7fffffffffffffff`;
 };
 
 group gMC_CHIPLET_HA_FIR attntype HOST_ATTN filter singlebit
diff --git a/src/usr/diag/prdf/common/plat/p9/p9_mcbist.rule b/src/usr/diag/prdf/common/plat/p9/p9_mcbist.rule
index 54c14a52d..9a24a60b8 100644
--- a/src/usr/diag/prdf/common/plat/p9/p9_mcbist.rule
+++ b/src/usr/diag/prdf/common/plat/p9/p9_mcbist.rule
@@ -5,7 +5,7 @@
 #
 # OpenPOWER HostBoot Project
 #
-# Contributors Listed Below - COPYRIGHT 2016,2017
+# Contributors Listed Below - COPYRIGHT 2016,2018
 # [+] International Business Machines Corp.
 #
 #
@@ -288,7 +288,7 @@ group gMC_CHIPLET_FIR attntype CHECK_STOP, RECOVERABLE filter singlebit
 rule rMC_CHIPLET_UCS_FIR
 {
   UNIT_CS:
-    MC_CHIPLET_UCS_FIR & ~MC_CHIPLET_UCS_FIR_MASK & `7fffffffffffffff`;
+    MC_CHIPLET_UCS_FIR & ~(MC_CHIPLET_UCS_FIR_MASK >> 1) & `7fffffffffffffff`;
 };
 
 group gMC_CHIPLET_UCS_FIR attntype UNIT_CS filter singlebit
@@ -347,7 +347,7 @@ group gMC_CHIPLET_UCS_FIR attntype UNIT_CS filter singlebit
 rule rMC_CHIPLET_HA_FIR
 {
   HOST_ATTN:
-    MC_CHIPLET_HA_FIR & ~MC_CHIPLET_HA_FIR_MASK & `7fffffffffffffff`;
+    MC_CHIPLET_HA_FIR & ~(MC_CHIPLET_HA_FIR_MASK >> 1) & `7fffffffffffffff`;
 };
 
 group gMC_CHIPLET_HA_FIR attntype HOST_ATTN filter singlebit
diff --git a/src/usr/diag/prdf/common/plat/p9/p9_nimbus.rule b/src/usr/diag/prdf/common/plat/p9/p9_nimbus.rule
index 175dd66d3..180a9e37c 100644
--- a/src/usr/diag/prdf/common/plat/p9/p9_nimbus.rule
+++ b/src/usr/diag/prdf/common/plat/p9/p9_nimbus.rule
@@ -2600,7 +2600,7 @@ group gN0_CHIPLET_FIR filter singlebit
 rule rN0_CHIPLET_UCS_FIR
 {
   UNIT_CS:
-    N0_CHIPLET_UCS_FIR & ~N0_CHIPLET_UCS_FIR_MASK & `7fffffffffffffff`;
+    N0_CHIPLET_UCS_FIR & ~(N0_CHIPLET_UCS_FIR_MASK >> 1) & `7fffffffffffffff`;
 };
 
 group gN0_CHIPLET_UCS_FIR filter singlebit
@@ -3237,7 +3237,7 @@ group gN1_CHIPLET_FIR filter singlebit
 rule rN1_CHIPLET_UCS_FIR
 {
   UNIT_CS:
-    N1_CHIPLET_UCS_FIR & ~N1_CHIPLET_UCS_FIR_MASK & `7fffffffffffffff`;
+    N1_CHIPLET_UCS_FIR & ~(N1_CHIPLET_UCS_FIR_MASK >> 1) & `7fffffffffffffff`;
 };
 
 group gN1_CHIPLET_UCS_FIR filter singlebit
@@ -3266,7 +3266,7 @@ group gN1_CHIPLET_UCS_FIR filter singlebit
 rule rN1_CHIPLET_HA_FIR
 {
   HOST_ATTN:
-    N1_CHIPLET_HA_FIR & ~N1_CHIPLET_HA_FIR_MASK & `7fffffffffffffff`;
+    N1_CHIPLET_HA_FIR & ~(N1_CHIPLET_HA_FIR_MASK >> 1) & `7fffffffffffffff`;
 };
 
 group gN1_CHIPLET_HA_FIR filter singlebit
@@ -3907,7 +3907,7 @@ group gN2_CHIPLET_FIR filter singlebit
 rule rN2_CHIPLET_UCS_FIR
 {
   UNIT_CS:
-    N2_CHIPLET_UCS_FIR & ~N2_CHIPLET_UCS_FIR_MASK & `7fffffffffffffff`;
+    N2_CHIPLET_UCS_FIR & ~(N2_CHIPLET_UCS_FIR_MASK >> 1) & `7fffffffffffffff`;
 };
 
 group gN2_CHIPLET_UCS_FIR filter singlebit
@@ -4189,7 +4189,7 @@ group gN3_CHIPLET_FIR filter singlebit
 rule rN3_CHIPLET_UCS_FIR
 {
   UNIT_CS:
-    N3_CHIPLET_UCS_FIR & ~N3_CHIPLET_UCS_FIR_MASK & `7fffffffffffffff`;
+    N3_CHIPLET_UCS_FIR & ~(N3_CHIPLET_UCS_FIR_MASK >> 1) & `7fffffffffffffff`;
 };
 
 group gN3_CHIPLET_UCS_FIR filter singlebit
@@ -4238,7 +4238,7 @@ group gN3_CHIPLET_UCS_FIR filter singlebit
 rule rN3_CHIPLET_HA_FIR
 {
   HOST_ATTN:
-    N3_CHIPLET_HA_FIR & ~N3_CHIPLET_HA_FIR_MASK & `7fffffffffffffff`;
+    N3_CHIPLET_HA_FIR & ~(N3_CHIPLET_HA_FIR_MASK >> 1) & `7fffffffffffffff`;
 };
 
 group gN3_CHIPLET_HA_FIR filter singlebit
@@ -7485,7 +7485,7 @@ group gXB_CHIPLET_FIR filter singlebit
 rule rXB_CHIPLET_UCS_FIR
 {
   UNIT_CS:
-    XB_CHIPLET_UCS_FIR & ~XB_CHIPLET_UCS_FIR_MASK & `7fffffffffffffff`;
+    XB_CHIPLET_UCS_FIR & ~(XB_CHIPLET_UCS_FIR_MASK >> 1) & `7fffffffffffffff`;
 };
 
 group gXB_CHIPLET_UCS_FIR filter singlebit
diff --git a/src/usr/diag/prdf/common/plat/p9/p9_obus.rule b/src/usr/diag/prdf/common/plat/p9/p9_obus.rule
index 3a4ce29c6..92d11df06 100644
--- a/src/usr/diag/prdf/common/plat/p9/p9_obus.rule
+++ b/src/usr/diag/prdf/common/plat/p9/p9_obus.rule
@@ -289,7 +289,7 @@ group gOB_CHIPLET_FIR attntype CHECK_STOP, RECOVERABLE filter singlebit
 rule rOB_CHIPLET_UCS_FIR
 {
   UNIT_CS:
-    OB_CHIPLET_UCS_FIR & ~OB_CHIPLET_UCS_FIR_MASK & `7fffffffffffffff`;
+    OB_CHIPLET_UCS_FIR & ~(OB_CHIPLET_UCS_FIR_MASK >> 1) & `7fffffffffffffff`;
 };
 
 group gOB_CHIPLET_UCS_FIR attntype UNIT_CS filter singlebit
diff --git a/src/usr/diag/prdf/common/plat/p9/prdfP9Ec.C b/src/usr/diag/prdf/common/plat/p9/prdfP9Ec.C
index affb2d163..e37d2db58 100644
--- a/src/usr/diag/prdf/common/plat/p9/prdfP9Ec.C
+++ b/src/usr/diag/prdf/common/plat/p9/prdfP9Ec.C
@@ -68,7 +68,7 @@ void maskIfCoreCs( ExtensibleChip * i_chip )
         coreFirMask->SetBit(26);
 
         // Mask bit 1 for Unit checkstop
-        coreUcsMask->SetBit(1);
+        coreUcsMask->SetBit(0); // setting bit 0 masks the FIR bit 1.
 
         coreFirMask->Write();
         coreUcsMask->Write();