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authorBrian Stegmiller <bjs@us.ibm.com>2016-08-11 15:54:51 -0500
committerDaniel M. Crowell <dcrowell@us.ibm.com>2016-08-24 14:07:08 -0400
commit3e9be48f1eea40557a8573890c67eb95b57be36f (patch)
treef4afbfacf22ecade5be2f6d5515cd890871ff78f /src/usr/diag
parentfa9f7a503832052af773568fb78c41181604883b (diff)
downloadtalos-hostboot-3e9be48f1eea40557a8573890c67eb95b57be36f.tar.gz
talos-hostboot-3e9be48f1eea40557a8573890c67eb95b57be36f.zip
ATTN: Re-enable HOST ATTN testcase and update chkForIplAttn test
Change-Id: Ic0080efa9f3ecbf8be7909c09b16d890ab9f71af RTC: 155588 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28185 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com> Reviewed-by: Benjamin J. Weisenbeck <bweisenb@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/usr/diag')
-rw-r--r--src/usr/diag/attn/common/attntarget.C8
-rw-r--r--src/usr/diag/attn/common/attntarget.H68
-rw-r--r--src/usr/diag/attn/ipl/attn.C8
-rw-r--r--src/usr/diag/attn/ipl/test/attnfakesys.C23
-rw-r--r--src/usr/diag/attn/ipl/test/attnfaketarget.C12
-rw-r--r--src/usr/diag/attn/ipl/test/attnfaketarget.H8
-rw-r--r--src/usr/diag/attn/ipl/test/attnrandsource.C6
-rw-r--r--src/usr/diag/attn/ipl/test/attntestipl.H114
-rw-r--r--src/usr/diag/attn/runtime/test/attntestRtAttns.H8
-rw-r--r--src/usr/diag/attn/runtime/test/makefile2
10 files changed, 237 insertions, 20 deletions
diff --git a/src/usr/diag/attn/common/attntarget.C b/src/usr/diag/attn/common/attntarget.C
index ed90b75f2..d209adbfe 100644
--- a/src/usr/diag/attn/common/attntarget.C
+++ b/src/usr/diag/attn/common/attntarget.C
@@ -211,6 +211,14 @@ bool TargetServiceImpl::getAttribute(
return found;
}
+void TargetServiceImpl::masterProcChipTargetHandle(
+ TARGETING::Target*& o_masterProcChipTargetHandle,
+ const TARGETING::Target* i_pNodeTarget) const
+{
+ TARGETING::targetService().masterProcChipTargetHandle(
+ o_masterProcChipTargetHandle);
+}
+
TYPE TargetServiceImpl::getType(TargetHandle_t i_target)
{
return i_target->getAttr<ATTR_TYPE>();
diff --git a/src/usr/diag/attn/common/attntarget.H b/src/usr/diag/attn/common/attntarget.H
index 141dcdf7a..956d81f6c 100644
--- a/src/usr/diag/attn/common/attntarget.H
+++ b/src/usr/diag/attn/common/attntarget.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2014 */
+/* Contributors Listed Below - COPYRIGHT 2014,2016 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -33,6 +33,8 @@
#include "common/attnfwd.H"
#include <map>
+#include <targeting/common/targetservice.H>
+
namespace ATTN
{
@@ -167,6 +169,34 @@ class TargetService
uint64_t & o_val);
/**
+ * @brief Returns the master processor chip target handle
+ *
+ * Returns the master processor chip target handle. On systems
+ * without an alternate master, it returns a handle to the only master,
+ * if found (NULL otherwise). On systems with multiple potential
+ * masters, it returns a target handle to the acting master (NULL
+ * otherwise). If targeting information is not yet accessible (very
+ * early in the host boot IPL), the returned target handle will be a
+ * sentinel value representing the master (whichever it may be)
+ *
+ * @param[out] o_masterProcChipTarget Target handle referring to the
+ * current master processor chip (the one connected to PNOR)
+ * @param[in] i_pNodeTarget
+ * Handle to the node target to search for the acting master
+ * processor. If NULL, HB will search whatever node it's
+ * running on, and FSP will search the physical drawer containing
+ * the lowest ordered fabric node ID. *
+ * @pre Target Service must be initialized
+ *
+ * @post Master processor chip target returned or NULL is returned if
+ * targetservice is not yet initialized or user passed an invalid node
+ * target to get the master proc handle
+ */
+ void masterProcChipTargetHandle(
+ TARGETING::Target*& o_masterProcChipTargetHandle,
+ const TARGETING::Target* i_pNodeTarget = NULL) const;
+
+ /**
* @brief setImpl Set the active target service implementation.
*
* @param[in] i_impl The target service implementation to make active.
@@ -335,6 +365,34 @@ class TargetServiceImpl
uint64_t & o_val);
/**
+ * @brief Returns the master processor chip target handle
+ *
+ * Returns the master processor chip target handle. On systems
+ * without an alternate master, it returns a handle to the only master,
+ * if found (NULL otherwise). On systems with multiple potential
+ * masters, it returns a target handle to the acting master (NULL
+ * otherwise). If targeting information is not yet accessible (very
+ * early in the host boot IPL), the returned target handle will be a
+ * sentinel value representing the master (whichever it may be)
+ *
+ * @param[out] o_masterProcChipTarget Target handle referring to the
+ * current master processor chip (the one connected to PNOR)
+ * @param[in] i_pNodeTarget
+ * Handle to the node target to search for the acting master
+ * processor. If NULL, HB will search whatever node it's
+ * running on, and FSP will search the physical drawer containing
+ * the lowest ordered fabric node ID. *
+ * @pre Target Service must be initialized
+ *
+ * @post Master processor chip target returned or NULL is returned if
+ * targetservice is not yet initialized or user passed an invalid node
+ * target to get the master proc handle
+ */
+ virtual void masterProcChipTargetHandle(
+ TARGETING::Target*& o_masterProcChipTargetHandle,
+ const TARGETING::Target* i_pNodeTarget = NULL) const;
+
+ /**
* @brief installTargetService
*
* Make this the active target service implementation.
@@ -413,6 +471,14 @@ inline bool TargetService::getAttribute(
return iv_impl->getAttribute(i_attribute, i_target, o_val);
}
+inline void TargetService::masterProcChipTargetHandle(
+ TARGETING::Target*& o_masterProcChipTargetHandle,
+ const TARGETING::Target* i_pNodeTarget) const
+{
+ iv_impl->masterProcChipTargetHandle(o_masterProcChipTargetHandle,
+ i_pNodeTarget );
+}
+
inline void TargetService::setImpl(TargetServiceImpl & i_impl)
{
iv_impl = &i_impl;
diff --git a/src/usr/diag/attn/ipl/attn.C b/src/usr/diag/attn/ipl/attn.C
index dac127d56..b2b18e3cd 100644
--- a/src/usr/diag/attn/ipl/attn.C
+++ b/src/usr/diag/attn/ipl/attn.C
@@ -84,8 +84,6 @@ errlHndl_t checkForIplAttentions()
// testing purposes. However for this case
// of getting an attribute, we can just
// modify the attribute for testing.
- // For the master proc, I don't think we
- // really need to alter it for testing.
// ------------------------------------------------
// We have an ATTRIBUTE that indicates all procs
@@ -98,9 +96,9 @@ errlHndl_t checkForIplAttentions()
// Do we want to check ALL procs ?
if (0 == l_useAllProcs)
{
- // Just the master (so early IPL)
- TARGETING::targetService().masterProcChipTargetHandle(
- l_MasterProcTarget);
+ getTargetService().masterProcChipTargetHandle(
+ l_MasterProcTarget);
+
list.push_back(l_MasterProcTarget);
} // end if just master proc
else
diff --git a/src/usr/diag/attn/ipl/test/attnfakesys.C b/src/usr/diag/attn/ipl/test/attnfakesys.C
index b2ef23f4c..c01bcc95c 100644
--- a/src/usr/diag/attn/ipl/test/attnfakesys.C
+++ b/src/usr/diag/attn/ipl/test/attnfakesys.C
@@ -1,11 +1,11 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: src/usr/diag/attn/hostboot/test/attnfakesys.C $ */
+/* $Source: src/usr/diag/attn/ipl/test/attnfakesys.C $ */
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2014 */
+/* Contributors Listed Below - COPYRIGHT 2014,2016 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -53,6 +53,8 @@ errlHndl_t FakeSystem::putScom(
mutex_lock(&iv_mutex);
+ ATTN_TRACE("FakeSystem::putScom Target:%d Addr:%X",
+ i_target, i_address);
err = putReg(i_target, i_address, i_data);
mutex_unlock(&iv_mutex);
@@ -67,6 +69,9 @@ errlHndl_t FakeSystem::getScom(
{
mutex_lock(&iv_mutex);
+
+ ATTN_TRACE("FakeSystem::getScom Target:%d Addr:%X",
+ i_target, i_address);
o_data = getReg(i_target, i_address);
mutex_unlock(&iv_mutex);
@@ -106,6 +111,7 @@ bool FakeSystem::wait(uint64_t i_maxWaitNs)
previous = count;
count = iv_attentions.size();
+ ATTN_TRACE("FakeSystem::wait attnCount:%d", count);
mutex_unlock(&iv_mutex);
@@ -132,6 +138,8 @@ void FakeSystem::wait()
while(!iv_attentions.empty())
{
+ ATTN_TRACE("FakeSystem::wait attnCount:%d",
+ iv_attentions.size());
sync_cond_wait(&iv_cond, &iv_mutex);
}
@@ -181,7 +189,7 @@ void FakeSystem::putRegUnsafe(
uint64_t i_address,
uint64_t i_data)
{
- ATTN_DBG("FakeSystem::putReg: tgt: %p, add: %016x, data: %016x",
+ ATTN_TRACE("FakeSystem::putReg: tgt: %p, add: %016x, data: %016x",
i_target, i_address, i_data);
iv_regs[i_target][i_address] = i_data;
@@ -288,6 +296,9 @@ errlHndl_t FakeSystem::makeAttnCallbacks(
if(k.first == TYPE_NA
|| (k.first == type && k.second == ait->attnType))
{
+ ATTN_TRACE("FakeSystem::makeAttnCallbacks i_set:%d",
+ i_set);
+
if(i_set)
{
err = (*it->second).processPutAttention(
@@ -326,7 +337,7 @@ errlHndl_t FakeSystem::putAttentions(
while(ait != i_list.end())
{
- ATTN_DBG("FakeSystem::putAttention: tgt: %p, type: %d",
+ ATTN_TRACE("FakeSystem::putAttention: tgt: %p, type: %d",
ait->targetHndl, ait->attnType);
iv_attentions[*ait]++;
@@ -343,7 +354,7 @@ errlHndl_t FakeSystem::putAttentions(
void FakeSystem::clearAttentionUnsafe(
const AttnData & i_attn)
{
- ATTN_DBG("FakeSystem::clearAttention: tgt: %p, type: %d",
+ ATTN_TRACE("FakeSystem::clearAttnUnsafe: tgt: %p, type: %d",
i_attn.targetHndl, i_attn.attnType);
// clear the attention and then
@@ -437,7 +448,7 @@ void FakeSystem::dump()
while(it != iv_attentions.end())
{
- ATTN_DBG("target: %p, type: %d, count: %d",
+ ATTN_TRACE("target: %p, type: %d, count: %d",
it->first.targetHndl, it->first.attnType, it->second);
++it;
diff --git a/src/usr/diag/attn/ipl/test/attnfaketarget.C b/src/usr/diag/attn/ipl/test/attnfaketarget.C
index 9a4d5814a..2f678ca16 100644
--- a/src/usr/diag/attn/ipl/test/attnfaketarget.C
+++ b/src/usr/diag/attn/ipl/test/attnfaketarget.C
@@ -74,6 +74,18 @@ void FakeProcTargetService::getAllChips(
}
}
+void FakeProcTargetService::masterProcChipTargetHandle(
+ TARGETING::Target*& o_masterProcChipTargetHandle,
+ const TARGETING::Target* i_pNodeTarget) const
+{
+ ATTN_TRACE("FakeProc :: masterProcChipTargetHandle has %d",
+ iv_procs[0] );
+
+ // We just use the first proc(value 0) as the MASTER proc
+ o_masterProcChipTargetHandle = iv_procs[0];
+}
+
+
bool FakeProcTargetService::getAttribute(
TARGETING::ATTRIBUTE_ID i_attribute,
TARGETING::TargetHandle_t i_target,
diff --git a/src/usr/diag/attn/ipl/test/attnfaketarget.H b/src/usr/diag/attn/ipl/test/attnfaketarget.H
index b49c5bfe8..572eb6843 100644
--- a/src/usr/diag/attn/ipl/test/attnfaketarget.H
+++ b/src/usr/diag/attn/ipl/test/attnfaketarget.H
@@ -1,11 +1,11 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: src/usr/diag/attn/hostboot/test/attnfaketarget.H $ */
+/* $Source: src/usr/diag/attn/ipl/test/attnfaketarget.H $ */
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2014 */
+/* Contributors Listed Below - COPYRIGHT 2014,2016 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -209,6 +209,10 @@ class FakeProcTargetService : public TargetServiceImpl
TARGETING::TargetHandle_t i_target,
uint64_t & o_val);
+ virtual void masterProcChipTargetHandle(
+ TARGETING::Target*& o_masterProcChipTargetHandle,
+ const TARGETING::Target* i_pNodeTarget = NULL) const;
+
/**
* @brief dtor
*/
diff --git a/src/usr/diag/attn/ipl/test/attnrandsource.C b/src/usr/diag/attn/ipl/test/attnrandsource.C
index 81bd03002..3e9654fe5 100644
--- a/src/usr/diag/attn/ipl/test/attnrandsource.C
+++ b/src/usr/diag/attn/ipl/test/attnrandsource.C
@@ -1,11 +1,11 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: src/usr/diag/attn/hostboot/test/attnrandsource.C $ */
+/* $Source: src/usr/diag/attn/ipl/test/attnrandsource.C $ */
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2014 */
+/* Contributors Listed Below - COPYRIGHT 2014,2016 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -113,6 +113,8 @@ void RandSource::run()
d.attnType = getRandomAttentionType();
l.push_back(d);
+ ATTN_TRACE("RandSource:run, Type:%d, Count:%d Iterations:%d",
+ d.attnType, count, iterations );
}
iv_injectSink->putAttentions(l);
diff --git a/src/usr/diag/attn/ipl/test/attntestipl.H b/src/usr/diag/attn/ipl/test/attntestipl.H
index a44b2fc4c..9a71f662b 100644
--- a/src/usr/diag/attn/ipl/test/attntestipl.H
+++ b/src/usr/diag/attn/ipl/test/attntestipl.H
@@ -42,6 +42,7 @@
#include "../../common/attnproc.H"
#include <cxxtest/TestSuite.H>
#include "../../common/attntrace.H"
+#include <targeting/common/targetservice.H>
using namespace ATTN;
using namespace TARGETING;
@@ -66,6 +67,18 @@ class AttnCheckForIplAttentionsTest : public CxxTest::TestSuite
static const uint64_t targetPoolSize = 8;
static const uint64_t iterations = 100;
static const uint64_t maxAttnsPerIteration = 5;
+ uint8_t l_useAllProcs = 0;
+ uint8_t l_saveAttrProcs = 0;
+ TARGETING::Target *l_sys = NULL;
+
+
+ // We have an ATTRIBUTE that indicates all procs
+ // or just the master proc.
+ TARGETING::targetService().getTopLevelTarget( l_sys );
+ assert(l_sys != NULL);
+ // want to save/restore this
+ l_sys->tryGetAttr<ATTR_ATTN_CHK_ALL_PROCS>(l_saveAttrProcs);
+ l_sys->trySetAttr<ATTR_ATTN_CHK_ALL_PROCS>(l_useAllProcs);
errlHndl_t err = 0;
@@ -95,7 +108,7 @@ class AttnCheckForIplAttentionsTest : public CxxTest::TestSuite
maxAttnsPerIteration,
system,
&procs[0],
- &procs[0] + procs.size());
+ &procs[0] + 1); // just one proc
targetSvc.installTargetService();
@@ -129,8 +142,107 @@ class AttnCheckForIplAttentionsTest : public CxxTest::TestSuite
} while(0);
+ // Put back the attribute's original value
+ l_sys->trySetAttr<ATTR_ATTN_CHK_ALL_PROCS>(l_saveAttrProcs);
+
ATTN_SLOW(EXIT_MRK "AttnCheckForIplAttentionsTest::"
"testCheckForIplAttentions");
}
+
+ /**
+ * @brief testCheckForIplAttentions Unit test for the
+ * check for ipl attentions module.
+ */
+ void testCheckForIplAttentionsAllProcs(void)
+ {
+ ATTN_SLOW(ENTER_MRK "AttnCheckForIplAttentionsTest::"
+ "testCheckForIplAttentionsAllProcs");
+
+ static const uint64_t targetPoolSize = 8;
+ static const uint64_t iterations = 100;
+ static const uint64_t maxAttnsPerIteration = 5;
+ uint8_t l_useAllProcs = 1;
+ uint8_t l_saveAttrProcs = 0;
+ TARGETING::Target *l_sys = NULL;
+
+
+ // We have an ATTRIBUTE that indicates all procs
+ // or just the master proc.
+ TARGETING::targetService().getTopLevelTarget( l_sys );
+ assert(l_sys != NULL);
+ // want to save/restore this
+ l_sys->tryGetAttr<ATTR_ATTN_CHK_ALL_PROCS>(l_saveAttrProcs);
+ l_sys->trySetAttr<ATTR_ATTN_CHK_ALL_PROCS>(l_useAllProcs);
+
+ errlHndl_t err = 0;
+
+ FakeSystem system;
+
+ FakeGfir xstpGfir(CHECK_STOP),
+ spclGfir(SPECIAL),
+ recGfir(RECOVERABLE),
+ lxstpGfir(UNIT_CS),
+ hostGfir((PRDF::ATTENTION_VALUE_TYPE)HOST_ATTN);
+
+ xstpGfir.install(system);
+ spclGfir.install(system);
+ recGfir.install(system);
+ lxstpGfir.install(system);
+ hostGfir.install(system);
+
+ // No Centaurs to mess with for now
+
+ system.installScomImpl();
+ FakeMemTargetService targetSvc(targetPoolSize);
+
+ TargetHandleList procs;
+ targetSvc.getAllChips(procs, TYPE_PROC);
+
+ RandSource procSource(iterations,
+ maxAttnsPerIteration,
+ system,
+ &procs[0],
+ &procs[0] + procs.size()); // many procs possible
+
+
+ targetSvc.installTargetService();
+
+ FakePrd prd(system);
+
+ prd.installPrd();
+ getProcOps().enable();
+
+ do
+ {
+ procSource.run();
+
+ err = checkForIplAttentions();
+
+ if(err)
+ {
+ TS_FAIL("unexpected error checking for ALL ipl attns.");
+ break;
+ }
+
+ uint64_t count = system.count();
+ if(count)
+ {
+ TS_FAIL("%d unexpected attentions present after check for "
+ "ALL ipl attentions.", count);
+
+ system.dump();
+ break;
+ }
+
+ } while(0);
+
+ // Put back the attribute's original value
+ l_sys->trySetAttr<ATTR_ATTN_CHK_ALL_PROCS>(l_saveAttrProcs);
+
+ ATTN_SLOW(EXIT_MRK "AttnCheckForIplAttentionsTest::"
+ "testCheckForIplAttentionsAllProcs");
+ }
+
+
};
#endif
diff --git a/src/usr/diag/attn/runtime/test/attntestRtAttns.H b/src/usr/diag/attn/runtime/test/attntestRtAttns.H
index b489bb262..6e22b094e 100644
--- a/src/usr/diag/attn/runtime/test/attntestRtAttns.H
+++ b/src/usr/diag/attn/runtime/test/attntestRtAttns.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2014 */
+/* Contributors Listed Below - COPYRIGHT 2014,2016 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -126,6 +126,7 @@ class AttnCheckForRtAttentionsTest : public CxxTest::TestSuite
ATTN_SLOW(ENTER_MRK "AttnCheckForRtAttentionsTest::"
"testCheckForCenAttentions");
+#if 0 // Don't have any Centaurs yet -- so wait. @TODO:RTC 159174
FakePrd prd;
prd.installPrd();
FakeRegSvc fakeRegs;
@@ -164,7 +165,7 @@ class AttnCheckForRtAttentionsTest : public CxxTest::TestSuite
// Set the error for 4th Centaur
putScom( proc, 0x2000001, 0x0010000000000000ull );
- putScom( mcs, 0x2011840, 0x0009000000000000ull );
+ putScom( mcs, 0x2011840, 0x0009000000000000ull );
AttentionList expAttn;
PRDF::AttnData attn ( mb, RECOVERABLE );
@@ -187,9 +188,12 @@ class AttnCheckForRtAttentionsTest : public CxxTest::TestSuite
break;
}
}while (0);
+#endif // We don't have any Centaurs at this point in P9
ATTN_SLOW(EXIT_MRK "AttnCheckForRtAttentionsTest::"
"testCheckForCenAttentions");
}
+
+
};
#endif
diff --git a/src/usr/diag/attn/runtime/test/makefile b/src/usr/diag/attn/runtime/test/makefile
index 4f1e7a6f4..159b6db05 100644
--- a/src/usr/diag/attn/runtime/test/makefile
+++ b/src/usr/diag/attn/runtime/test/makefile
@@ -35,6 +35,6 @@ OBJS += attnfakereg.o
MODULE = testattn_rt
-#TESTS = *.H @RTC 155588 re-enable after cleaning up for P9
+TESTS = *.H
include ${ROOTPATH}/config.mk
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