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| author | Benjamin Weisenbeck <bweisenb@us.ibm.com> | 2015-11-13 11:49:38 -0600 |
|---|---|---|
| committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2015-12-08 10:39:26 -0600 |
| commit | 215d2de1d080b7d282725badabd5cf1ebf012c8d (patch) | |
| tree | 0119e2cd283e74bca548cab279ec892de4178e3a /src/usr/diag | |
| parent | cae9a269ac8a84a216543e4323fddddd868d7d01 (diff) | |
| download | talos-hostboot-215d2de1d080b7d282725badabd5cf1ebf012c8d.tar.gz talos-hostboot-215d2de1d080b7d282725badabd5cf1ebf012c8d.zip | |
PRD: Fix buffer overrun in errl parsing for ddr4
Change-Id: Ic7a728ef9509f3a2c359e97f90a1c5d35e2c38bc
CQ: SW328742
Backport: master-p8
Backport: release-fips840
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22026
Tested-by: Jenkins Server
Reviewed-by: BENJAMIN J. WEISENBECK <bweisenb@us.ibm.com>
Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Reviewed-by: Zane Shelley <zshelle@us.ibm.com>
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22253
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22366
Tested-by: Jenkins OP Build CI
Tested-by: Jenkins OP HW
Tested-by: FSP CI Jenkins
Diffstat (limited to 'src/usr/diag')
3 files changed, 10 insertions, 6 deletions
diff --git a/src/usr/diag/prdf/common/framework/service/prdfRasServices_common.C b/src/usr/diag/prdf/common/framework/service/prdfRasServices_common.C index 5f599d114..5f55524e3 100644 --- a/src/usr/diag/prdf/common/framework/service/prdfRasServices_common.C +++ b/src/usr/diag/prdf/common/framework/service/prdfRasServices_common.C @@ -659,6 +659,9 @@ errlHndl_t ErrDataService::GenerateSrcPfa( ATTENTION_TYPE i_attnType, // Get the 32 bit representation of MemMru l_memData.memMru32bits = memMru.toUint32(); + // Get the DRAM width. + l_memData.isX4 = isDramWidthX4( l_mba ) ? 1 : 0; + // Add mapping to ELOG and parser will print it PRDF_ADD_FFDC( iv_errl, (const char*)(&l_memData), sizeof(memMruDqInfo), diff --git a/src/usr/diag/prdf/common/plugins/prdfCenLogParse.C b/src/usr/diag/prdf/common/plugins/prdfCenLogParse.C index 83edbc4b5..734c21262 100644 --- a/src/usr/diag/prdf/common/plugins/prdfCenLogParse.C +++ b/src/usr/diag/prdf/common/plugins/prdfCenLogParse.C @@ -2799,8 +2799,8 @@ void getBadDqBitmapEntry( uint8_t * i_buffer, char * o_str ) int32_t getMemMruDramSite( memMruDqInfo &i_memDqStruct, char * o_data ) { - char l_dqMapBuffer[4]; - memset (l_dqMapBuffer, 0, 4); + char l_dqMapBuffer[10]; + memset (l_dqMapBuffer, 0, 10); int32_t o_rc = SUCCESS; MemoryMruData::MemMruMeld mm; mm.u = i_memDqStruct.memMru32bits; @@ -2817,7 +2817,6 @@ int32_t getMemMruDramSite( memMruDqInfo &i_memDqStruct, uint8_t mrank = mm.s.mrank; // Get the DRAM site location information. - bool x4Dram; const char * cardName; const char ** dramMap; const char ** dqMap; @@ -2825,6 +2824,7 @@ int32_t getMemMruDramSite( memMruDqInfo &i_memDqStruct, // This routine will only succeed on CDIMMs if (i_memDqStruct.bufferedDimm) { + bool x4Dram = false; // Not used in this function. o_rc = getDramSiteInfo( type, mbaPos, ps, mrank, x4Dram, cardName, dqMap, dramMap ); } @@ -2835,7 +2835,7 @@ int32_t getMemMruDramSite( memMruDqInfo &i_memDqStruct, uint8_t dqIdx = transDramSpare( symbol2CenDq(symbol), mm.s.dramSpared ); - uint8_t dramIdx = dqSiteIdx2DramSiteIdx( dqIdx, x4Dram ); + uint8_t dramIdx = dqSiteIdx2DramSiteIdx( dqIdx, i_memDqStruct.isX4 ); // Add the DRAM site data based on the pin info. strcpy( o_data, "" ); diff --git a/src/usr/diag/prdf/common/plugins/prdfMemoryMruData.H b/src/usr/diag/prdf/common/plugins/prdfMemoryMruData.H index 136f0994e..a3b4caaf0 100644 --- a/src/usr/diag/prdf/common/plugins/prdfMemoryMruData.H +++ b/src/usr/diag/prdf/common/plugins/prdfMemoryMruData.H @@ -42,8 +42,9 @@ struct memMruDqInfo { uint32_t memMru32bits; // 32 bit MemoryMru format uint32_t cardType :8; // cardType for Centaur DIMMs - uint32_t bufferedDimm :1; // Centaur DIMM (1) or IS DIMM (0) - uint32_t reserved :23; // Future use / nice boundary + uint32_t bufferedDimm :1; // 1=Centaur DIMM, 0=IS DIMM + uint32_t isX4 :1; // 1=x4 DRAM DIMM, 0=x8 DRAM DIMM + uint32_t reserved :22; // Future use / nice boundary uint8_t dqMapping[80]; // CenDQ to DimmDQ mapping }; |
