diff options
author | Zane Shelley <zshelle@us.ibm.com> | 2014-08-21 16:29:51 -0500 |
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committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2014-09-02 09:22:12 -0500 |
commit | d84607f5b5d28f77935d0f615b39a12c9759584c (patch) | |
tree | 1c02d83074d38ca9cb4f9e621fe9fbbe306393a6 /src/usr/diag/prdf | |
parent | 0c07aa8e008f340b4258241a6c387e02b950e2bd (diff) | |
download | talos-hostboot-d84607f5b5d28f77935d0f615b39a12c9759584c.tar.gz talos-hostboot-d84607f5b5d28f77935d0f615b39a12c9759584c.zip |
PRD: Add support to resume TD command for VCM and DSD procedures
Change-Id: I2556432e02365cf1e743436ac4135865bca14e24
CQ: SW274193
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/12946
Reviewed-by: Christopher T. Phan <cphan@us.ibm.com>
Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com>
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Reviewed-by: Zane Shelley <zshelle@us.ibm.com>
Squashed: I476c0fa0de33f11fb8aa23fe48965694c68aeaf0
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/13079
Diffstat (limited to 'src/usr/diag/prdf')
6 files changed, 324 insertions, 44 deletions
diff --git a/src/usr/diag/prdf/common/plat/pegasus/prdfCenMbaTdCtlr_common.H b/src/usr/diag/prdf/common/plat/pegasus/prdfCenMbaTdCtlr_common.H index e78828fdb..b98394547 100644 --- a/src/usr/diag/prdf/common/plat/pegasus/prdfCenMbaTdCtlr_common.H +++ b/src/usr/diag/prdf/common/plat/pegasus/prdfCenMbaTdCtlr_common.H @@ -5,7 +5,9 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* COPYRIGHT International Business Machines Corp. 2013,2014 */ +/* Contributors Listed Below - COPYRIGHT 2013,2014 */ +/* [+] International Business Machines Corp. */ +/* */ /* */ /* Licensed under the Apache License, Version 2.0 (the "License"); */ /* you may not use this file except in compliance with the License. */ @@ -200,52 +202,80 @@ class CenMbaTdCtlrCommon * function will check for any ECC errors, unverified chip marks from a * reset/reload, etc. and starts any TD procedures, if necessary. * - * @param io_sc The step code data struct. + * @param io_sc The step code data struct. + * @param i_stopAddr The address in which the command stopped. + * @param i_endAddr The address set in the MBMEA. * @return Non-SUCCESS if an internal function fails, SUCCESS otherwise. */ - virtual int32_t analyzeCmdComplete( STEP_CODE_DATA_STRUCT & io_sc ) = 0; + virtual int32_t analyzeCmdComplete( STEP_CODE_DATA_STRUCT & io_sc, + const CenAddr & i_stopAddr, + const CenAddr & i_endAddr ) = 0; /** * @brief Analyzes VCM Phase 1 results and moves state machine. - * @param io_sc The step code data struct. + * @param io_sc The step code data struct. + * @param i_stopAddr The address in which the command stopped. + * @param i_endAddr The address set in the MBMEA. * @return Non-SUCCESS if an internal function fails, SUCCESS otherwise. */ - virtual int32_t analyzeVcmPhase1( STEP_CODE_DATA_STRUCT & io_sc ) = 0; + virtual int32_t analyzeVcmPhase1( STEP_CODE_DATA_STRUCT & io_sc, + const CenAddr & i_stopAddr, + const CenAddr & i_endAddr ) = 0; /** * @brief Analyzes VCM Phase 2 results and moves state machine. - * @param io_sc The step code data struct. + * @param io_sc The step code data struct. + * @param i_stopAddr The address in which the command stopped. + * @param i_endAddr The address set in the MBMEA. * @return Non-SUCCESS if an internal function fails, SUCCESS otherwise. */ - virtual int32_t analyzeVcmPhase2( STEP_CODE_DATA_STRUCT & io_sc ) = 0; + virtual int32_t analyzeVcmPhase2( STEP_CODE_DATA_STRUCT & io_sc, + const CenAddr & i_stopAddr, + const CenAddr & i_endAddr ) = 0; /** * @brief Analyzes DSD Phase 1 results and moves state machine. - * @param io_sc The step code data struct. + * @param io_sc The step code data struct. + * @param i_stopAddr The address in which the command stopped. + * @param i_endAddr The address set in the MBMEA. * @return Non-SUCCESS if an internal function fails, SUCCESS otherwise. */ - virtual int32_t analyzeDsdPhase1( STEP_CODE_DATA_STRUCT & io_sc ) = 0; + virtual int32_t analyzeDsdPhase1( STEP_CODE_DATA_STRUCT & io_sc, + const CenAddr & i_stopAddr, + const CenAddr & i_endAddr ) = 0; /** * @brief Analyzes DSD Phase 2 results and moves state machine. - * @param io_sc The step code data struct. + * @param io_sc The step code data struct. + * @param i_stopAddr The address in which the command stopped. + * @param i_endAddr The address set in the MBMEA. * @return Non-SUCCESS if an internal function fails, SUCCESS otherwise. */ - virtual int32_t analyzeDsdPhase2( STEP_CODE_DATA_STRUCT & io_sc ) = 0; + virtual int32_t analyzeDsdPhase2( STEP_CODE_DATA_STRUCT & io_sc, + const CenAddr & i_stopAddr, + const CenAddr & i_endAddr ) = 0; /** * @brief Analyzes Tps Phase 1 results and moves state machine. - * @param io_sc The step code data struct. + * @param io_sc The step code data struct. + * @param i_stopAddr The address in which the command stopped. + * @param i_endAddr The address set in the MBMEA. * @return Non-SUCCESS if an internal function fails, SUCCESS otherwise. */ - virtual int32_t analyzeTpsPhase1( STEP_CODE_DATA_STRUCT & io_sc ) = 0; + virtual int32_t analyzeTpsPhase1( STEP_CODE_DATA_STRUCT & io_sc, + const CenAddr & i_stopAddr, + const CenAddr & i_endAddr ) = 0; /** * @brief Analyzes Tps Phase 2 results and moves state machine. - * @param io_sc The step code data struct. + * @param io_sc The step code data struct. + * @param i_stopAddr The address in which the command stopped. + * @param i_endAddr The address set in the MBMEA. * @return Non-SUCCESS if an internal function fails, SUCCESS otherwise. */ - virtual int32_t analyzeTpsPhase2( STEP_CODE_DATA_STRUCT & io_sc ) = 0; + virtual int32_t analyzeTpsPhase2( STEP_CODE_DATA_STRUCT & io_sc, + const CenAddr & i_stopAddr, + const CenAddr & i_endAddr ) = 0; /** * @brief Starts VCM Phase 1. diff --git a/src/usr/diag/prdf/common/plugins/prdfCenLogParse.C b/src/usr/diag/prdf/common/plugins/prdfCenLogParse.C index 428850151..caafd6e69 100644 --- a/src/usr/diag/prdf/common/plugins/prdfCenLogParse.C +++ b/src/usr/diag/prdf/common/plugins/prdfCenLogParse.C @@ -31,8 +31,9 @@ #include <errlusrparser.H> #include <cstring> +#include <UtilHash.H> #include <utilmem.H> -#include <iipconst.h> +#include <iipconst.h> #include <prdfDramRepairUsrData.H> #include <prdfMemoryMruData.H> #include <prdfParserEnums.H> @@ -2155,6 +2156,189 @@ bool parseBadDqBitmap( uint8_t * i_buffer, uint32_t i_buflen, //------------------------------------------------------------------------------ +bool parseTdCtlrStateData( uint8_t * i_buffer, uint32_t i_buflen, + ErrlUsrParser & i_parser, uint32_t i_sigId ) +{ + bool o_rc = true; + + if ( Util::hashString("TDCTLR_STATE_DATA_START") == i_sigId ) + i_parser.PrintString( " TDCTLR_STATE_DATA_START", "" ); + else if ( Util::hashString("TDCTLR_STATE_DATA_END") == i_sigId ) + i_parser.PrintString( " TDCTLR_STATE_DATA_END", "" ); + + // These are copies of the enums in prdfCenMbaTdCtlr_common.H. This is not + // elegant nor robust. It is a quick fix simply to deliver this parser code + // quickly. We can make a better fix later. + enum + { + VCM_EVENT = 0, + TPS_EVENT, + + NO_OP = 0, + VCM_PHASE_1, + VCM_PHASE_2, + DSD_PHASE_1, + DSD_PHASE_2, + TPS_PHASE_1, + TPS_PHASE_2, + }; + + uint32_t idx = 0; + + do + { + if ( NULL == i_buffer ) { o_rc = false; break; } + + //###################################################################### + // Header data (4 bytes) + //###################################################################### + + if ( i_buflen < (idx + 4) ) { o_rc = false; break; } + + uint8_t rescount = i_buffer[idx]; + uint8_t badRankMask = i_buffer[idx+1]; + uint8_t state = (i_buffer[idx+2] >> 4) & 0xf; + uint8_t mrnk = (i_buffer[idx+2] >> 1) & 0x7; + uint8_t fetchMsk = i_buffer[idx+2] & 0x1; + uint8_t srnk = (i_buffer[idx+3] >> 5) & 0x7; + + idx += 4; + + const char * state_str = " "; + switch ( state ) + { + case NO_OP: state_str = "NO_OP "; break; + case VCM_PHASE_1: state_str = "VCM_PHASE_1"; break; + case VCM_PHASE_2: state_str = "VCM_PHASE_2"; break; + case DSD_PHASE_1: state_str = "DSD_PHASE_1"; break; + case DSD_PHASE_2: state_str = "DSD_PHASE_2"; break; + case TPS_PHASE_1: state_str = "TPS_PHASE_1"; break; + case TPS_PHASE_2: state_str = "TPS_PHASE_2"; break; + } + + char rank_str[DATA_SIZE] = " "; + switch ( state ) + { + case VCM_PHASE_1: case VCM_PHASE_2: + case DSD_PHASE_1: case DSD_PHASE_2: + snprintf( rank_str, DATA_SIZE, "m%d ", mrnk ); break; + case TPS_PHASE_1: case TPS_PHASE_2: + snprintf( rank_str, DATA_SIZE, "m%ds%d", mrnk, srnk ); break; + } + + i_parser.PrintString( " TD State", state_str ); + i_parser.PrintString( " Target Rank", rank_str ); + i_parser.PrintNumber( " Resume Counter", "0x%02X", rescount ); + i_parser.PrintBool( " Fetch Attns Masked", 0 != fetchMsk ); + i_parser.PrintNumber( " Bad Master Ranks", "0x%02X", badRankMask ); + + //###################################################################### + // TD Request Queue (min 1 byte, max 33 bytes) + //###################################################################### + + if ( i_buflen < (idx + 1) ) { o_rc = false; break; } + + uint8_t dataCount = i_buffer[idx] * 2; + idx += 1; + + if ( i_buflen < (idx + dataCount) ) { o_rc = false; break; } + + for ( uint8_t i = 0; i < dataCount; i += 2 ) + { + uint8_t type = i_buffer[idx+i]; + uint8_t mr = (i_buffer[idx+i+1] >> 5) & 0x7; + uint8_t sr = (i_buffer[idx+i+1] >> 2) & 0x7; + + const char * type_str = " "; + switch ( type ) + { + case VCM_EVENT: type_str = "VCM_EVENT"; break; + case TPS_EVENT: type_str = "TPS_EVENT"; break; + } + + char rank_str[DATA_SIZE] = " "; + switch ( type ) + { + case VCM_EVENT: + snprintf( rank_str, DATA_SIZE, "m%d ", mr ); break; + case TPS_EVENT: + snprintf( rank_str, DATA_SIZE, "m%ds%d", mr, sr ); break; + } + + char data[DATA_SIZE] = ""; + snprintf( data, DATA_SIZE, "%s on %s", type_str, rank_str ); + + i_parser.PrintString( " TD Request", data ); + } + + idx += dataCount; + + //###################################################################### + // VCM Rank Data (min 1 byte, max 17 bytes) + //###################################################################### + + if ( i_buflen < (idx + 1) ) { o_rc = false; break; } + + dataCount = i_buffer[idx] * 2; + idx += 1; + + if ( i_buflen < (idx + dataCount) ) { o_rc = false; break; } + + for ( uint8_t i = 0; i < dataCount; i += 2 ) + { + uint8_t faCount = i_buffer[idx+i]; + uint8_t mr = (i_buffer[idx+i+1] >> 5) & 0x7; + + char data[DATA_SIZE] = ""; + snprintf( data, DATA_SIZE, + "rank=m%d FA count=0x%02x", + mr, faCount ); + + i_parser.PrintString( " VCM Rank Data", data ); + } + + idx += dataCount; + + //###################################################################### + // TPS Rank Data (min 1 byte, max 129 bytes) + //###################################################################### + + if ( i_buflen < (idx + 1) ) { o_rc = false; break; } + + dataCount = i_buffer[idx] * 2; + idx += 1; + + if ( i_buflen < (idx + dataCount) ) { o_rc = false; break; } + + for ( uint8_t i = 0; i < dataCount; i += 2 ) + { + uint8_t faCount = i_buffer[idx+i]; + uint8_t mr = (i_buffer[idx+i+1] >> 5) & 0x7; + uint8_t sr = (i_buffer[idx+i+1] >> 2) & 0x7; + uint8_t isBan = (i_buffer[idx+i+1] >> 1) & 0x1; + + char data[DATA_SIZE] = ""; + snprintf( data, DATA_SIZE, + "rank=m%ds%d FA count=0x%02x banned=%s", + mr, sr, faCount, (0 != isBan) ? "true" : "false" ); + + i_parser.PrintString( " TPS Rank Data", data ); + } + + idx += dataCount; + + } while (0); + + if ( !o_rc ) + { + i_parser.PrintHexDump(i_buffer, i_buflen); + } + + return o_rc; +} + +//------------------------------------------------------------------------------ + } // namespace FSP/HOSTBBOT } // end namespace PRDF diff --git a/src/usr/diag/prdf/common/plugins/prdfCenLogParse.H b/src/usr/diag/prdf/common/plugins/prdfCenLogParse.H index 00fee94ff..b5385bfb7 100644 --- a/src/usr/diag/prdf/common/plugins/prdfCenLogParse.H +++ b/src/usr/diag/prdf/common/plugins/prdfCenLogParse.H @@ -5,7 +5,9 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* COPYRIGHT International Business Machines Corp. 2003,2014 */ +/* Contributors Listed Below - COPYRIGHT 2013,2014 */ +/* [+] International Business Machines Corp. */ +/* */ /* */ /* Licensed under the Apache License, Version 2.0 (the "License"); */ /* you may not use this file except in compliance with the License. */ @@ -107,6 +109,16 @@ bool parseDramRepairsVpd( uint8_t * i_buffer, uint32_t i_buflen, bool parseBadDqBitmap( uint8_t * i_buffer, uint32_t i_buflen, ErrlUsrParser & i_parser ); +/** + * @brief Parses TD Controller state data. + * @param i_buffer The data buffer. + * @param i_buflen The buffer length. + * @param i_parser The error log parser. + * @param i_sigId The signature ID. + */ +bool parseTdCtlrStateData( uint8_t * i_buffer, uint32_t i_buflen, + ErrlUsrParser & i_parser, uint32_t i_sigId ); + } // namespace FSP/HOSTBBOT } // end namespace PRDF diff --git a/src/usr/diag/prdf/common/plugins/prdfLogParse_common.C b/src/usr/diag/prdf/common/plugins/prdfLogParse_common.C index 8aa712238..ba166d5a0 100644 --- a/src/usr/diag/prdf/common/plugins/prdfLogParse_common.C +++ b/src/usr/diag/prdf/common/plugins/prdfLogParse_common.C @@ -370,6 +370,11 @@ bool parseCaptureData( void * i_buffer, uint32_t i_buflen, { parseBadDqBitmap( sigData, sigDataSize, i_parser ); } + else if ( (Util::hashString("TDCTLR_STATE_DATA_START") == sigId) || + (Util::hashString("TDCTLR_STATE_DATA_END") == sigId) ) + { + parseTdCtlrStateData( sigData, sigDataSize, i_parser, sigId ); + } else if ( (0 != sigDataSize) && (sizeof(uint64_t) >= sigDataSize) ) { // Print one reg/line if the data size <= 8 bytes diff --git a/src/usr/diag/prdf/plat/pegasus/prdfCenMbaTdCtlr.C b/src/usr/diag/prdf/plat/pegasus/prdfCenMbaTdCtlr.C index d0f38439c..797b83510 100644 --- a/src/usr/diag/prdf/plat/pegasus/prdfCenMbaTdCtlr.C +++ b/src/usr/diag/prdf/plat/pegasus/prdfCenMbaTdCtlr.C @@ -5,7 +5,9 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* COPYRIGHT International Business Machines Corp. 2013,2014 */ +/* Contributors Listed Below - COPYRIGHT 2013,2014 */ +/* [+] International Business Machines Corp. */ +/* */ /* */ /* Licensed under the Apache License, Version 2.0 (the "License"); */ /* you may not use this file except in compliance with the License. */ @@ -101,6 +103,26 @@ int32_t CenMbaTdCtlr::handleCmdCompleteEvent( STEP_CODE_DATA_STRUCT & io_sc ) break; } + // Get address in which the command stopped and the end address. + // Some analysis is dependent on if the maintenance command has reached + // the end address or stopped in the middle. + CenAddr stopAddr; + o_rc = getCenMaintStartAddr( iv_mbaChip, stopAddr ); + if ( SUCCESS != o_rc ) + { + PRDF_ERR( PRDF_FUNC"getCenMaintStartAddr() failed" ); + break; + } + + CenAddr endAddr; + o_rc = getCenMaintEndAddr( iv_mbaChip, endAddr ); + if ( SUCCESS != o_rc ) + { + PRDF_ERR( PRDF_FUNC"getCenMaintEndAddr() failed" ); + break; + } + + // Call analysis function based on state. if ( NULL == cv_cmdCompleteFuncs[iv_tdState] ) { PRDF_ERR( PRDF_FUNC"Function for state %d not supported", @@ -108,7 +130,8 @@ int32_t CenMbaTdCtlr::handleCmdCompleteEvent( STEP_CODE_DATA_STRUCT & io_sc ) o_rc = FAIL; break; } - o_rc = (this->*cv_cmdCompleteFuncs[iv_tdState])( io_sc ); + o_rc = (this->*cv_cmdCompleteFuncs[iv_tdState])( io_sc, stopAddr, + endAddr ); if ( SUCCESS != o_rc ) { PRDF_ERR( PRDF_FUNC"Failed to continue analysis" ); @@ -320,7 +343,9 @@ int32_t CenMbaTdCtlr::initialize() //------------------------------------------------------------------------------ -int32_t CenMbaTdCtlr::analyzeCmdComplete( STEP_CODE_DATA_STRUCT & io_sc ) +int32_t CenMbaTdCtlr::analyzeCmdComplete( STEP_CODE_DATA_STRUCT & io_sc, + const CenAddr & i_stopAddr, + const CenAddr & i_endAddr ) { #define PRDF_FUNC "[CenMbaTdCtlr::analyzeCmdComplete] " @@ -334,15 +359,9 @@ int32_t CenMbaTdCtlr::analyzeCmdComplete( STEP_CODE_DATA_STRUCT & io_sc ) o_rc = FAIL; break; } - // Get the rank on which maintenance command stopped - CenAddr addr; - o_rc = getCenMaintStartAddr( iv_mbaChip, addr ); - if ( SUCCESS != o_rc ) - { - PRDF_ERR( PRDF_FUNC"cenGetMaintAddr() failed" ); - break; - } - iv_rank = CenRank( addr.getRank() ); + // Initialize iv_rank. This must be done before calling other + // functions as they require iv_rank to be accurate. + iv_rank = CenRank( i_stopAddr.getRank() ); // Get error condition which caused command to stop uint16_t eccErrorMask = NO_ERROR; @@ -399,7 +418,9 @@ int32_t CenMbaTdCtlr::analyzeCmdComplete( STEP_CODE_DATA_STRUCT & io_sc ) //------------------------------------------------------------------------------ -int32_t CenMbaTdCtlr::analyzeVcmPhase1( STEP_CODE_DATA_STRUCT & io_sc ) +int32_t CenMbaTdCtlr::analyzeVcmPhase1( STEP_CODE_DATA_STRUCT & io_sc, + const CenAddr & i_stopAddr, + const CenAddr & i_endAddr ) { #define PRDF_FUNC "[CenMbaTdCtlr::analyzeVcmPhase1] " @@ -455,7 +476,9 @@ int32_t CenMbaTdCtlr::analyzeVcmPhase1( STEP_CODE_DATA_STRUCT & io_sc ) //------------------------------------------------------------------------------ -int32_t CenMbaTdCtlr::analyzeVcmPhase2( STEP_CODE_DATA_STRUCT & io_sc ) +int32_t CenMbaTdCtlr::analyzeVcmPhase2( STEP_CODE_DATA_STRUCT & io_sc, + const CenAddr & i_stopAddr, + const CenAddr & i_endAddr ) { #define PRDF_FUNC "[CenMbaTdCtlr::analyzeVcmPhase2] " @@ -538,7 +561,9 @@ int32_t CenMbaTdCtlr::analyzeVcmPhase2( STEP_CODE_DATA_STRUCT & io_sc ) //------------------------------------------------------------------------------ -int32_t CenMbaTdCtlr::analyzeDsdPhase1( STEP_CODE_DATA_STRUCT & io_sc ) +int32_t CenMbaTdCtlr::analyzeDsdPhase1( STEP_CODE_DATA_STRUCT & io_sc, + const CenAddr & i_stopAddr, + const CenAddr & i_endAddr ) { #define PRDF_FUNC "[CenMbaTdCtlr::analyzeDsdPhase1] " @@ -594,7 +619,9 @@ int32_t CenMbaTdCtlr::analyzeDsdPhase1( STEP_CODE_DATA_STRUCT & io_sc ) //------------------------------------------------------------------------------ -int32_t CenMbaTdCtlr::analyzeDsdPhase2( STEP_CODE_DATA_STRUCT & io_sc ) +int32_t CenMbaTdCtlr::analyzeDsdPhase2( STEP_CODE_DATA_STRUCT & io_sc, + const CenAddr & i_stopAddr, + const CenAddr & i_endAddr ) { #define PRDF_FUNC "[CenMbaTdCtlr::analyzeDsdPhase2] " @@ -670,7 +697,9 @@ int32_t CenMbaTdCtlr::analyzeDsdPhase2( STEP_CODE_DATA_STRUCT & io_sc ) //------------------------------------------------------------------------------ -int32_t CenMbaTdCtlr::analyzeTpsPhase1( STEP_CODE_DATA_STRUCT & io_sc ) +int32_t CenMbaTdCtlr::analyzeTpsPhase1( STEP_CODE_DATA_STRUCT & io_sc, + const CenAddr & i_stopAddr, + const CenAddr & i_endAddr ) { #define PRDF_FUNC "[CenMbaTdCtlr::analyzeTpsPhase1] " @@ -745,7 +774,9 @@ int32_t CenMbaTdCtlr::analyzeTpsPhase1( STEP_CODE_DATA_STRUCT & io_sc ) //------------------------------------------------------------------------------ -int32_t CenMbaTdCtlr::analyzeTpsPhase2( STEP_CODE_DATA_STRUCT & io_sc ) +int32_t CenMbaTdCtlr::analyzeTpsPhase2( STEP_CODE_DATA_STRUCT & io_sc, + const CenAddr & i_stopAddr, + const CenAddr & i_endAddr ) { #define PRDF_FUNC "[CenMbaTdCtlr::analyzeTpsPhase2] " diff --git a/src/usr/diag/prdf/plat/pegasus/prdfCenMbaTdCtlr.H b/src/usr/diag/prdf/plat/pegasus/prdfCenMbaTdCtlr.H index f2122e3c0..242645132 100644 --- a/src/usr/diag/prdf/plat/pegasus/prdfCenMbaTdCtlr.H +++ b/src/usr/diag/prdf/plat/pegasus/prdfCenMbaTdCtlr.H @@ -5,7 +5,9 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* COPYRIGHT International Business Machines Corp. 2013,2014 */ +/* Contributors Listed Below - COPYRIGHT 2013,2014 */ +/* [+] International Business Machines Corp. */ +/* */ /* */ /* Licensed under the Apache License, Version 2.0 (the "License"); */ /* you may not use this file except in compliance with the License. */ @@ -41,7 +43,9 @@ class CenMbaTdCtlr : public CenMbaTdCtlrCommon private: // constants, enums // Function pointers for maintenance command complete events. - typedef int32_t (CenMbaTdCtlr::*FUNCS)( STEP_CODE_DATA_STRUCT & io_sc ); + typedef int32_t (CenMbaTdCtlr::*FUNCS)( STEP_CODE_DATA_STRUCT & io_sc, + const CenAddr & i_stopAddr, + const CenAddr & i_endAddr ); public: // functions @@ -70,13 +74,27 @@ class CenMbaTdCtlr : public CenMbaTdCtlrCommon int32_t initialize(); - int32_t analyzeCmdComplete( STEP_CODE_DATA_STRUCT & io_sc ); - int32_t analyzeVcmPhase1( STEP_CODE_DATA_STRUCT & io_sc ); - int32_t analyzeVcmPhase2( STEP_CODE_DATA_STRUCT & io_sc ); - int32_t analyzeDsdPhase1( STEP_CODE_DATA_STRUCT & io_sc ); - int32_t analyzeDsdPhase2( STEP_CODE_DATA_STRUCT & io_sc ); - int32_t analyzeTpsPhase1( STEP_CODE_DATA_STRUCT & io_sc ); - int32_t analyzeTpsPhase2( STEP_CODE_DATA_STRUCT & io_sc ); + int32_t analyzeCmdComplete( STEP_CODE_DATA_STRUCT & io_sc, + const CenAddr & i_stopAddr, + const CenAddr & i_endAddr ); + int32_t analyzeVcmPhase1( STEP_CODE_DATA_STRUCT & io_sc, + const CenAddr & i_stopAddr, + const CenAddr & i_endAddr ); + int32_t analyzeVcmPhase2( STEP_CODE_DATA_STRUCT & io_sc, + const CenAddr & i_stopAddr, + const CenAddr & i_endAddr ); + int32_t analyzeDsdPhase1( STEP_CODE_DATA_STRUCT & io_sc, + const CenAddr & i_stopAddr, + const CenAddr & i_endAddr ); + int32_t analyzeDsdPhase2( STEP_CODE_DATA_STRUCT & io_sc, + const CenAddr & i_stopAddr, + const CenAddr & i_endAddr ); + int32_t analyzeTpsPhase1( STEP_CODE_DATA_STRUCT & io_sc, + const CenAddr & i_stopAddr, + const CenAddr & i_endAddr ); + int32_t analyzeTpsPhase2( STEP_CODE_DATA_STRUCT & io_sc, + const CenAddr & i_stopAddr, + const CenAddr & i_endAddr ); int32_t startVcmPhase1( STEP_CODE_DATA_STRUCT & io_sc ); int32_t startVcmPhase2( STEP_CODE_DATA_STRUCT & io_sc ); |