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authorZane Shelley <zshelle@us.ibm.com>2013-05-10 16:08:31 -0500
committerA. Patrick Williams III <iawillia@us.ibm.com>2013-05-16 13:43:09 -0500
commit9b02b27d8784fd23e2216566c033fd99747cdb87 (patch)
tree288553a3944546f336d05b2d5faaf762fe32dee3 /src/usr/diag/prdf
parent8fac481d825883154ca20612ca0a69bc52f02618 (diff)
downloadtalos-hostboot-9b02b27d8784fd23e2216566c033fd99747cdb87.tar.gz
talos-hostboot-9b02b27d8784fd23e2216566c033fd99747cdb87.zip
PRD: Refactored CenAddr due to hardware change
Change-Id: Ic1b069be5063d54728bd3dc012cb9dddaef242bb Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/4469 Reviewed-by: Christopher T. Phan <cphan@us.ibm.com> Tested-by: Jenkins Server Reviewed-by: BENJAMIN J. WEISENBECK <bweisenb@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com> Reviewed-by: Zane Shelley <zshelle@us.ibm.com> Squashed: I60518c499974c01b2f646778c4c6b10375156dfd Squashed: I8cdec774634472aed3478b9c5aa3edc478434ada Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/4517
Diffstat (limited to 'src/usr/diag/prdf')
-rwxr-xr-xsrc/usr/diag/prdf/common/plat/pegasus/prdfCenAddress.C218
-rwxr-xr-xsrc/usr/diag/prdf/common/plat/pegasus/prdfCenAddress.H174
-rwxr-xr-xsrc/usr/diag/prdf/common/plat/pegasus/prdfCenMba.C5
3 files changed, 276 insertions, 121 deletions
diff --git a/src/usr/diag/prdf/common/plat/pegasus/prdfCenAddress.C b/src/usr/diag/prdf/common/plat/pegasus/prdfCenAddress.C
index e50fc5045..2ea5c9e80 100755
--- a/src/usr/diag/prdf/common/plat/pegasus/prdfCenAddress.C
+++ b/src/usr/diag/prdf/common/plat/pegasus/prdfCenAddress.C
@@ -43,71 +43,70 @@ using namespace PlatServices;
// MBS Address Registers
//------------------------------------------------------------------------------
-ReadAddrReg READ_NCE_ADDR_0 = "MBNCER_0";
-ReadAddrReg READ_RCE_ADDR_0 = "MBRCER_0";
-ReadAddrReg READ_MPE_ADDR_0 = "MBMPER_0";
-ReadAddrReg READ_UE_ADDR_0 = "MBUER_0";
+CenReadAddrReg READ_NCE_ADDR_0 = "MBNCER_0";
+CenReadAddrReg READ_RCE_ADDR_0 = "MBRCER_0";
+CenReadAddrReg READ_MPE_ADDR_0 = "MBMPER_0";
+CenReadAddrReg READ_UE_ADDR_0 = "MBUER_0";
-ReadAddrReg READ_NCE_ADDR_1 = "MBNCER_1";
-ReadAddrReg READ_RCE_ADDR_1 = "MBRCER_1";
-ReadAddrReg READ_MPE_ADDR_1 = "MBMPER_1";
-ReadAddrReg READ_UE_ADDR_1 = "MBUER_1";
+CenReadAddrReg READ_NCE_ADDR_1 = "MBNCER_1";
+CenReadAddrReg READ_RCE_ADDR_1 = "MBRCER_1";
+CenReadAddrReg READ_MPE_ADDR_1 = "MBMPER_1";
+CenReadAddrReg READ_UE_ADDR_1 = "MBUER_1";
//------------------------------------------------------------------------------
-int32_t cenGetReadAddr( ExtensibleChip * i_mbChip, ReadAddrReg i_addrReg,
- CenAddr & o_addr )
+int32_t getCenReadAddr( ExtensibleChip * i_membChip, CenReadAddrReg i_addrReg,
+ CenAddr & o_addr )
{
- #define PRDF_FUNC "[cenGetReadAddr] "
+ #define PRDF_FUNC "[getCenReadAddr] "
int32_t o_rc = SUCCESS;
- TargetHandle_t mbTarget = i_mbChip->GetChipHandle();
+ TargetHandle_t membTrgt = i_membChip->GetChipHandle();
do
{
- if ( TYPE_MEMBUF != getTargetType(mbTarget) )
+ // Check parameters
+ if ( TYPE_MEMBUF != getTargetType(membTrgt) )
{
PRDF_ERR( PRDF_FUNC"Unsupported target type" );
o_rc = FAIL; break;
}
- SCAN_COMM_REGISTER_CLASS * reg = i_mbChip->getRegister(i_addrReg);
+ // Read from hardware
+ SCAN_COMM_REGISTER_CLASS * reg = i_membChip->getRegister(i_addrReg);
o_rc = reg->Read();
if ( SUCCESS != o_rc )
{
- PRDF_ERR( PRDF_FUNC" %s Read() failed", i_addrReg );
+ PRDF_ERR( PRDF_FUNC"Read() failed on %s", i_addrReg );
break;
}
+ uint64_t addr = reg->GetBitFieldJustified( 0, 64 );
- uint32_t rank = reg->GetBitFieldJustified( 1, 3);
- uint32_t bank = reg->GetBitFieldJustified( 7, 4);
- uint32_t row = reg->GetBitFieldJustified(11,17);
- uint32_t col = reg->GetBitFieldJustified(28,12);
-
- uint32_t types = CenAddr::NONE;
+ // Get the address type.
+ uint32_t type = CenAddr::NONE;
if ( READ_NCE_ADDR_0 == i_addrReg || READ_NCE_ADDR_1 == i_addrReg )
- types = CenAddr::NCE;
+ type = CenAddr::NCE;
else if ( READ_RCE_ADDR_0 == i_addrReg || READ_RCE_ADDR_1 == i_addrReg )
- types = CenAddr::RCE;
+ type = CenAddr::RCE;
else if ( READ_MPE_ADDR_0 == i_addrReg || READ_MPE_ADDR_1 == i_addrReg )
- types = CenAddr::MPE;
+ type = CenAddr::MPE;
else if ( READ_UE_ADDR_0 == i_addrReg || READ_UE_ADDR_1 == i_addrReg )
- types = CenAddr::UE;
+ type = CenAddr::UE;
else
{
PRDF_ERR( PRDF_FUNC"Unsupported register" );
o_rc = FAIL; break;
}
- o_addr = CenAddr ( rank, bank, row, col, types );
+ o_addr = CenAddr::fromReadAddr( addr, type );
} while (0);
if ( SUCCESS != o_rc )
{
PRDF_ERR( PRDF_FUNC"Failed: HUID=0x%08x addrReg='%s'",
- getHuid(mbTarget), i_addrReg );
+ getHuid(membTrgt), i_addrReg );
}
return o_rc;
@@ -117,35 +116,31 @@ int32_t cenGetReadAddr( ExtensibleChip * i_mbChip, ReadAddrReg i_addrReg,
//------------------------------------------------------------------------------
-int32_t cenSetReadAddr( ExtensibleChip * i_mbChip, ReadAddrReg i_addrReg,
- CenAddr i_addr )
+int32_t setCenReadAddr( ExtensibleChip * i_membChip, CenReadAddrReg i_addrReg,
+ const CenAddr & i_addr )
{
- #define PRDF_FUNC "[cenSetReadAddr] "
+ #define PRDF_FUNC "[setCenReadAddr] "
int32_t o_rc = SUCCESS;
- TargetHandle_t mbTarget = i_mbChip->GetChipHandle();
+ TargetHandle_t membTrgt = i_membChip->GetChipHandle();
do
{
- if ( TYPE_MEMBUF != getTargetType(mbTarget) )
+ // Check parameters
+ if ( TYPE_MEMBUF != getTargetType(membTrgt) )
{
PRDF_ERR( PRDF_FUNC"Unsupported target type" );
o_rc = FAIL; break;
}
- SCAN_COMM_REGISTER_CLASS * reg = i_mbChip->getRegister(i_addrReg);
- reg->clearAllBits(); // clears out all status bits
-
- reg->SetBitFieldJustified( 1, 3, i_addr.getRank().flatten() );
- reg->SetBitFieldJustified( 7, 4, i_addr.getBank() );
- reg->SetBitFieldJustified( 11, 17, i_addr.getRow() );
- reg->SetBitFieldJustified( 28, 12, i_addr.getCol() );
-
+ // Write to hardware
+ SCAN_COMM_REGISTER_CLASS * reg = i_membChip->getRegister(i_addrReg);
+ reg->SetBitFieldJustified( 0, 64, i_addr.toReadAddr() );
o_rc = reg->Write();
if ( SUCCESS != o_rc )
{
- PRDF_ERR( PRDF_FUNC" %s Write() failed", i_addrReg );
+ PRDF_ERR( PRDF_FUNC"Write() failed on %s", i_addrReg );
break;
}
@@ -154,7 +149,7 @@ int32_t cenSetReadAddr( ExtensibleChip * i_mbChip, ReadAddrReg i_addrReg,
if ( SUCCESS != o_rc )
{
PRDF_ERR( PRDF_FUNC"Failed: HUID=0x%08x addrReg='%s'",
- getHuid(mbTarget), i_addrReg );
+ getHuid(membTrgt), i_addrReg );
}
return o_rc;
@@ -166,60 +161,82 @@ int32_t cenSetReadAddr( ExtensibleChip * i_mbChip, ReadAddrReg i_addrReg,
// MBA Address Registers
//------------------------------------------------------------------------------
-MaintAddrReg MAINT_START_ADDR = "MBMACA";
-MaintAddrReg MAINT_END_ADDR = "MBMEA";
-
-//------------------------------------------------------------------------------
-
-int32_t cenGetMaintAddr( ExtensibleChip * i_mbaChip, MaintAddrReg i_addrReg,
- CenAddr & o_addr )
+int32_t getCenMaintStartAddr( ExtensibleChip * i_mbaChip, CenAddr & o_addr )
{
- #define PRDF_FUNC "[cenGetMaintAddr] "
+ #define PRDF_FUNC "[getCenMaintStartAddr] "
int32_t o_rc = SUCCESS;
- TargetHandle_t mbaTarget = i_mbaChip->GetChipHandle();
+ TargetHandle_t mbaTrgt = i_mbaChip->GetChipHandle();
do
{
- if ( TYPE_MBA != getTargetType(mbaTarget) )
+ // Check parameters
+ if ( TYPE_MBA != getTargetType(mbaTrgt) )
{
PRDF_ERR( PRDF_FUNC"Unsupported target type" );
o_rc = FAIL; break;
}
- SCAN_COMM_REGISTER_CLASS * reg = i_mbaChip->getRegister(i_addrReg);
+ // Read from hardware
+ SCAN_COMM_REGISTER_CLASS * reg = i_mbaChip->getRegister("MBMACA");
o_rc = reg->Read();
if ( SUCCESS != o_rc )
{
- PRDF_ERR( PRDF_FUNC" %s Read() failed", i_addrReg );
+ PRDF_ERR( PRDF_FUNC"Read() failed on MBMACA" );
break;
}
+ uint64_t addr = reg->GetBitFieldJustified( 0, 64 );
- uint32_t rank = reg->GetBitFieldJustified( 1, 3);
- uint32_t bank = reg->GetBitFieldJustified( 7, 4);
- uint32_t row = reg->GetBitFieldJustified(11,17);
- uint32_t col = reg->GetBitFieldJustified(28,12);
+ o_addr = CenAddr::fromMaintStartAddr( addr );
- uint32_t types = CenAddr::NONE;
- if ( MAINT_START_ADDR == i_addrReg )
- types = reg->GetBitFieldJustified(40,7);
- else if ( MAINT_END_ADDR == i_addrReg )
- types = CenAddr::NONE;
- else
+ } while (0);
+
+ if ( SUCCESS != o_rc )
+ {
+ PRDF_ERR( PRDF_FUNC"Failed: HUID=0x%08x", getHuid(mbaTrgt) );
+ }
+
+ return o_rc;
+
+ #undef PRDF_FUNC
+}
+
+//------------------------------------------------------------------------------
+
+int32_t setCenMaintStartAddr( ExtensibleChip * i_mbaChip,
+ const CenAddr & i_addr )
+{
+ #define PRDF_FUNC "[setCenMaintStartAddr] "
+
+ int32_t o_rc = SUCCESS;
+
+ TargetHandle_t mbaTrgt = i_mbaChip->GetChipHandle();
+
+ do
+ {
+ // Check parameters
+ if ( TYPE_MBA != getTargetType(mbaTrgt) )
{
- PRDF_ERR( PRDF_FUNC"Unsupported register" );
+ PRDF_ERR( PRDF_FUNC"Unsupported target type" );
o_rc = FAIL; break;
}
- o_addr = CenAddr ( rank, bank, row, col, types );
+ // Write to hardware
+ SCAN_COMM_REGISTER_CLASS * reg = i_mbaChip->getRegister("MBMACA");
+ reg->SetBitFieldJustified( 0, 64, i_addr.toMaintStartAddr() );
+ o_rc = reg->Write();
+ if ( SUCCESS != o_rc )
+ {
+ PRDF_ERR( PRDF_FUNC"Write() failed on MBMACA" );
+ break;
+ }
} while (0);
if ( SUCCESS != o_rc )
{
- PRDF_ERR( PRDF_FUNC"Failed: HUID=0x%08x addrReg='%s'",
- getHuid(mbaTarget), i_addrReg );
+ PRDF_ERR( PRDF_FUNC"Failed: HUID=0x%08x", getHuid(mbaTrgt) );
}
return o_rc;
@@ -229,35 +246,73 @@ int32_t cenGetMaintAddr( ExtensibleChip * i_mbaChip, MaintAddrReg i_addrReg,
//------------------------------------------------------------------------------
-int32_t cenSetMaintAddr( ExtensibleChip * i_mbaChip, MaintAddrReg i_addrReg,
- CenAddr i_addr )
+int32_t getCenMaintEndAddr( ExtensibleChip * i_mbaChip, CenAddr & o_addr )
{
- #define PRDF_FUNC "[cenSetMaintAddr] "
+ #define PRDF_FUNC "[getCenMaintEndAddr] "
int32_t o_rc = SUCCESS;
- TargetHandle_t mbaTarget = i_mbaChip->GetChipHandle();
+ TargetHandle_t mbaTrgt = i_mbaChip->GetChipHandle();
do
{
- if ( TYPE_MBA != getTargetType(mbaTarget) )
+ // Check parameters
+ if ( TYPE_MBA != getTargetType(mbaTrgt) )
{
PRDF_ERR( PRDF_FUNC"Unsupported target type" );
o_rc = FAIL; break;
}
- SCAN_COMM_REGISTER_CLASS * reg = i_mbaChip->getRegister(i_addrReg);
- reg->clearAllBits(); // clears out all status bits
+ // Read from hardware
+ SCAN_COMM_REGISTER_CLASS * reg = i_mbaChip->getRegister("MBMEA");
+ o_rc = reg->Read();
+ if ( SUCCESS != o_rc )
+ {
+ PRDF_ERR( PRDF_FUNC"Read() failed on MBMEA" );
+ break;
+ }
+ uint64_t addr = reg->GetBitFieldJustified( 0, 64 );
- reg->SetBitFieldJustified( 1, 3, i_addr.getRank().flatten() );
- reg->SetBitFieldJustified( 7, 4, i_addr.getBank() );
- reg->SetBitFieldJustified( 11, 17, i_addr.getRow() );
- reg->SetBitFieldJustified( 28, 12, i_addr.getCol() );
+ o_addr = CenAddr::fromMaintEndAddr( addr );
+
+ } while (0);
+ if ( SUCCESS != o_rc )
+ {
+ PRDF_ERR( PRDF_FUNC"Failed: HUID=0x%08x", getHuid(mbaTrgt) );
+ }
+
+ return o_rc;
+
+ #undef PRDF_FUNC
+}
+
+//------------------------------------------------------------------------------
+
+int32_t setCenMaintEndAddr( ExtensibleChip * i_mbaChip, const CenAddr & i_addr )
+{
+ #define PRDF_FUNC "[setCenMaintEndAddr] "
+
+ int32_t o_rc = SUCCESS;
+
+ TargetHandle_t mbaTrgt = i_mbaChip->GetChipHandle();
+
+ do
+ {
+ // Check parameters
+ if ( TYPE_MBA != getTargetType(mbaTrgt) )
+ {
+ PRDF_ERR( PRDF_FUNC"Unsupported target type" );
+ o_rc = FAIL; break;
+ }
+
+ // Write to hardware
+ SCAN_COMM_REGISTER_CLASS * reg = i_mbaChip->getRegister("MBMEA");
+ reg->SetBitFieldJustified( 0, 64, i_addr.toMaintEndAddr() );
o_rc = reg->Write();
if ( SUCCESS != o_rc )
{
- PRDF_ERR( PRDF_FUNC" %s Write() failed", i_addrReg );
+ PRDF_ERR( PRDF_FUNC"Write() failed on MBMEA" );
break;
}
@@ -265,8 +320,7 @@ int32_t cenSetMaintAddr( ExtensibleChip * i_mbaChip, MaintAddrReg i_addrReg,
if ( SUCCESS != o_rc )
{
- PRDF_ERR( PRDF_FUNC"Failed: HUID=0x%08x addrReg='%s'",
- getHuid(mbaTarget), i_addrReg );
+ PRDF_ERR( PRDF_FUNC"Failed: HUID=0x%08x", getHuid(mbaTrgt) );
}
return o_rc;
diff --git a/src/usr/diag/prdf/common/plat/pegasus/prdfCenAddress.H b/src/usr/diag/prdf/common/plat/pegasus/prdfCenAddress.H
index 960e9d484..da0fd305d 100755
--- a/src/usr/diag/prdf/common/plat/pegasus/prdfCenAddress.H
+++ b/src/usr/diag/prdf/common/plat/pegasus/prdfCenAddress.H
@@ -155,7 +155,7 @@ class CenAddr
* enum ErrorType).
*/
CenAddr( uint32_t i_rank, uint32_t i_bank, uint32_t i_row,
- uint32_t i_col, uint32_t i_types = NONE ) :
+ uint32_t i_col, uint32_t i_types = NONE ) :
iv_rank(i_rank), iv_types(i_types)
{
iv_bankRowCol.bank = i_bank;
@@ -163,6 +163,97 @@ class CenAddr
iv_bankRowCol.col = i_col;
}
+ /**
+ * @brief Creates a CenAddr from a mainline memory read address.
+ * @param i_addr 64-bit address.
+ * @param i_type The error type associated with this address.
+ */
+ static CenAddr fromReadAddr( uint64_t i_addr, uint32_t i_type )
+ {
+ return CenAddr(
+ (i_addr >> 60) & 0x7, // rank
+ (i_addr >> 53) & 0xf, // bank
+ ((i_addr >> 5) & 0x20000) | ((i_addr >> 36) & 0x1ffff), // row
+ (i_addr >> 24) & 0xfff, // column
+ i_type ); // error type
+ }
+
+ /**
+ * @brief Converts internal data structure to a mainline memory read
+ * address.
+ * @return A uint64_t version of the address.
+ * @note Does not include error type. This is because in most cases we
+ * will use this function to write out to hardware and in doing so
+ * we will want to clear the status bits anyway.
+ */
+ uint64_t toReadAddr() const
+ {
+ return ( ((uint64_t) iv_rank.flatten() << 60) |
+ ((uint64_t) iv_bankRowCol.bank << 53) |
+ ((uint64_t)(iv_bankRowCol.row & 0x1ffff) << 36) | // r16-r0
+ ((uint64_t) iv_bankRowCol.col << 24) |
+ ((uint64_t)(iv_bankRowCol.row & 0x20000) << 5) ); // r17
+ }
+
+ /**
+ * @brief Creates a CenAddr from a maintenace start address.
+ * @param i_addr 64-bit address.
+ */
+ static CenAddr fromMaintStartAddr( uint64_t i_addr )
+ {
+ return CenAddr(
+ (i_addr >> 60) & 0x7, // rank
+ (i_addr >> 53) & 0xf, // bank
+ ((i_addr << 13) & 0x20000) | ((i_addr >> 36) & 0x1ffff), // row
+ (i_addr >> 24) & 0xfff, // column
+ (i_addr >> 17) & 0x7f ); // error type
+ }
+
+ /**
+ * @brief Converts internal data structure to a maintenace start address.
+ * @return A uint64_t version of the address.
+ * @note Does not include error type. This is because in most cases we
+ * will use this function to write out to hardware and in doing so
+ * we will want to clear the status bits anyway.
+ */
+ uint64_t toMaintStartAddr() const
+ {
+ return ( ((uint64_t) iv_rank.flatten() << 60) |
+ ((uint64_t) iv_bankRowCol.bank << 53) |
+ ((uint64_t)(iv_bankRowCol.row & 0x1ffff) << 36) | // r16-r0
+ ((uint64_t) iv_bankRowCol.col << 24) |
+ ((uint64_t)(iv_bankRowCol.row & 0x20000) >> 13) ); // r17
+ }
+
+ /**
+ * @brief Creates a CenAddr from a maintenace end address.
+ * @param i_addr 64-bit address.
+ */
+ static CenAddr fromMaintEndAddr( uint64_t i_addr )
+ {
+ return CenAddr(
+ (i_addr >> 60) & 0x7, // rank
+ (i_addr >> 53) & 0xf, // bank
+ ((i_addr >> 6) & 0x20000) | ((i_addr >> 36) & 0x1ffff), // row
+ (i_addr >> 24) & 0xfff ); // column
+ }
+
+ /**
+ * @brief Converts internal data structure to a maintenace end address.
+ * @return A uint64_t version of the address.
+ * @note Does not include error type. This is because in most cases we
+ * will use this function to write out to hardware and in doing so
+ * we will want to clear the status bits anyway.
+ */
+ uint64_t toMaintEndAddr() const
+ {
+ return ( ((uint64_t) iv_rank.flatten() << 60) |
+ ((uint64_t) iv_bankRowCol.bank << 53) |
+ ((uint64_t)(iv_bankRowCol.row & 0x1ffff) << 36) | // r16-r0
+ ((uint64_t) iv_bankRowCol.col << 24) |
+ ((uint64_t)(iv_bankRowCol.row & 0x20000) << 6) ); // r17
+ }
+
/** @return This address's rank. */
const CenRank& getRank() const { return iv_rank; };
@@ -194,7 +285,7 @@ class CenAddr
{
uint32_t bank : 4; ///< b2-b0
uint32_t col : 12; ///< c13,c11,c9-c3 (c2-c0 are tied to 0)
- uint32_t row : 17; ///< r16-r0
+ uint32_t row : 18; ///< r17-r0
} iv_bankRowCol;
/** An OR of all error types assoiated with this address (see enum
@@ -207,66 +298,75 @@ class CenAddr
// MBS Address Registers
//------------------------------------------------------------------------------
-typedef const char * const ReadAddrReg;
+typedef const char * const CenReadAddrReg;
-extern ReadAddrReg READ_NCE_ADDR_0; ///< For the MBNCER_0 register
-extern ReadAddrReg READ_RCE_ADDR_0; ///< For the MBRCER_0 register
-extern ReadAddrReg READ_MPE_ADDR_0; ///< For the MBMPER_0 register
-extern ReadAddrReg READ_UE_ADDR_0; ///< For the MBUER_0 register
+extern CenReadAddrReg READ_NCE_ADDR_0; ///< For the MBNCER_0 register
+extern CenReadAddrReg READ_RCE_ADDR_0; ///< For the MBRCER_0 register
+extern CenReadAddrReg READ_MPE_ADDR_0; ///< For the MBMPER_0 register
+extern CenReadAddrReg READ_UE_ADDR_0; ///< For the MBUER_0 register
-extern ReadAddrReg READ_NCE_ADDR_1; ///< For the MBNCER_1 register
-extern ReadAddrReg READ_RCE_ADDR_1; ///< For the MBRCER_1 register
-extern ReadAddrReg READ_MPE_ADDR_1; ///< For the MBMPER_1 register
-extern ReadAddrReg READ_UE_ADDR_1; ///< For the MBUER_1 register
+extern CenReadAddrReg READ_NCE_ADDR_1; ///< For the MBNCER_1 register
+extern CenReadAddrReg READ_RCE_ADDR_1; ///< For the MBRCER_1 register
+extern CenReadAddrReg READ_MPE_ADDR_1; ///< For the MBMPER_1 register
+extern CenReadAddrReg READ_UE_ADDR_1; ///< For the MBUER_1 register
/**
- * @brief Returns the address from the specified register.
- * @param i_mbChip A Centaur chip.
- * @param i_addrReg The target address register.
- * @param o_addr The returned address from hardware.
- * @return Non-SUCCESS if a register read fails, SUCCESS otherwise.
+ * @brief Reads the specified mainline memory read address from hardware.
+ * @param i_membChip A Centaur chip.
+ * @param i_addrReg The target address register.
+ * @param o_addr The returned address from hardware.
+ * @return Non-SUCCESS if an internal function fails, SUCCESS otherwise.
*/
-int32_t cenGetReadAddr( ExtensibleChip * i_mbChip, ReadAddrReg i_addrReg,
+int32_t getCenReadAddr( ExtensibleChip * i_membChip, CenReadAddrReg i_addrReg,
CenAddr & o_addr );
/**
- * @brief Writes an address to the specified register.
- * @param i_mbChip A Centaur chip.
- * @param i_addrReg The target address register.
- * @param i_addr The address to write to hardware.
- * @return Non-SUCCESS if a register read fails, SUCCESS otherwise.
+ * @brief Writes the specified mainline memory read address to hardware.
+ * @param i_membChip A Centaur chip.
+ * @param i_addrReg The target address register.
+ * @param i_addr The address to write to hardware.
+ * @return Non-SUCCESS if an internal function fails, SUCCESS otherwise.
*/
-int32_t cenSetReadAddr( ExtensibleChip * i_mbChip, ReadAddrReg i_addrReg,
- CenAddr i_addr );
+int32_t setCenReadAddr( ExtensibleChip * i_membChip, CenReadAddrReg i_addrReg,
+ const CenAddr & i_addr );
//------------------------------------------------------------------------------
// MBA Address Registers
//------------------------------------------------------------------------------
-typedef const char * const MaintAddrReg;
+/**
+ * @brief Reads the maintenance start address from hardware.
+ * @param i_mbaChip An MBA chip.
+ * @param o_addr The returned address from hardware.
+ * @return Non-SUCCESS if an internal function fails, SUCCESS otherwise.
+ */
+int32_t getCenMaintStartAddr( ExtensibleChip * i_mbaChip, CenAddr & o_addr );
-extern MaintAddrReg MAINT_START_ADDR; ///< For the MBMACA register
-extern MaintAddrReg MAINT_END_ADDR; ///< For the MBMEA register
+/**
+ * @brief Writes the maintenance start address to hardware.
+ * @param i_mbaChip An MBA chip.
+ * @param i_addr The address to write to hardware.
+ * @return Non-SUCCESS if an internal function fails, SUCCESS otherwise.
+ */
+int32_t setCenMaintStartAddr( ExtensibleChip * i_mbaChip,
+ const CenAddr & i_addr );
/**
- * @brief Returns the address from the specified register.
+ * @brief Reads the maintenance end address from hardware.
* @param i_mbaChip An MBA chip.
- * @param i_addrReg The target address register.
* @param o_addr The returned address from hardware.
- * @return Non-SUCCESS if a register read fails, SUCCESS otherwise.
+ * @return Non-SUCCESS if an internal function fails, SUCCESS otherwise.
*/
-int32_t cenGetMaintAddr( ExtensibleChip * i_mbaChip, MaintAddrReg i_addrReg,
- CenAddr & o_addr );
+int32_t getCenMaintEndAddr( ExtensibleChip * i_mbaChip, CenAddr & o_addr );
/**
- * @brief Writes an address to the specified register.
+ * @brief Writes the maintenance end address to hardware.
* @param i_mbaChip An MBA chip.
- * @param i_addrReg The target address register.
* @param i_addr The address to write to hardware.
- * @return Non-SUCCESS if a register read fails, SUCCESS otherwise.
+ * @return Non-SUCCESS if an internal function fails, SUCCESS otherwise.
*/
-int32_t cenSetMaintAddr( ExtensibleChip * i_mbChip, MaintAddrReg i_addrReg,
- CenAddr i_addr );
+int32_t setCenMaintEndAddr( ExtensibleChip * i_mbaChip,
+ const CenAddr & i_addr );
} // end namespace PRDF
diff --git a/src/usr/diag/prdf/common/plat/pegasus/prdfCenMba.C b/src/usr/diag/prdf/common/plat/pegasus/prdfCenMba.C
index 318df04b6..0d03876ab 100755
--- a/src/usr/diag/prdf/common/plat/pegasus/prdfCenMba.C
+++ b/src/usr/diag/prdf/common/plat/pegasus/prdfCenMba.C
@@ -106,8 +106,8 @@ int32_t MaintCmdComplete( ExtensibleChip * i_mbaChip,
// Tuck this away until PostAnalysis.
CenAddr startAddr, endAddr;
- l_rc = cenGetMaintAddr( i_mbaChip, MAINT_START_ADDR, startAddr );
- l_rc |= cenGetMaintAddr( i_mbaChip, MAINT_END_ADDR, endAddr );
+ l_rc = getCenMaintStartAddr( i_mbaChip, startAddr );
+ l_rc |= getCenMaintEndAddr( i_mbaChip, endAddr );
if ( SUCCESS != l_rc )
{
PRDF_ERR( PRDF_FUNC"cenGetMbaAddr() failed" );
@@ -119,6 +119,7 @@ int32_t MaintCmdComplete( ExtensibleChip * i_mbaChip,
mbadb->iv_cmdCompleteMsgData =
startAddr == endAddr ? MDIA::COMMAND_COMPLETE
: MDIA::COMMAND_STOPPED;
+
// Do not commit error log for a successful command complete.
if ( MDIA::COMMAND_COMPLETE == mbadb->iv_cmdCompleteMsgData )
i_sc.service_data->DontCommitErrorLog();
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