PRD: renamed Centaur regs to maintain consistency

Change-Id: I2114174220d5e3e761d157213f7d8f1c3636f50f
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/4928
Tested-by: Jenkins Server
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Reviewed-by: Zane Shelley <zshelle@us.ibm.com>
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/4960

5 files changed, 214 insertions, 214 deletions

diff --git a/src/usr/diag/prdf/common/plat/pegasus/Membuf_acts_NEST.rule b/src/usr/diag/prdf/common/plat/pegasus/Membuf_acts_NEST.rule
index 4d5bc5d58..db56173a3 100755
--- a/src/usr/diag/prdf/common/plat/pegasus/Membuf_acts_NEST.rule
+++ b/src/usr/diag/prdf/common/plat/pegasus/Membuf_acts_NEST.rule
@@ -785,364 +785,364 @@ group gMbsFir filter singlebit
 };
 
 ################################################################################
-#  NEST Chiplet MBSECC01FIR and MBSECC23FIR
+#  NEST Chiplet MBSECCFIRs
 ################################################################################
 # RAS spreadsheet: p8dd1_mss_FFDC_37_ reviewd.xls
 
-rule MbsEcc01Fir
+rule Mba0_MbsEccFir
 {
-  CHECK_STOP:
-    MBSECC01FIR & ~MBSECC01FIR_MASK & ~MBSECC01FIR_ACT0 & ~MBSECC01FIR_ACT1;
-  UNIT_CS:
-    MBSECC01FIR & ~MBSECC01FIR_MASK & ~MBSECC01FIR_ACT0 & ~MBSECC01FIR_ACT1;
-  RECOVERABLE:
-    MBSECC01FIR & ~MBSECC01FIR_MASK & ~MBSECC01FIR_ACT0 &  MBSECC01FIR_ACT1;
+  CHECK_STOP:   MBA0_MBSECCFIR      & ~MBA0_MBSECCFIR_MASK &
+               ~MBA0_MBSECCFIR_ACT0 & ~MBA0_MBSECCFIR_ACT1;
+  UNIT_CS:      MBA0_MBSECCFIR      & ~MBA0_MBSECCFIR_MASK &
+               ~MBA0_MBSECCFIR_ACT0 & ~MBA0_MBSECCFIR_ACT1;
+  RECOVERABLE:  MBA0_MBSECCFIR      & ~MBA0_MBSECCFIR_MASK &
+               ~MBA0_MBSECCFIR_ACT0 &  MBA0_MBSECCFIR_ACT1;
 };
 
-rule MbsEcc23Fir
+rule Mba1_MbsEccFir
 {
-  CHECK_STOP:
-    MBSECC23FIR & ~MBSECC23FIR_MASK & ~MBSECC23FIR_ACT0 & ~MBSECC23FIR_ACT1;
-  UNIT_CS:
-    MBSECC23FIR & ~MBSECC23FIR_MASK & ~MBSECC23FIR_ACT0 & ~MBSECC23FIR_ACT1;
-  RECOVERABLE:
-    MBSECC23FIR & ~MBSECC23FIR_MASK & ~MBSECC23FIR_ACT0 &  MBSECC23FIR_ACT1;
+  CHECK_STOP:   MBA1_MBSECCFIR      & ~MBA1_MBSECCFIR_MASK &
+               ~MBA1_MBSECCFIR_ACT0 & ~MBA1_MBSECCFIR_ACT1;
+  UNIT_CS:      MBA1_MBSECCFIR      & ~MBA1_MBSECCFIR_MASK &
+               ~MBA1_MBSECCFIR_ACT0 & ~MBA1_MBSECCFIR_ACT1;
+  RECOVERABLE:  MBA1_MBSECCFIR      & ~MBA1_MBSECCFIR_MASK &
+               ~MBA1_MBSECCFIR_ACT0 &  MBA1_MBSECCFIR_ACT1;
 };
 
 group gMbsEccFir filter singlebit
 {
-    /** MBSECCFIR01[0:7]
+    /** MBA0_MBSECCFIR[0:7]
      *  MBECCFIR_MEMORY_MPE_RANK_0_7
      */
     #TODO via RTC 22866 ( Chip Mark Verification )
-    (MbsEcc01Fir, bit(0|1|2|3|4|5|6|7)) ? TBDDefaultCallout;
+    (Mba0_MbsEccFir, bit(0|1|2|3|4|5|6|7)) ? TBDDefaultCallout;
 
-    /** MBSECCFIR23[0:7]
+    /** MBA1_MBSECCFIR[0:7]
      *  MBECCFIR_MEMORY_MPE_RANK_0_7
      */
     #TODO via RTC 22866 ( Chip Mark Verification )
-    (MbsEcc23Fir, bit(0|1|2|3|4|5|6|7)) ? TBDDefaultCallout;
+    (Mba1_MbsEccFir, bit(0|1|2|3|4|5|6|7)) ? TBDDefaultCallout;
 
-    /** MBSECCFIR01[8:15]
+    /** MBA0_MBSECCFIR[8:15]
      *  Reserved
      */
-    (MbsEcc01Fir, bit(8|9|10|11|12|13|14|15)) ? defaultMaskedError;
+    (Mba0_MbsEccFir, bit(8|9|10|11|12|13|14|15)) ? defaultMaskedError;
 
-    /** MBSECCFIR23[8:15]
+    /** MBA1_MBSECCFIR[8:15]
      *  Reserved
      */
-    (MbsEcc23Fir, bit(8|9|10|11|12|13|14|15)) ? defaultMaskedError;
+    (Mba1_MbsEccFir, bit(8|9|10|11|12|13|14|15)) ? defaultMaskedError;
 
-    /** MBSECCFIR01[16]
+    /** MBA0_MBSECCFIR[16]
      *  MBECCFIR_MEMORY_NCE
      */
     #TODO via RTC 47289 ( CE/UE isolation )
-    (MbsEcc01Fir, bit(16)) ? TBDDefaultCallout;
+    (Mba0_MbsEccFir, bit(16)) ? TBDDefaultCallout;
 
-    /** MBSECCFIR23[16]
+    /** MBA1_MBSECCFIR[16]
      *  MBECCFIR_MEMORY_NCE
      */
     #TODO via RTC 47289 ( CE/UE isolation )
-    (MbsEcc23Fir, bit(16)) ? TBDDefaultCallout;
+    (Mba1_MbsEccFir, bit(16)) ? TBDDefaultCallout;
 
-    /** MBSECCFIR01[17]
+    /** MBA0_MBSECCFIR[17]
      *  MBECCFIR_MEMORY_RCE
      */
     # TODO via RTC 23125. How to do this. In RAS spreadsheet action is RCE
     # In description, Threshold per rank 8/24 make a callout of DIMM pair
     # Needs discussion
-    (MbsEcc01Fir, bit(17)) ? TBDDefaultCallout;
+    (Mba0_MbsEccFir, bit(17)) ? TBDDefaultCallout;
 
-    /** MBSECCFIR23[17]
+    /** MBA1_MBSECCFIR[17]
      *  MBECCFIR_MEMORY_RCE
      */
-    (MbsEcc23Fir, bit(17)) ? TBDDefaultCallout;
+    (Mba1_MbsEccFir, bit(17)) ? TBDDefaultCallout;
 
-    /** MBSECCFIR01[18]
+    /** MBA0_MBSECCFIR[18]
      *  MBECCFIR_MEMORY_SUE
      */
-    (MbsEcc01Fir, bit(18)) ? defaultMaskedError;
+    (Mba0_MbsEccFir, bit(18)) ? defaultMaskedError;
 
-    /** MBSECCFIR23[18]
+    /** MBA1_MBSECCFIR[18]
      *  MBECCFIR_MEMORY_SUE
      */
-    (MbsEcc23Fir, bit(18)) ? defaultMaskedError;
+    (Mba1_MbsEccFir, bit(18)) ? defaultMaskedError;
 
-    /** MBSECCFIR01[19]
+    /** MBA0_MBSECCFIR[19]
      *  MBECCFIR_MEMORY_UE
      */
     #TODO via RTC 47289 ( CE/UE isolation )
-    (MbsEcc01Fir, bit(19)) ? TBDDefaultCallout;
+    (Mba0_MbsEccFir, bit(19)) ? TBDDefaultCallout;
 
-    /** MBSECCFIR23[19]
+    /** MBA1_MBSECCFIR[19]
      *  MBECCFIR_MEMORY_UE
      */
     #TODO via RTC 47289 ( CE/UE isolation )
-    (MbsEcc23Fir, bit(19)) ? TBDDefaultCallout;
+    (Mba1_MbsEccFir, bit(19)) ? TBDDefaultCallout;
 
-    /** MBSECCFIR01[20:27]
+    /** MBA0_MBSECCFIR[20:27]
      *  MBECCFIR_MAINT_MPE_RANK_0_7
      */
     #TODO via RTC 22866 ( Chip Mark Verification )
-    (MbsEcc01Fir, bit(20|21|22|23|24|25|26|27)) ? TBDDefaultCallout;
+    (Mba0_MbsEccFir, bit(20|21|22|23|24|25|26|27)) ? TBDDefaultCallout;
 
-    /** MBSECCFIR23[20:27]
+    /** MBA1_MBSECCFIR[20:27]
      *  MBECCFIR_MAINT_MPE_RANK_0_7
      */
     #TODO via RTC 22866 ( Chip Mark Verification )
-    (MbsEcc23Fir, bit(20|21|22|23|24|25|26|27)) ? TBDDefaultCallout;
+    (Mba1_MbsEccFir, bit(20|21|22|23|24|25|26|27)) ? TBDDefaultCallout;
 
-    /** MBSECCFIR01[28:35]
+    /** MBA0_MBSECCFIR[28:35]
      *  Reserved
      */
-    (MbsEcc01Fir, bit(28|29|30|31|32|33|34|35)) ? TBDDefaultCallout;
+    (Mba0_MbsEccFir, bit(28|29|30|31|32|33|34|35)) ? TBDDefaultCallout;
 
-    /** MBSECCFIR23[28:35]
+    /** MBA1_MBSECCFIR[28:35]
      *  Reserved
      */
-    (MbsEcc23Fir, bit(28|29|30|31|32|33|34|35)) ? TBDDefaultCallout;
+    (Mba1_MbsEccFir, bit(28|29|30|31|32|33|34|35)) ? TBDDefaultCallout;
 
-    /** MBSECCFIR01[36]
+    /** MBA0_MBSECCFIR[36]
      *  MBECCFIR_MAINTENANCE_NCE
      */
-    (MbsEcc01Fir, bit(36)) ? defaultMaskedError;
+    (Mba0_MbsEccFir, bit(36)) ? defaultMaskedError;
 
-    /** MBSECCFIR23[36]
+    /** MBA1_MBSECCFIR[36]
      *  MBECCFIR_MAINTENANCE_NCE
      */
-    (MbsEcc23Fir, bit(36)) ? defaultMaskedError;
+    (Mba1_MbsEccFir, bit(36)) ? defaultMaskedError;
 
-    /** MBSECCFIR01[37]
+    /** MBA0_MBSECCFIR[37]
      *  MBECCFIR_MAINTENANCE_SCE
      */
-    (MbsEcc01Fir, bit(37)) ? defaultMaskedError;
+    (Mba0_MbsEccFir, bit(37)) ? defaultMaskedError;
 
-    /** MBSECCFIR23[37]
+    /** MBA1_MBSECCFIR[37]
      *  MBECCFIR_MAINTENANCE_SCE
      */
-    (MbsEcc23Fir, bit(37)) ? defaultMaskedError;
+    (Mba1_MbsEccFir, bit(37)) ? defaultMaskedError;
 
-    /** MBSECCFIR01[38]
+    /** MBA0_MBSECCFIR[38]
      *  MBECCFIR_MAINTENANCE_MCE
      */
-    (MbsEcc01Fir, bit(38)) ? defaultMaskedError;
+    (Mba0_MbsEccFir, bit(38)) ? defaultMaskedError;
 
-    /** MBSECCFIR23[38]
+    /** MBA1_MBSECCFIR[38]
      *  MBECCFIR_MAINTENANCE_MCE
      */
-    (MbsEcc23Fir, bit(38)) ? defaultMaskedError;
+    (Mba1_MbsEccFir, bit(38)) ? defaultMaskedError;
 
-    /** MBSECCFIR01[39]
+    /** MBA0_MBSECCFIR[39]
      *  MBECCFIR_MAINTENANCE_RCE
      */
-    (MbsEcc01Fir, bit(39)) ? defaultMaskedError;
+    (Mba0_MbsEccFir, bit(39)) ? defaultMaskedError;
 
-    /** MBSECCFIR23[39]
+    /** MBA1_MBSECCFIR[39]
      *  MBECCFIR_MAINTENANCE_RCE
      */
-    (MbsEcc23Fir, bit(39)) ? defaultMaskedError;
+    (Mba1_MbsEccFir, bit(39)) ? defaultMaskedError;
 
-    /** MBSECCFIR01[40]
+    /** MBA0_MBSECCFIR[40]
      *  MBECCFIR_MAINTENANCE_SUE
      */
-    (MbsEcc01Fir, bit(40)) ? defaultMaskedError;
+    (Mba0_MbsEccFir, bit(40)) ? defaultMaskedError;
 
-    /** MBSECCFIR23[40]
+    /** MBA1_MBSECCFIR[40]
      *  MBECCFIR_MAINTENANCE_SUE
      */
-    (MbsEcc23Fir, bit(40)) ? defaultMaskedError;
+    (Mba1_MbsEccFir, bit(40)) ? defaultMaskedError;
 
-    /** MBSECCFIR01[41]
+    /** MBA0_MBSECCFIR[41]
      *  MBECCFIR_MAINTENANCE_UE
      */
     #TODO via RTC 47289 ( CE/UE isolation )
-    (MbsEcc01Fir, bit(41)) ? TBDDefaultCallout;
+    (Mba0_MbsEccFir, bit(41)) ? TBDDefaultCallout;
 
-    /** MBSECCFIR23[41]
+    /** MBA1_MBSECCFIR[41]
      *  MBECCFIR_MAINTENANCE_UE
      */
     #TODO via RTC 47289 ( CE/UE isolation )
-    (MbsEcc23Fir, bit(41)) ? TBDDefaultCallout;
+    (Mba1_MbsEccFir, bit(41)) ? TBDDefaultCallout;
 
-    /** MBSECCFIR01[42]
+    /** MBA0_MBSECCFIR[42]
      *  MBECCFIR_MPE_DURING_USE_MAINTENANCE_MARK_MODE
      */
-    (MbsEcc01Fir, bit(42)) ? defaultMaskedError;
+    (Mba0_MbsEccFir, bit(42)) ? defaultMaskedError;
 
-    /** MBSECCFIR23[42]
+    /** MBA1_MBSECCFIR[42]
      *  MBECCFIR_MPE_DURING_USE_MAINTENANCE_MARK_MODE
      */
-    (MbsEcc23Fir, bit(42)) ? defaultMaskedError;
+    (Mba1_MbsEccFir, bit(42)) ? defaultMaskedError;
 
-    /** MBSECCFIR01[43]
+    /** MBA0_MBSECCFIR[43]
      *  MBECCFIR_PREFETCH_MEMORY_UE
      */
     #TODO via RTC 47289 ( CE/UE isolation )
-    (MbsEcc01Fir, bit(43)) ? TBDDefaultCallout;
+    (Mba0_MbsEccFir, bit(43)) ? TBDDefaultCallout;
 
-    /** MBSECCFIR23[43]
+    /** MBA1_MBSECCFIR[43]
      *  MBECCFIR_PREFETCH_MEMORY_UE
      */
     #TODO via RTC 47289 ( CE/UE isolation )
-    (MbsEcc23Fir, bit(43)) ? TBDDefaultCallout;
+    (Mba1_MbsEccFir, bit(43)) ? TBDDefaultCallout;
 
-    /** MBSECCFIR01[44]
+    /** MBA0_MBSECCFIR[44]
      *  MBECCFIR_MEMORY_RCD_PARITY_ERROR
      */
-    (MbsEcc01Fir, bit(44)) ? defaultMaskedError;
+    (Mba0_MbsEccFir, bit(44)) ? defaultMaskedError;
 
-    /** MBSECCFIR23[44]
+    /** MBA1_MBSECCFIR[44]
      *  MBECCFIR_MEMORY_RCD_PARITY_ERROR
      */
-    (MbsEcc23Fir, bit(44)) ? defaultMaskedError;
+    (Mba1_MbsEccFir, bit(44)) ? defaultMaskedError;
 
-    /** MBSECCFIR01[45]
+    /** MBA0_MBSECCFIR[45]
      *  MBECCFIR_MAINTENANCE_RCD_PARITY_ERROR
      */
-    (MbsEcc01Fir, bit(45)) ? defaultMaskedError;
+    (Mba0_MbsEccFir, bit(45)) ? defaultMaskedError;
 
-    /** MBSECCFIR23[45]
+    /** MBA1_MBSECCFIR[45]
      *  MBECCFIR_MAINTENANCE_RCD_PARITY_ERROR
      */
-    (MbsEcc23Fir, bit(45)) ? defaultMaskedError;
+    (Mba1_MbsEccFir, bit(45)) ? defaultMaskedError;
 
-    /** MBSECCFIR01[46]
+    /** MBA0_MBSECCFIR[46]
      *  MBECCFIR_RECOVERABLE_CONFIGURATION_REGISTER_PARITY_ERROR
      */
-    (MbsEcc01Fir, bit(46)) ? SelfMedThr1;
+    (Mba0_MbsEccFir, bit(46)) ? SelfMedThr1;
 
-    /** MBSECCFIR23[46]
+    /** MBA1_MBSECCFIR[46]
      *  MBECCFIR_RECOVERABLE_CONFIGURATION_REGISTER_PARITY_ERROR
      */
-    (MbsEcc23Fir, bit(46)) ? SelfMedThr1;
+    (Mba1_MbsEccFir, bit(46)) ? SelfMedThr1;
 
-    /** MBSECCFIR01[47]
+    /** MBA0_MBSECCFIR[47]
      *  MBECCFIR_UNRECOVERABLE_CONFIGURATION_REGISTER_PARITY_ERROR
      */
-    (MbsEcc01Fir, bit(47)) ? SelfMedThr1;
+    (Mba0_MbsEccFir, bit(47)) ? SelfMedThr1;
 
-    /** MBSECCFIR23[47]
+    /** MBA1_MBSECCFIR[47]
      *  MBECCFIR_UNRECOVERABLE_CONFIGURATION_REGISTER_PARITY_ERROR
      */
-    (MbsEcc23Fir, bit(47)) ? SelfMedThr1;
+    (Mba1_MbsEccFir, bit(47)) ? SelfMedThr1;
 
-    /** MBSECCFIR01[48]
+    /** MBA0_MBSECCFIR[48]
      *  MBECCFIR_MASKABLE_CONFIGURATION_REGISTER_PARITY_ERROR
      */
-    (MbsEcc01Fir, bit(48)) ? defaultMaskedError;
+    (Mba0_MbsEccFir, bit(48)) ? defaultMaskedError;
 
-    /** MBSECCFIR23[48]
+    /** MBA1_MBSECCFIR[48]
      *  MBECCFIR_MASKABLE_CONFIGURATION_REGISTER_PARITY_ERROR
      */
-    (MbsEcc23Fir, bit(48)) ? defaultMaskedError;
+    (Mba1_MbsEccFir, bit(48)) ? defaultMaskedError;
 
-    /** MBSECCFIR01[49]
+    /** MBA0_MBSECCFIR[49]
      *  MBECCFIR_ECC_DATAPATH_PARITY_ERROR
      */
-    (MbsEcc01Fir, bit(49)) ? SelfMedThr1;
+    (Mba0_MbsEccFir, bit(49)) ? SelfMedThr1;
 
-    /** MBSECCFIR23[49]
+    /** MBA1_MBSECCFIR[49]
      *  MBECCFIR_ECC_DATAPATH_PARITY_ERROR
      */
-    (MbsEcc23Fir, bit(49)) ? SelfMedThr1;
+    (Mba1_MbsEccFir, bit(49)) ? SelfMedThr1;
 
-    /** MBSECCFIR01[50]
+    /** MBA0_MBSECCFIR[50]
      *  MBECCFIR_INTERNAL_SCOM_ERROR
      */
-    (MbsEcc01Fir, bit(50)) ? defaultMaskedError;
+    (Mba0_MbsEccFir, bit(50)) ? defaultMaskedError;
 
-    /** MBSECCFIR23[50]
+    /** MBA1_MBSECCFIR[50]
      *  MBECCFIR_INTERNAL_SCOM_ERROR
      */
-    (MbsEcc23Fir, bit(50)) ? defaultMaskedError;
+    (Mba1_MbsEccFir, bit(50)) ? defaultMaskedError;
 
-    /** MBSECCFIR01[51]
+    /** MBA0_MBSECCFIR[51]
      *  MBECCFIR_INTERNAL_SCOM_ERROR_COPY
      */
-    (MbsEcc01Fir, bit(51)) ? defaultMaskedError;
+    (Mba0_MbsEccFir, bit(51)) ? defaultMaskedError;
 
-    /** MBSECCFIR23[51]
+    /** MBA1_MBSECCFIR[51]
      *  MBECCFIR_INTERNAL_SCOM_ERROR_COPY
      */
-    (MbsEcc23Fir, bit(51)) ? defaultMaskedError;
+    (Mba1_MbsEccFir, bit(51)) ? defaultMaskedError;
 };
 
 ################################################################################
-#  NEST Chiplet MCBIST01FIR and MCBIST23FIR
+#  NEST Chiplet MCBISTFIRs
 ################################################################################
 # RAS spreadsheet: p8dd1_mss_FFDC_37_ reviewd.xls
 
-rule Mcbist01Fir
+rule Mba0_McbistFir
 {
-  CHECK_STOP:
-    MCBIST01FIR & ~MCBIST01FIR_MASK & ~MCBIST01FIR_ACT0 & ~MCBIST01FIR_ACT1;
-  UNIT_CS:
-    MCBIST01FIR & ~MCBIST01FIR_MASK & ~MCBIST01FIR_ACT0 & ~MCBIST01FIR_ACT1;
-  RECOVERABLE:
-    MCBIST01FIR & ~MCBIST01FIR_MASK & ~MCBIST01FIR_ACT0 &  MCBIST01FIR_ACT1;
+  CHECK_STOP:   MBA0_MCBISTFIR      & ~MBA0_MCBISTFIR_MASK &
+               ~MBA0_MCBISTFIR_ACT0 & ~MBA0_MCBISTFIR_ACT1;
+  UNIT_CS:      MBA0_MCBISTFIR      & ~MBA0_MCBISTFIR_MASK &
+               ~MBA0_MCBISTFIR_ACT0 & ~MBA0_MCBISTFIR_ACT1;
+  RECOVERABLE:  MBA0_MCBISTFIR      & ~MBA0_MCBISTFIR_MASK &
+               ~MBA0_MCBISTFIR_ACT0 &  MBA0_MCBISTFIR_ACT1;
 };
 
-rule Mcbist23Fir
+rule Mba1_McbistFir
 {
-  CHECK_STOP:
-    MCBIST23FIR & ~MCBIST23FIR_MASK & ~MCBIST23FIR_ACT0 & ~MCBIST23FIR_ACT1;
-  UNIT_CS:
-    MCBIST23FIR & ~MCBIST23FIR_MASK & ~MCBIST23FIR_ACT0 & ~MCBIST23FIR_ACT1;
-  RECOVERABLE:
-    MCBIST23FIR & ~MCBIST23FIR_MASK & ~MCBIST23FIR_ACT0 &  MCBIST23FIR_ACT1;
+  CHECK_STOP:   MBA1_MCBISTFIR      & ~MBA1_MCBISTFIR_MASK &
+               ~MBA1_MCBISTFIR_ACT0 & ~MBA1_MCBISTFIR_ACT1;
+  UNIT_CS:      MBA1_MCBISTFIR      & ~MBA1_MCBISTFIR_MASK &
+               ~MBA1_MCBISTFIR_ACT0 & ~MBA1_MCBISTFIR_ACT1;
+  RECOVERABLE:  MBA1_MCBISTFIR      & ~MBA1_MCBISTFIR_MASK &
+               ~MBA1_MCBISTFIR_ACT0 &  MBA1_MCBISTFIR_ACT1;
 };
 
 group gMcbistFir filter singlebit
 {
-    /** MCBISTFIR01[0]
+    /** MBA0_MCBISTFIR[0]
      *  MBSFIRQ_SCOM_PAR_ERRORS
      */
-    (Mcbist01Fir, bit(0)) ? SelfMedThr1;
+    (Mba0_McbistFir, bit(0)) ? SelfMedThr1;
 
-    /** MCBISTFIR23[0]
+    /** MBA1_MCBISTFIR[0]
      *  MBSFIRQ_SCOM_PAR_ERRORS
      */
-    (Mcbist23Fir, bit(0)) ? SelfMedThr1;
+    (Mba1_McbistFir, bit(0)) ? SelfMedThr1;
 
-    /** MCBISTFIR01[1]
+    /** MBA0_MCBISTFIR[1]
      *  MBSFIRQ_MBX_PAR_ERRORS
      */
-    (Mcbist01Fir, bit(1)) ? calloutSelfMed;
+    (Mba0_McbistFir, bit(1)) ? calloutSelfMed;
 
-    /** MCBISTFIR23[1]
+    /** MBA1_MCBISTFIR[1]
      *  MBSFIRQ_MBX_PAR_ERRORS
      */
-    (Mcbist23Fir, bit(1)) ? calloutSelfMed;
+    (Mba1_McbistFir, bit(1)) ? calloutSelfMed;
 
-    /** MCBISTFIR01[2:14]
+    /** MBA0_MCBISTFIR[2:14]
      *  Reserved
      */
-    (Mcbist01Fir, bit(2|3|4|5|6|7|8|9|10|11|12|13|14)) ? defaultMaskedError;
+    (Mba0_McbistFir, bit(2|3|4|5|6|7|8|9|10|11|12|13|14)) ? defaultMaskedError;
 
-    /** MCBISTFIR23[2:14]
+    /** MBA1_MCBISTFIR[2:14]
      *  Reserved
      */
-    (Mcbist23Fir, bit(2|3|4|5|6|7|8|9|10|11|12|13|14)) ? defaultMaskedError;
+    (Mba1_McbistFir, bit(2|3|4|5|6|7|8|9|10|11|12|13|14)) ? defaultMaskedError;
 
-    /** MCBISTFIR01[15]
+    /** MBA0_MCBISTFIR[15]
      *  MBSFIRQ_INTERNAL_SCOM_ERROR
      */
-    (Mcbist01Fir, bit(15)) ? defaultMaskedError;
+    (Mba0_McbistFir, bit(15)) ? defaultMaskedError;
 
-    /** MCBISTFIR23[15]
+    /** MBA1_MCBISTFIR[15]
      *  MBSFIRQ_INTERNAL_SCOM_ERROR
      */
-    (Mcbist23Fir, bit(15)) ? defaultMaskedError;
+    (Mba1_McbistFir, bit(15)) ? defaultMaskedError;
 
-    /** MCBISTFIR01[16]
+    /** MBA0_MCBISTFIR[16]
      *  MBSFIRQ_INTERNAL_SCOM_ERROR_CLONE
      */
-    (Mcbist01Fir, bit(16)) ? defaultMaskedError;
+    (Mba0_McbistFir, bit(16)) ? defaultMaskedError;
 
-    /** MCBISTFIR23[16]
+    /** MBA1_MCBISTFIR[16]
      *  MBSFIRQ_INTERNAL_SCOM_ERROR_CLONE
      */
-    (Mcbist23Fir, bit(16)) ? defaultMaskedError;
+    (Mba1_McbistFir, bit(16)) ? defaultMaskedError;
 };
 
 ################################################################################
diff --git a/src/usr/diag/prdf/common/plat/pegasus/Membuf_regs_NEST.rule b/src/usr/diag/prdf/common/plat/pegasus/Membuf_regs_NEST.rule
index 7bf027415..fe0c0dbb8 100755
--- a/src/usr/diag/prdf/common/plat/pegasus/Membuf_regs_NEST.rule
+++ b/src/usr/diag/prdf/common/plat/pegasus/Membuf_regs_NEST.rule
@@ -215,10 +215,10 @@
     };
 
     ############################################################################
-    # NEST Chiplet MBSECC01FIR
+    # NEST Chiplet MBA0_MBSECCFIR
     ############################################################################
 
-    register MBSECC01FIR
+    register MBA0_MBSECCFIR
     {
         name        "MBU.MBS.ECC01.MBECCFIR";
         scomaddr    0x02011440;
@@ -228,14 +228,14 @@
         capture     group FirRegs;
     };
 
-    register MBSECC01FIR_AND
+    register MBA0_MBSECCFIR_AND
     {
         name        "MBU.MBS.ECC01.MBECCFIR_AND";
         scomaddr    0x02011441;
         capture     group never;
     };
 
-    register MBSECC01FIR_MASK
+    register MBA0_MBSECCFIR_MASK
     {
         name        "MBU.MBS.ECC01.MBECCFIR_MASK";
         scomaddr    0x02011443;
@@ -244,7 +244,7 @@
         capture     group FirRegs;
     };
 
-    register MBSECC01FIR_ACT0
+    register MBA0_MBSECCFIR_ACT0
     {
         name        "MBU.MBS.ECC01.MBECCFIR_ACTION0";
         scomaddr    0x02011446;
@@ -253,7 +253,7 @@
         capture     group FirRegs;
     };
 
-    register MBSECC01FIR_ACT1
+    register MBA0_MBSECCFIR_ACT1
     {
         name        "MBU.MBS.ECC01.MBECCFIR_ACTION1";
         scomaddr    0x02011447;
@@ -263,10 +263,10 @@
     };
 
     ############################################################################
-    # NEST Chiplet MBSECC23FIR
+    # NEST Chiplet MBA1_MBSECCFIR
     ############################################################################
 
-    register MBSECC23FIR
+    register MBA1_MBSECCFIR
     {
         name        "MBU.MBS.ECC23.MBECCFIR";
         scomaddr    0x02011480;
@@ -276,14 +276,14 @@
         capture     group FirRegs;
     };
 
-    register MBSECC23FIR_AND
+    register MBA1_MBSECCFIR_AND
     {
         name        "MBU.MBS.ECC23.MBECCFIR_AND";
         scomaddr    0x02011481;
         capture     group never;
     };
 
-    register MBSECC23FIR_MASK
+    register MBA1_MBSECCFIR_MASK
     {
         name        "MBU.MBS.ECC23.MBECCFIR_MASK";
         scomaddr    0x02011483;
@@ -292,7 +292,7 @@
         capture     group FirRegs;
     };
 
-    register MBSECC23FIR_ACT0
+    register MBA1_MBSECCFIR_ACT0
     {
         name        "MBU.MBS.ECC23.MBECCFIR_ACTION0";
         scomaddr    0x02011486;
@@ -301,7 +301,7 @@
         capture     group FirRegs;
     };
 
-    register MBSECC23FIR_ACT1
+    register MBA1_MBSECCFIR_ACT1
     {
         name        "MBU.MBS.ECC23.MBECCFIR_ACTION0";
         scomaddr    0x02011487;
@@ -311,10 +311,10 @@
     };
 
     ############################################################################
-    # NEST Chiplet MCBIST01FIR
+    # NEST Chiplet MBA0_MCBISTFIR
     ############################################################################
 
-    register MCBIST01FIR
+    register MBA0_MCBISTFIR
     {
         name        "MBU.MBS.MCBISTS01.SCOMFIR.MBSFIRQ";
         scomaddr    0x02011600;
@@ -324,7 +324,7 @@
         capture     group FirRegs;
     };
 
-    register MCBIST01FIR_MASK
+    register MBA0_MCBISTFIR_MASK
     {
         name        "MBU.MBS.MCBISTS01.SCOMFIR.MBSFIRMASK";
         scomaddr    0x02011603;
@@ -333,7 +333,7 @@
         capture     group FirRegs;
     };
 
-    register MCBIST01FIR_ACT0
+    register MBA0_MCBISTFIR_ACT0
     {
         name        "MBU.MBS.MCBISTS01.SCOMFIR.MBSFIRACTION0";
         scomaddr    0x02011606;
@@ -342,7 +342,7 @@
         capture     group FirRegs;
     };
 
-    register MCBIST01FIR_ACT1
+    register MBA0_MCBISTFIR_ACT1
     {
         name        "MBU.MBS.MCBISTS01.SCOMFIR.MBSFIRACTION1";
         scomaddr    0x02011607;
@@ -352,10 +352,10 @@
     };
 
     ############################################################################
-    # NEST Chiplet MCBIST23FIR
+    # NEST Chiplet MBA1_MCBISTFIR
     ############################################################################
 
-    register MCBIST23FIR
+    register MBA1_MCBISTFIR
     {
         name        "MBU.MBS.MCBISTS23.SCOMFIR.MBSFIRQ";
         scomaddr    0x02011700;
@@ -365,7 +365,7 @@
         capture     group FirRegs;
     };
 
-    register MCBIST23FIR_MASK
+    register MBA1_MCBISTFIR_MASK
     {
         name        "MBU.MBS.MCBISTS23.SCOMFIR.MBSFIRMASK";
         scomaddr    0x02011703;
@@ -374,7 +374,7 @@
         capture     group FirRegs;
     };
 
-    register MCBIST23FIR_ACT0
+    register MBA1_MCBISTFIR_ACT0
     {
         name        "MBU.MBS.MCBISTS23.SCOMFIR.MBSFIRACTION0";
         scomaddr    0x02011706;
@@ -383,7 +383,7 @@
         capture     group FirRegs;
     };
 
-    register MCBIST23FIR_ACT1
+    register MBA1_MCBISTFIR_ACT1
     {
         name        "MBU.MBS.MCBISTS23.SCOMFIR.MBSFIRACTION1";
         scomaddr    0x02011707;
@@ -498,7 +498,7 @@
         capture     group CerrRegs;
     };
 
-    register MBSECC01ERRPT_0
+    register MBA0_MBSECCERRPT_0
     {
         name        "MBU.MBS.ECC01.MBSECCERR0";
         scomaddr    0x02011466;
@@ -506,14 +506,14 @@
         capture     group CerrRegs;
     };
 
-    register MBSECC01ERRPT_1
+    register MBA0_MBSECCERRPT_1
     {
         name        "MBU.MBS.ECC01.MBSECCERR1";
         scomaddr    0x02011467;
         capture     group default;
         capture     group CerrRegs;
     };
-    register MBSECC23ERRPT_0
+    register MBA1_MBSECCERRPT_0
     {
         name        "MBU.MBS.ECC23.MBSECCERR0";
         scomaddr    0x020114A6;
@@ -521,7 +521,7 @@
         capture     group CerrRegs;
     };
 
-    register MBSECC23ERRPT_1
+    register MBA1_MBSECCERRPT_1
     {
         name        "MBU.MBS.ECC23.MBSECCERR1";
         scomaddr    0x020114A7;
@@ -529,7 +529,7 @@
         capture     group CerrRegs;
     };
 
-    register MBXERRSTAT_0
+    register MBA0_MBXERRSTAT
     {
         name        "MBU.MBS.MCBISTS01.SCOMFIR.MBXERRSTATQ";
         scomaddr    0x0201168f;
@@ -537,7 +537,7 @@
         capture     group CerrRegs;
     };
 
-    register MBXERRSTAT_1
+    register MBA1_MBXERRSTAT
     {
         name        "MBU.MBS.MCBISTS23.SCOMFIR.MBXERRSTATQ";
         scomaddr    0x0201178f;
@@ -557,74 +557,74 @@
     # Memory ECC Error Address Registers
     ############################################################################
 
-    register MBNCER_0
+    register MBA0_MBNCER
     {
-        name        "MBS Memory NCE Error Address 0 Register";
+        name        "MBA0: MBS Memory NCE Error Address Register";
         scomaddr    0x02011660;
         capture     group default;
     };
 
-    register MBRCER_0
+    register MBA0_MBRCER
     {
-        name        "MBS Memory RCE Error Address 0 Register";
+        name        "MBA0: MBS Memory RCE Error Address Register";
         scomaddr    0x02011661;
         capture     group default;
     };
 
-    register MBMPER_0
+    register MBA0_MBMPER
     {
-        name        "MBS Memory MPE Error Address 0 Register";
+        name        "MBA0: MBS Memory MPE Error Address Register";
         scomaddr    0x02011662;
         capture     group default;
     };
 
-    register MBUER_0
+    register MBA0_MBUER
     {
-        name        "MBS Memory UE Error Address 0 Register";
+        name        "MBA0: MBS Memory UE Error Address Register";
         scomaddr    0x02011663;
         capture     group default;
     };
 
-    register MBNCER_1
+    register MBA1_MBNCER
     {
-        name        "MBS Memory NCE Error Address 1 Register";
+        name        "MBA1: MBS Memory NCE Error Address Register";
         scomaddr    0x02011760;
         capture     group default;
     };
 
-    register MBRCER_1
+    register MBA1_MBRCER
     {
-        name        "MBS Memory RCE Error Address 1 Register";
+        name        "MBA1: MBS Memory RCE Error Address Register";
         scomaddr    0x02011761;
         capture     group default;
     };
 
-    register MBMPER_1
+    register MBA1_MBMPER
     {
-        name        "MBS Memory MPE Error Address 1 Register";
+        name        "MBA1: MBS Memory MPE Error Address Register";
         scomaddr    0x02011762;
         capture     group default;
     };
 
-    register MBUER_1
+    register MBA1_MBUER
     {
-        name        "MBS Memory UE Error Address 1 Register";
+        name        "MBA1: MBS Memory UE Error Address Register";
         scomaddr    0x02011763;
         capture     group default;
     };
 
     ############################################################################
-    # NEST Chiplet memory scrub/read threshold register
+    # NEST Chiplet memory maintenance threshold control registers
     ############################################################################
 
-    register MBSTR_0
+    register MBA0_MBSTR
     {
         name        "MBU.MBS.MCBISTS01.SCOMFIR.MBSTRQ";
         scomaddr    0x02011655;
         capture     group default;
     };
 
-    register MBSTR_1
+    register MBA1_MBSTR
     {
         name        "MBU.MBS.MCBISTS23.SCOMFIR.MBSTRQ";
         scomaddr    0x02011755;
diff --git a/src/usr/diag/prdf/common/plat/pegasus/prdfCenAddress.C b/src/usr/diag/prdf/common/plat/pegasus/prdfCenAddress.C
index 2ea5c9e80..9356ea3d7 100755
--- a/src/usr/diag/prdf/common/plat/pegasus/prdfCenAddress.C
+++ b/src/usr/diag/prdf/common/plat/pegasus/prdfCenAddress.C
@@ -43,15 +43,15 @@ using namespace PlatServices;
 //                       MBS Address Registers
 //------------------------------------------------------------------------------
 
-CenReadAddrReg READ_NCE_ADDR_0 = "MBNCER_0";
-CenReadAddrReg READ_RCE_ADDR_0 = "MBRCER_0";
-CenReadAddrReg READ_MPE_ADDR_0 = "MBMPER_0";
-CenReadAddrReg READ_UE_ADDR_0  = "MBUER_0";
-
-CenReadAddrReg READ_NCE_ADDR_1 = "MBNCER_1";
-CenReadAddrReg READ_RCE_ADDR_1 = "MBRCER_1";
-CenReadAddrReg READ_MPE_ADDR_1 = "MBMPER_1";
-CenReadAddrReg READ_UE_ADDR_1  = "MBUER_1";
+CenReadAddrReg READ_NCE_ADDR_0 = "MBA0_MBNCER";
+CenReadAddrReg READ_RCE_ADDR_0 = "MBA0_MBRCER";
+CenReadAddrReg READ_MPE_ADDR_0 = "MBA0_MBMPER";
+CenReadAddrReg READ_UE_ADDR_0  = "MBA0_MBUER";
+
+CenReadAddrReg READ_NCE_ADDR_1 = "MBA1_MBNCER";
+CenReadAddrReg READ_RCE_ADDR_1 = "MBA1_MBRCER";
+CenReadAddrReg READ_MPE_ADDR_1 = "MBA1_MBMPER";
+CenReadAddrReg READ_UE_ADDR_1  = "MBA1_MBUER";
 
 //------------------------------------------------------------------------------
 
diff --git a/src/usr/diag/prdf/common/plat/pegasus/prdfCenAddress.H b/src/usr/diag/prdf/common/plat/pegasus/prdfCenAddress.H
index da0fd305d..9e616dfe6 100755
--- a/src/usr/diag/prdf/common/plat/pegasus/prdfCenAddress.H
+++ b/src/usr/diag/prdf/common/plat/pegasus/prdfCenAddress.H
@@ -300,15 +300,15 @@ class CenAddr
 
 typedef const char * const CenReadAddrReg;
 
-extern CenReadAddrReg READ_NCE_ADDR_0; ///< For the MBNCER_0 register
-extern CenReadAddrReg READ_RCE_ADDR_0; ///< For the MBRCER_0 register
-extern CenReadAddrReg READ_MPE_ADDR_0; ///< For the MBMPER_0 register
-extern CenReadAddrReg READ_UE_ADDR_0;  ///< For the MBUER_0 register
-
-extern CenReadAddrReg READ_NCE_ADDR_1; ///< For the MBNCER_1 register
-extern CenReadAddrReg READ_RCE_ADDR_1; ///< For the MBRCER_1 register
-extern CenReadAddrReg READ_MPE_ADDR_1; ///< For the MBMPER_1 register
-extern CenReadAddrReg READ_UE_ADDR_1;  ///< For the MBUER_1 register
+extern CenReadAddrReg READ_NCE_ADDR_0; ///< For the MBA0_MBNCER register
+extern CenReadAddrReg READ_RCE_ADDR_0; ///< For the MBA0_MBRCER register
+extern CenReadAddrReg READ_MPE_ADDR_0; ///< For the MBA0_MBMPER register
+extern CenReadAddrReg READ_UE_ADDR_0;  ///< For the MBA0_MBUER register
+
+extern CenReadAddrReg READ_NCE_ADDR_1; ///< For the MBA1_MBNCER register
+extern CenReadAddrReg READ_RCE_ADDR_1; ///< For the MBA1_MBRCER register
+extern CenReadAddrReg READ_MPE_ADDR_1; ///< For the MBA1_MBMPER register
+extern CenReadAddrReg READ_UE_ADDR_1;  ///< For the MBA1_MBUER register
 
 /**
  * @brief  Reads the specified mainline memory read address from hardware.
diff --git a/src/usr/diag/prdf/plat/pegasus/prdfCenMbaTdCtlr.C b/src/usr/diag/prdf/plat/pegasus/prdfCenMbaTdCtlr.C
index 40f7b51a4..e329f15df 100644
--- a/src/usr/diag/prdf/plat/pegasus/prdfCenMbaTdCtlr.C
+++ b/src/usr/diag/prdf/plat/pegasus/prdfCenMbaTdCtlr.C
@@ -796,7 +796,7 @@ int32_t CenMbaTdCtlr::checkEccErrors( uint8_t & o_eccErrorMask )
         }
 
         const char * reg_str = ( 0 == getTargetPosition(mba) )
-                                    ? "MBSECC01FIR" : "MBSECC23FIR";
+                                    ? "MBA0_MBSECCFIR" : "MBA1_MBSECCFIR";
         SCAN_COMM_REGISTER_CLASS * mbsEccFir = membChip->getRegister( reg_str );
 
         o_rc = mbsEccFir->Read();
@@ -1240,7 +1240,7 @@ int32_t CenMbaTdCtlr::prepareNextCmd()
         // Clear ECC counters
         //----------------------------------------------------------------------
 
-        const char * reg_str = ( 0 == mbaPos ) ? "MBSTR_0" : "MBSTR_1";
+        const char * reg_str = ( 0 == mbaPos ) ? "MBA0_MBSTR" : "MBA1_MBSTR";
         SCAN_COMM_REGISTER_CLASS * mbstr = membChip->getRegister( reg_str );
         o_rc = mbstr->Read();
         if ( SUCCESS != o_rc )
@@ -1268,7 +1268,7 @@ int32_t CenMbaTdCtlr::prepareNextCmd()
         // Clear ECC FIRs
         //----------------------------------------------------------------------
 
-        reg_str = ( 0 == mbaPos ) ? "MBSECC01FIR_AND" : "MBSECC23FIR_AND";
+        reg_str = ( 0 == mbaPos ) ? "MBA0_MBSECCFIR_AND" : "MBA1_MBSECCFIR_AND";
         SCAN_COMM_REGISTER_CLASS * firand = membChip->getRegister( reg_str );
         firand->setAllBits();