diff options
| author | Caleb Palmer <cnpalmer@us.ibm.com> | 2019-03-18 15:34:01 -0500 |
|---|---|---|
| committer | Zane C. Shelley <zshelle@us.ibm.com> | 2019-04-01 10:14:12 -0500 |
| commit | 16024c9f92fa83ea5e010b31a744f9d8ef847c1e (patch) | |
| tree | f904067a4442fc6214a44e1084b6b1059e761c1b /src/usr/diag/prdf | |
| parent | 4046e66acfb6aca175d167de2ec3b89846bf68e5 (diff) | |
| download | talos-hostboot-16024c9f92fa83ea5e010b31a744f9d8ef847c1e.tar.gz talos-hostboot-16024c9f92fa83ea5e010b31a744f9d8ef847c1e.zip | |
PRD: Axone PlatServices and Misc Updates
Change-Id: I309daf7cd47470542c7486307cdbe576986c29b4
RTC: 206186
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/74863
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Brian J. Stegmiller <bjs@us.ibm.com>
Reviewed-by: Benjamen G. Tyner <ben.tyner@ibm.com>
Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75185
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
Diffstat (limited to 'src/usr/diag/prdf')
| -rw-r--r-- | src/usr/diag/prdf/common/plat/mem/prdfMemCaptureData.C | 4 | ||||
| -rw-r--r-- | src/usr/diag/prdf/common/plat/prdfPlatServices_common.C | 201 | ||||
| -rwxr-xr-x | src/usr/diag/prdf/common/plat/prdfPlatServices_common.H | 23 | ||||
| -rwxr-xr-x | src/usr/diag/prdf/common/plat/prdfTargetServices.C | 20 | ||||
| -rwxr-xr-x | src/usr/diag/prdf/common/plat/prdfTargetServices.H | 2 | ||||
| -rw-r--r-- | src/usr/diag/prdf/common/plugins/prdfParserEnums.H | 2 | ||||
| -rw-r--r-- | src/usr/diag/prdf/plat/mem/prdfMemScrubUtils.C | 21 | ||||
| -rw-r--r-- | src/usr/diag/prdf/plat/prdfPlatServices.C | 298 | ||||
| -rw-r--r-- | src/usr/diag/prdf/plat/prdfPlatServices_ipl.C | 152 | ||||
| -rw-r--r-- | src/usr/diag/prdf/plat/prdfPlatServices_ipl.H | 10 | ||||
| -rw-r--r-- | src/usr/diag/prdf/plat/prdfPlatServices_rt.C | 106 | ||||
| -rw-r--r-- | src/usr/diag/prdf/plat/prdfPlatServices_rt.H | 4 |
12 files changed, 818 insertions, 25 deletions
diff --git a/src/usr/diag/prdf/common/plat/mem/prdfMemCaptureData.C b/src/usr/diag/prdf/common/plat/mem/prdfMemCaptureData.C index 7ca8c1e86..554a89849 100644 --- a/src/usr/diag/prdf/common/plat/mem/prdfMemCaptureData.C +++ b/src/usr/diag/prdf/common/plat/mem/prdfMemCaptureData.C @@ -97,6 +97,10 @@ void addExtMemMruData( const MemoryMru & i_memMru, errlHndl_t io_errl ) { getDimmDqAttr<TYPE_DIMM>(partList[0], extMemMru.dqMapping); } + else if ( TYPE_MEM_PORT == getTargetType(trgt) ) + { + getDimmDqAttr<TYPE_MEM_PORT>( trgt, extMemMru.dqMapping ); + } else { PRDF_ERR( PRDF_FUNC "Invalid target type." ); diff --git a/src/usr/diag/prdf/common/plat/prdfPlatServices_common.C b/src/usr/diag/prdf/common/plat/prdfPlatServices_common.C index d72e0a5c0..f99427d61 100644 --- a/src/usr/diag/prdf/common/plat/prdfPlatServices_common.C +++ b/src/usr/diag/prdf/common/plat/prdfPlatServices_common.C @@ -638,7 +638,7 @@ uint32_t __getBadDqBitmap( TargetHandle_t i_trgt, const MemRank & i_rank, BitmapData data; - for ( uint32_t ps = 0; ps < MAX_MEM_PORT; ps++ ) + for ( uint32_t ps = 0; ps < MAX_SUB_PORT; ps++ ) { // Skip if the DIMM doesn't exist if ( nullptr == getConnectedDimm(i_trgt, i_rank, ps) ) continue; @@ -825,6 +825,7 @@ uint32_t clearBadDqBitmap( TargetHandle_t i_trgt, const MemRank & i_rank ) //------------------------------------------------------------------------------ + template<> void getDimmDqAttr<TYPE_MCA>( TargetHandle_t i_target, uint8_t (&o_dqMapPtr)[DQS_PER_DIMM] ) @@ -850,6 +851,27 @@ void getDimmDqAttr<TYPE_MCA>( TargetHandle_t i_target, } // end function getDimmDqAttr template<> +void getDimmDqAttr<TYPE_MEM_PORT>( TargetHandle_t i_target, + uint8_t (&o_dqMapPtr)[DQS_PER_DIMM] ) +{ + #define PRDF_FUNC "[PlatServices::getDimmDqAttr<TYPE_MEM_PORT>] " + + PRDF_ASSERT( TYPE_MEM_PORT == getTargetType(i_target) ); + + uint8_t tmpData[DQS_PER_DIMM]; + + if ( !i_target->tryGetAttr<ATTR_MEM_VPD_DQ_MAP>(tmpData) ) + { + PRDF_ERR( PRDF_FUNC "Failed to get ATTR_MEM_VPD_DQ_MAP" ); + PRDF_ASSERT( false ); + } + + memcpy( &o_dqMapPtr[0], &tmpData[0], DQS_PER_DIMM ); + + #undef PRDF_FUNC +} // end function getDimmDqAttr + +template<> void getDimmDqAttr<TYPE_DIMM>( TargetHandle_t i_target, uint8_t (&o_dqMapPtr)[DQS_PER_DIMM] ) { @@ -872,7 +894,9 @@ void getDimmDqAttr<TYPE_DIMM>( TargetHandle_t i_target, #undef PRDF_FUNC } // end function getDimmDqAttr + //------------------------------------------------------------------------------ + template<> int32_t mssGetSteerMux<TYPE_MCA>( TargetHandle_t i_mca, const MemRank & i_rank, @@ -922,6 +946,46 @@ int32_t mssGetSteerMux<TYPE_MBA>( TargetHandle_t i_mba, const MemRank & i_rank, return o_rc; } +template<> +int32_t mssGetSteerMux<TYPE_MEM_PORT>( TargetHandle_t i_memPort, + const MemRank & i_rank, + MemSymbol & o_port0Spare, + MemSymbol & o_port1Spare, + MemSymbol & o_eccSpare ) +{ + int32_t o_rc = SUCCESS; + + /* TODO RTC 207273 - sparing support + + // called by FSP code so can't just move to hostboot side +#ifdef __HOSTBOOT_MODULE + errlHndl_t errl = NULL; + + uint8_t port0Spare, port1Spare, eccSpare; + + fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT> fapiPort(i_memPort); + FAPI_INVOKE_HWP( errl, mss_check_steering, fapiPort, + i_rank.getMaster(), port0Spare, port1Spare, eccSpare ); + + if ( NULL != errl ) + { + PRDF_ERR( "[PlatServices::mssGetSteerMux] mss_check_steering() " + "failed. HUID: 0x%08x rank: %d", + getHuid(i_memPort), i_rank.getMaster() ); + PRDF_COMMIT_ERRL( errl, ERRL_ACTION_REPORT ); + o_rc = FAIL; + } + else + { + o_port0Spare = MemSymbol::fromSymbol( i_memPort, i_rank, port0Spare ); + o_port1Spare = MemSymbol::fromSymbol( i_memPort, i_rank, port1Spare ); + o_eccSpare = MemSymbol::fromSymbol( i_memPort, i_rank, eccSpare ); + } +#endif + */ + + return o_rc; +} //------------------------------------------------------------------------------ @@ -955,10 +1019,44 @@ int32_t mssSetSteerMux<TYPE_MBA>( TargetHandle_t i_mba, const MemRank & i_rank, return o_rc; } +template<> +int32_t mssSetSteerMux<TYPE_MEM_PORT>( TargetHandle_t i_memPort, + const MemRank & i_rank, const MemSymbol & i_symbol, bool i_x4EccSpare ) +{ + int32_t o_rc = SUCCESS; + + /* TODO RTC 207273 - sparing support + +#ifdef __HOSTBOOT_MODULE + errlHndl_t errl = NULL; + fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT> fapiPort(i_memPort); + + uint8_t l_dramSymbol = PARSERUTILS::dram2Symbol<TYPE_MBA>( + i_symbol.getDram(), + isDramWidthX4(i_memPort) ); + + FAPI_INVOKE_HWP( errl, mss_do_steering, fapiPort, + i_rank.getMaster(), l_dramSymbol, + i_x4EccSpare ); + + if ( NULL != errl ) + { + PRDF_ERR( "[PlatServices::mssSetSteerMux] mss_do_steering " + "failed. HUID: 0x%08x rank: %d symbol: %d eccSpare: %c", + getHuid(i_memPort), i_rank.getMaster(), l_dramSymbol, + i_x4EccSpare ? 'T' : 'F' ); + PRDF_COMMIT_ERRL( errl, ERRL_ACTION_REPORT ); + o_rc = FAIL; + } +#endif + */ + return o_rc; +} + //------------------------------------------------------------------------------ template<> -int32_t getDimmSpareConfig<TYPE_MCA>( TargetHandle_t i_mba, MemRank i_rank, +int32_t getDimmSpareConfig<TYPE_MCA>( TargetHandle_t i_mca, MemRank i_rank, uint8_t i_ps, uint8_t & o_spareConfig ) { // No spares for MCAs @@ -967,6 +1065,63 @@ int32_t getDimmSpareConfig<TYPE_MCA>( TargetHandle_t i_mba, MemRank i_rank, } template<> +int32_t getDimmSpareConfig<TYPE_MEM_PORT>( TargetHandle_t i_memPort, + MemRank i_rank, uint8_t i_ps, uint8_t & o_spareConfig ) +{ + #define PRDF_FUNC "[PlatServices::getDimmSpareConfig] " + int32_t o_rc = SUCCESS; + +#ifdef __HOSTBOOT_MODULE + using namespace fapi2; + + ATTR_MEM_EFF_DIMM_SPARE_Type attr; + o_spareConfig = ENUM_ATTR_MEM_EFF_DIMM_SPARE_NO_SPARE; + do + { + if( TYPE_MEM_PORT != getTargetType( i_memPort ) ) + { + PRDF_ERR( PRDF_FUNC "Invalid Target:0x%08X", getHuid( i_memPort ) ); + o_rc = FAIL; break; + } + + fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT> fapiPort(i_memPort); + ReturnCode l_rc = FAPI_ATTR_GET( fapi2::ATTR_MEM_EFF_DIMM_SPARE, + fapiPort, attr ); + errlHndl_t errl = fapi2::rcToErrl(l_rc); + if ( NULL != errl ) + { + PRDF_ERR( PRDF_FUNC "Failed to get ATTR_MEM_EFF_DIMM_SPARE for " + "Target: 0x%08X", getHuid( i_memPort ) ); + PRDF_COMMIT_ERRL( errl, ERRL_ACTION_REPORT ); + o_rc = FAIL; break; + } + o_spareConfig = attr[i_rank.getDimmSlct()][i_rank.getRankSlct()]; + + // Check for valid values + // For X4 DRAM, we can not have full byte as spare config. Also for X8 + // DRAM we can not have nibble as spare. + + if( ENUM_ATTR_MEM_EFF_DIMM_SPARE_NO_SPARE == o_spareConfig) break; + + bool isFullByte = ( ENUM_ATTR_MEM_EFF_DIMM_SPARE_FULL_BYTE == + o_spareConfig ); + bool isX4Dram = isDramWidthX4(i_memPort); + + if ( ( isX4Dram && isFullByte ) || ( !isX4Dram && !isFullByte ) ) + { + PRDF_ERR( PRDF_FUNC "Invalid Configuration: o_spareConfig:%u", + o_spareConfig ); + o_rc = FAIL; break; + } + + }while(0); +#endif + + return o_rc; + #undef PRDF_FUNC +} + +template<> int32_t getDimmSpareConfig<TYPE_MBA>( TargetHandle_t i_mba, MemRank i_rank, uint8_t i_ps, uint8_t & o_spareConfig ) { @@ -1041,6 +1196,48 @@ uint32_t isDramSparingEnabled<TYPE_MCA>( TARGETING::TargetHandle_t i_trgt, } template<> +uint32_t isDramSparingEnabled<TYPE_MEM_PORT>( TARGETING::TargetHandle_t i_trgt, + MemRank i_rank, uint8_t i_ps, + bool & o_spareEnable ) +{ + #define PRDF_FUNC "[PlatServices::isDramSparingEnabled<TYPE_MEM_PORT>] " + + uint32_t o_rc = SUCCESS; + o_spareEnable = false; + + do + { + const bool isX4 = isDramWidthX4( i_trgt ); + if ( isX4 ) + { + // Always an ECC spare in x4 mode. + o_spareEnable = true; + break; + } + + // Check for any DRAM spares. + // TODO RTC 207273 - no TARGETING support for attr yet + //uint8_t cnfg = TARGETING::MEM_EFF_DIMM_SPARE_NO_SPARE; + uint8_t cnfg = 0; + o_rc = getDimmSpareConfig<TYPE_MEM_PORT>( i_trgt, i_rank, i_ps, cnfg ); + if ( SUCCESS != o_rc ) + { + PRDF_ERR( PRDF_FUNC "getDimmSpareConfig(0x%08x,0x%02x,%d) " + "failed", getHuid(i_trgt), i_rank.getKey(), i_ps ); + break; + } + // TODO RTC 207273 - no TARGETING support for attr yet + //o_spareEnable = (TARGETING::MEM_EFF_DIMM_SPARE_NO_SPARE; != cnfg); + o_spareEnable = (0 != cnfg); + + }while(0); + + return o_rc; + + #undef PRDF_FUNC +} + +template<> uint32_t isDramSparingEnabled<TYPE_MBA>( TARGETING::TargetHandle_t i_trgt, MemRank i_rank, uint8_t i_ps, bool & o_spareEnable ) diff --git a/src/usr/diag/prdf/common/plat/prdfPlatServices_common.H b/src/usr/diag/prdf/common/plat/prdfPlatServices_common.H index 856fe72f1..5d41d96e0 100755 --- a/src/usr/diag/prdf/common/plat/prdfPlatServices_common.H +++ b/src/usr/diag/prdf/common/plat/prdfPlatServices_common.H @@ -225,7 +225,7 @@ uint32_t clearBadDqBitmap( TARGETING::TargetHandle_t i_trgt, /** * @brief Invokes the get steer mux hardware procedure. - * @param i_mba Target MBA/MCA + * @param i_trgt Target MBA/MCA/MEM_PORT * @param i_rank Target rank. * @param o_port0Spare A symbol associated with the spare on port 0. * @param o_port1Spare A symbol associated with the spare on port 1. @@ -233,13 +233,13 @@ uint32_t clearBadDqBitmap( TARGETING::TargetHandle_t i_trgt, * @return Non-SUCCESS in internal function fails, SUCCESS otherwise. */ template<TARGETING::TYPE T> -int32_t mssGetSteerMux( TARGETING::TargetHandle_t i_mba, const MemRank & i_rank, - MemSymbol & o_port0Spare, MemSymbol & o_port1Spare, - MemSymbol & o_eccSpare ); +int32_t mssGetSteerMux( TARGETING::TargetHandle_t i_trgt, + const MemRank & i_rank, MemSymbol & o_port0Spare, + MemSymbol & o_port1Spare, MemSymbol & o_eccSpare ); /** * @brief Invokes the set steer mux hardware procedure. - * @param i_mba Target MBA. + * @param i_trgt Target MBA/MEM_PORT. * @param i_rank Target rank. * @param i_symbol A symbol associated with the DRAM to be spared. * @param i_x4EccSpare If true, will set ECC spare instead (x4 mode only). @@ -247,12 +247,13 @@ int32_t mssGetSteerMux( TARGETING::TargetHandle_t i_mba, const MemRank & i_rank, * @return Non-SUCCESS in internal function fails, SUCCESS otherwise. */ template<TARGETING::TYPE T> -int32_t mssSetSteerMux( TARGETING::TargetHandle_t i_mba, const MemRank & i_rank, - const MemSymbol & i_symbol, bool i_x4EccSpare ); +int32_t mssSetSteerMux( TARGETING::TargetHandle_t i_trgt, + const MemRank & i_rank, const MemSymbol & i_symbol, + bool i_x4EccSpare ); /** * @brief Get spare DRAM information on a DIMM. - * @param i_mba MBA/MCA target. + * @param i_trgt MBA/MCA/MEM_PORT target. * @param i_rank Rank. * @param i_ps MBA port select. * @param o_spareConfig Spare DRAM config information. @@ -262,12 +263,12 @@ int32_t mssSetSteerMux( TARGETING::TargetHandle_t i_mba, const MemRank & i_rank, * populate spare config information in o_spareConfig. */ template<TARGETING::TYPE T> -int32_t getDimmSpareConfig( TARGETING::TargetHandle_t i_mba, MemRank i_rank, +int32_t getDimmSpareConfig( TARGETING::TargetHandle_t i_trgt, MemRank i_rank, uint8_t i_ps, uint8_t & o_spareConfig ); /** * @brief Checks if DRAM sparing is enabled. - * @param i_trgt Target MBA + * @param i_trgt Target MBA/MEM_PORT * @param i_rank Target rank * @param i_ps MBA Port select * @param o_spareEnable Whether DRAM sparing is enabled or not. @@ -279,7 +280,7 @@ uint32_t isDramSparingEnabled( TARGETING::TargetHandle_t i_trgt, MemRank i_rank, /** * @brief Checks to see if the spares are available on given target and port. - * @param i_trgt Target MBA + * @param i_trgt Target MBA/MEM_PORT * @param i_rank Target rank * @param i_ps Port select * @param o_spAvail If the spare on inputted port select is available diff --git a/src/usr/diag/prdf/common/plat/prdfTargetServices.C b/src/usr/diag/prdf/common/plat/prdfTargetServices.C index 70686a765..ffe294e95 100755 --- a/src/usr/diag/prdf/common/plat/prdfTargetServices.C +++ b/src/usr/diag/prdf/common/plat/prdfTargetServices.C @@ -1471,6 +1471,8 @@ bool isDramWidthX4( TargetHandle_t i_trgt ) bool o_dramWidthX4 = false; PRDF_ASSERT( nullptr != i_trgt ); + //uint8_t dramWidths = 0; + switch ( getTargetType(i_trgt) ) { case TYPE_MCA: @@ -1482,6 +1484,15 @@ bool isDramWidthX4( TargetHandle_t i_trgt ) i_trgt->getAttr<ATTR_CEN_EFF_DRAM_WIDTH>() ); break; + case TYPE_DIMM: + // TODO RTC 207273 - attribute not in TARGETING code yet + //TargetHandle_t memPort = getConnectedParent(i_trgt, TYPE_MEM_PORT); + //dramWidths = memPort->getAttr<ATTR_MEM_EFF_DRAM_WIDTH>(); + //uint8_t dimmSlct = getDimmSlct( i_trgt ); + //o_dramWidthX4 = + // (fapi2::ENUM_ATTR_MEM_EFF_DRAM_WIDTH_X4 == dramWidths[dimmSlct]); + break; + default: PRDF_ASSERT(false); // code bug } @@ -1573,6 +1584,15 @@ void getMasterRanks<TYPE_MBA>( TargetHandle_t i_trgt, __getMasterRanks<TYPE_MBA>( i_trgt, o_ranks, 0, i_ds ); } +template<> +void getMasterRanks<TYPE_MEM_PORT>( TargetHandle_t i_trgt, + std::vector<MemRank> & o_ranks, + uint8_t i_ds ) +{ + // TODO RTC 207273 - no support for ATTR_EFF_DIMM_RANKS_CONFIGED attr yet + //__getMasterRanks<TYPE_MEM_PORT>( i_trgt, o_ranks, 0, i_ds ); +} + //------------------------------------------------------------------------------ template<TARGETING::TYPE T> diff --git a/src/usr/diag/prdf/common/plat/prdfTargetServices.H b/src/usr/diag/prdf/common/plat/prdfTargetServices.H index ed2ea80ef..b69806736 100755 --- a/src/usr/diag/prdf/common/plat/prdfTargetServices.H +++ b/src/usr/diag/prdf/common/plat/prdfTargetServices.H @@ -406,7 +406,7 @@ uint8_t getDimmSlct( TARGETING::TargetHandle_t i_trgt ); /** * @brief checks dram width ( x4 ) - * @param i_trgt MCA or MBA target + * @param i_trgt MCA, MBA, or DIMM target * @return true if DRAM width is X4, false otherwise */ bool isDramWidthX4(TARGETING::TargetHandle_t i_trgt); diff --git a/src/usr/diag/prdf/common/plugins/prdfParserEnums.H b/src/usr/diag/prdf/common/plugins/prdfParserEnums.H index d0d5ce589..af346e57b 100644 --- a/src/usr/diag/prdf/common/plugins/prdfParserEnums.H +++ b/src/usr/diag/prdf/common/plugins/prdfParserEnums.H @@ -112,7 +112,7 @@ enum PositionBounds MAX_OCMB_PER_OMI = 1, - MAX_MEM_PORT = 2, + MAX_SUB_PORT = 2, MAX_NPU_PER_PROC = 3, diff --git a/src/usr/diag/prdf/plat/mem/prdfMemScrubUtils.C b/src/usr/diag/prdf/plat/mem/prdfMemScrubUtils.C index 45b8bd3fc..84dd2d2f8 100644 --- a/src/usr/diag/prdf/plat/mem/prdfMemScrubUtils.C +++ b/src/usr/diag/prdf/plat/mem/prdfMemScrubUtils.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016,2018 */ +/* Contributors Listed Below - COPYRIGHT 2016,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -95,6 +95,25 @@ uint32_t clearCmdCompleteAttn<TYPE_MCA>( ExtensibleChip * i_chip ) } template<> +uint32_t clearCmdCompleteAttn<TYPE_OCMB_CHIP>( ExtensibleChip * i_chip ) +{ + // Clear MCBISTFIR[10]. + return __clearFir<TYPE_OCMB_CHIP>( i_chip, "MCBISTFIR_AND", + 0xffdfffffffffffffull ); +} + +template<> +uint32_t clearCmdCompleteAttn<TYPE_MEM_PORT>( ExtensibleChip * i_chip ) +{ + PRDF_ASSERT( nullptr != i_chip ); + PRDF_ASSERT( TYPE_MEM_PORT == i_chip->getType() ); + + ExtensibleChip * ocmbChip = getConnectedParent( i_chip, TYPE_OCMB_CHIP ); + + return clearCmdCompleteAttn<TYPE_OCMB_CHIP>( ocmbChip ); +} + +template<> uint32_t clearCmdCompleteAttn<TYPE_MBA>( ExtensibleChip * i_chip ) { // Clear MBASPA[0,8]. diff --git a/src/usr/diag/prdf/plat/prdfPlatServices.C b/src/usr/diag/prdf/plat/prdfPlatServices.C index cf36f634d..8c17c2fd9 100644 --- a/src/usr/diag/prdf/plat/prdfPlatServices.C +++ b/src/usr/diag/prdf/plat/prdfPlatServices.C @@ -387,6 +387,48 @@ uint32_t getMemAddrRange<TYPE_MCA>( ExtensibleChip * i_chip, //------------------------------------------------------------------------------ template<> +uint32_t getMemAddrRange<TYPE_MEM_PORT>( ExtensibleChip * i_chip, + const MemRank & i_rank, + mss::mcbist::address & o_startAddr, + mss::mcbist::address & o_endAddr, + AddrRangeType i_rangeType ) +{ + #define PRDF_FUNC "[PlatServices::getMemAddrRange<TYPE_MEM_PORT>] " + + PRDF_ASSERT( nullptr != i_chip ); + PRDF_ASSERT( TYPE_MEM_PORT == i_chip->getType() ); + + /* TODO RTC 207273 - no HWP support yet + uint32_t port = i_chip->getPos() % MAX_PORT_PER_OCMB; + + if ( SLAVE_RANK == i_rangeType ) + { + FAPI_CALL_HWP_NORETURN( mss::mcbist::address::get_srank_range, + port, i_rank.getDimmSlct(), + i_rank.getRankSlct(), i_rank.getSlave(), + o_startAddr, o_endAddr ); + } + else if ( MASTER_RANK == i_rangeType ) + { + FAPI_CALL_HWP_NORETURN( mss::mcbist::address::get_mrank_range, + port, i_rank.getDimmSlct(), + i_rank.getRankSlct(), o_startAddr, o_endAddr ); + } + else + { + PRDF_ERR( PRDF_FUNC "unsupported range type %d", i_rangeType ); + PRDF_ASSERT(false); + } + */ + + return SUCCESS; + + #undef PRDF_FUNC +} + +//------------------------------------------------------------------------------ + +template<> uint32_t getMemAddrRange<TYPE_MBA>( ExtensibleChip * i_chip, const MemRank & i_rank, fapi2::buffer<uint64_t> & o_startAddr, @@ -478,6 +520,27 @@ uint32_t getMemAddrRange<TYPE_MCA>( ExtensibleChip * i_chip, //------------------------------------------------------------------------------ template<> +uint32_t getMemAddrRange<TYPE_MEM_PORT>( ExtensibleChip * i_chip, + const MemRank & i_rank, + MemAddr & o_startAddr, + MemAddr & o_endAddr, + AddrRangeType i_rangeType ) +{ + mss::mcbist::address saddr, eaddr; + uint32_t o_rc = getMemAddrRange<TYPE_MEM_PORT>( i_chip, i_rank, saddr, + eaddr, i_rangeType ); + if ( SUCCESS == o_rc ) + { + o_startAddr = __convertMssMcbistAddr( saddr ); + o_endAddr = __convertMssMcbistAddr( eaddr ); + } + + return o_rc; +} + +//------------------------------------------------------------------------------ + +template<> uint32_t getMemAddrRange<TYPE_MBA>( ExtensibleChip * i_chip, const MemRank & i_rank, MemAddr & o_startAddr, @@ -566,6 +629,18 @@ uint32_t getMemAddrRange<TYPE_MCA>( ExtensibleChip * i_chip, MemAddr & o_startAddr, MemAddr & o_endAddr, uint8_t i_dimmSlct ); +template +uint32_t getMemAddrRange<TYPE_MEM_PORT>( ExtensibleChip * i_chip, + mss::mcbist::address & o_startAddr, + mss::mcbist::address & o_endAddr, + uint8_t i_dimmSlct ); + +template +uint32_t getMemAddrRange<TYPE_MEM_PORT>( ExtensibleChip * i_chip, + MemAddr & o_startAddr, + MemAddr & o_endAddr, + uint8_t i_dimmSlct ); + //------------------------------------------------------------------------------ template<> @@ -620,6 +695,50 @@ bool isRowRepairEnabled<TYPE_MCA>( ExtensibleChip * i_chip, return false; // Not supported at this time. } +template<> +bool isRowRepairEnabled<TYPE_MEM_PORT>( ExtensibleChip * i_chip, + const MemRank & i_rank ) +{ + #define PRDF_FUNC "[PlatServices::isRowRepairEnabled<TYPE_MEM_PORT>] " + + PRDF_ASSERT( nullptr != i_chip ); + PRDF_ASSERT( TYPE_MEM_PORT == i_chip->getType() ); + + bool o_isEnabled = false; + + /* TODO RTC 207273 - no HWP support yet + do + { + // Don't do row repair if DRAM repairs is disabled. + if ( areDramRepairsDisabled() ) break; + + // The HWP will check both DIMMs on rank pair. So we could can use + // either one. + TargetHandleList list = getConnectedDimms( i_chip->getTrgt(), i_rank ); + PRDF_ASSERT( !list.empty() ); + + TargetHandle_t dimm = list.front(); + + errlHndl_t errl = nullptr; + fapi2::Target<fapi2::TARGET_TYPE_DIMM> fapiDimm(dimm); + FAPI_INVOKE_HWP( errl, is_sPPR_supported, fapiDimm, o_isEnabled ); + if ( nullptr != errl ) + { + PRDF_ERR( PRDF_FUNC "is_sPPR_supported(0x%08x) failed", + getHuid(dimm) ); + PRDF_COMMIT_ERRL( errl, ERRL_ACTION_REPORT ); + o_isEnabled = false; // just in case + break; + } + + }while(0); + */ + + return o_isEnabled; + + #undef PRDF_FUNC +} + //############################################################################## //## Nimbus Maintenance Command wrappers //############################################################################## @@ -1193,6 +1312,185 @@ uint32_t incMaintAddr<TYPE_MBA>( ExtensibleChip * i_chip, } //############################################################################## +//## Explorer/Axone Maintenance Command wrappers +//############################################################################## + +template<> +uint32_t startBgScrub<TYPE_MEM_PORT>( ExtensibleChip * i_memPort, + const MemRank & i_rank ) +{ + #define PRDF_FUNC "[PlatServices::startBgScrub<TYPE_MEM_PORT>] " + + PRDF_ASSERT( nullptr != i_memPort ); + PRDF_ASSERT( TYPE_MEM_PORT == i_memPort->getType() ); + + uint32_t o_rc = SUCCESS; + + /* TODO RTC 207273 - no HWP support yet + // Get the OCMB fapi target + ExtensibleChip * ocmbChip = getConnectedParent( i_memPort, TYPE_OCMB_CHIP ); + fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP> fapiTrgt (ocmbChip->getTrgt()); + + // Get the stop conditions. + // NOTE: If HBRT_PRD is not configured, we want to use the defaults so that + // background scrubbing never stops. + mss::mcbist::stop_conditions stopCond; + + // AUEs are checkstop attentions. Unfortunately, MCBIST commands do not stop + // when the system checkstops. Therefore, we must set the stop condition for + // AUEs so that we can use the MCBMCAT register to determine where the error + // occurred. Note that there isn't a stop condition specifically for IAUEs. + // Instead, there is the RCE threshold. Unfortunately, the RCE counter is a + // combination of IUE, IAUE, IMPE, and IRCD errors. It is possible to use + // this threshold and simply restart background scrubbing each time there is + // an IUE, IMPE, or IRCD but there is concern that PRD might get stuck + // handling those attentions on every address even after thresholds have + // been reached. Therefore, we simplified the design and will simply call + // out both DIMMs for maintenance IAUEs. + stopCond.set_pause_on_aue(mss::ON); + + #ifdef CONFIG_HBRT_PRD + + stopCond.set_thresh_nce_int(1) + .set_thresh_nce_soft(1) + .set_thresh_nce_hard(1) + .set_pause_on_mpe(mss::ON) + .set_pause_on_ue(mss::ON) + .set_nce_inter_symbol_count_enable(mss::ON) + .set_nce_soft_symbol_count_enable(mss::ON) + .set_nce_hard_symbol_count_enable(mss::ON); + + // In MNFG mode, stop on RCE_ETE to get an accurate callout for IUEs. + if ( mfgMode() ) stopCond.set_thresh_rce(1); + + #endif + + // Get the scrub speed. + mss::mcbist::speed scrubSpeed = enableFastBgScrub() ? mss::mcbist::LUDICROUS + : mss::mcbist::BG_SCRUB; + + do + { + // Get the first address of the given rank. + mss::mcbist::address saddr, eaddr; + o_rc = getMemAddrRange<TYPE_MEM_PORT>( i_memPort, i_rank, saddr, eaddr, + SLAVE_RANK ); + if ( SUCCESS != o_rc ) + { + PRDF_ERR( PRDF_FUNC "getMemAddrRange(0x%08x,0x%2x) failed", + i_memPort->getHuid(), i_rank.getKey() ); + break; + } + + // Clear all of the counters and maintenance ECC attentions. + o_rc = prepareNextCmd<TYPE_OCMB_CHIP>( ocmbChip ); + if ( SUCCESS != o_rc ) + { + PRDF_ERR( PRDF_FUNC "prepareNextCmd(0x%08x) failed", + ocmbChip->getHuid() ); + break; + } + + // Start the background scrub command. + errlHndl_t errl = nullptr; + FAPI_INVOKE_HWP( errl, mss::memdiags::background_scrub, fapiTrgt, + stopCond, scrubSpeed, saddr ); + + if ( nullptr != errl ) + { + PRDF_ERR( PRDF_FUNC "mss::memdiags::background_scrub(0x%08x,%d) " + "failed", ocmbChip->getHuid(), i_rank.getMaster() ); + PRDF_COMMIT_ERRL( errl, ERRL_ACTION_REPORT ); + o_rc = FAIL; break; + } + + } while (0); + + */ + return o_rc; + + #undef PRDF_FUNC +} + +//------------------------------------------------------------------------------ + +// This specialization only exists to avoid a lot of extra code in some classes. +// The input chip must still be a MEM_PORT. +template<> +uint32_t startBgScrub<TYPE_OCMB_CHIP>( ExtensibleChip * i_memPort, + const MemRank & i_rank ) +{ + return startBgScrub<TYPE_MEM_PORT>( i_memPort, i_rank ); +} + +//------------------------------------------------------------------------------ + +template<> +uint32_t startTdScrub<TYPE_MEM_PORT>( ExtensibleChip * i_chip, + const MemRank & i_rank, + AddrRangeType i_rangeType, + mss::mcbist::stop_conditions i_stopCond ) +{ + #define PRDF_FUNC "[PlatServices::startTdScrub<TYPE_MEM_PORT>] " + + PRDF_ASSERT( nullptr != i_chip ); + PRDF_ASSERT( TYPE_MEM_PORT == i_chip->getType() ); + + uint32_t o_rc = SUCCESS; + + /* TODO RTC 207273 - no HWP support yet + // Set stop-on-AUE for all target scrubs. See explanation in startBgScrub() + // for the reasons why. + i_stopCond.set_pause_on_aue(mss::ON); + + do + { + // Get the address range of the given rank. + mss::mcbist::address saddr, eaddr; + o_rc = getMemAddrRange<TYPE_MEM_PORT>( i_chip, i_rank, saddr, eaddr, + i_rangeType ); + if ( SUCCESS != o_rc ) + { + PRDF_ERR( PRDF_FUNC "getMemAddrRange(0x%08x,0x%2x) failed", + i_chip->getHuid(), i_rank.getKey() ); + break; + } + + // Get the OCMB_CHIP fapi target. + ExtensibleChip * ocmbChip = getConnectedParent(i_chip, TYPE_OCMB_CHIP); + fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP> + fapiTrgt(ocmbChip->getTrgt()); + + // Clear all of the counters and maintenance ECC attentions. + o_rc = prepareNextCmd<TYPE_OCMB_CHIP>( ocmbChip ); + if ( SUCCESS != o_rc ) + { + PRDF_ERR( PRDF_FUNC "prepareNextCmd(0x%08x) failed", + i_chip->getHuid() ); + break; + } + + // Start targeted scrub command. + errlHndl_t errl = nullptr; + FAPI_INVOKE_HWP( errl, mss::memdiags::targeted_scrub, fapiTrgt, + i_stopCond, saddr, eaddr, mss::mcbist::NONE ); + if ( nullptr != errl ) + { + PRDF_ERR( PRDF_FUNC "mss::memdiags::targeted_scrub(0x%08x,0x%02x) " + "failed", ocmbChip->getHuid(), i_rank.getKey() ); + PRDF_COMMIT_ERRL( errl, ERRL_ACTION_REPORT ); + o_rc = FAIL; break; + } + + } while (0); + + */ + return o_rc; + + #undef PRDF_FUNC +} + +//############################################################################## //## Core/cache trace array functions //############################################################################## diff --git a/src/usr/diag/prdf/plat/prdfPlatServices_ipl.C b/src/usr/diag/prdf/plat/prdfPlatServices_ipl.C index 1ff113042..8b5c821b1 100644 --- a/src/usr/diag/prdf/plat/prdfPlatServices_ipl.C +++ b/src/usr/diag/prdf/plat/prdfPlatServices_ipl.C @@ -79,9 +79,11 @@ int32_t mdiaSendEventMsg( TargetHandle_t i_trgt, PRDF_ASSERT( nullptr != i_trgt ); - // Only MCBIST and MBA supported. + // Only MCBIST, MBA, and OCMB_CHIP supported. TYPE trgtType = getTargetType( i_trgt ); - PRDF_ASSERT( TYPE_MCBIST == trgtType || TYPE_MBA == trgtType ); + PRDF_ASSERT( TYPE_MCBIST == trgtType || + TYPE_MBA == trgtType || + TYPE_OCMB_CHIP ); // MDIA must be running. PRDF_ASSERT( isInMdiaMode() ); @@ -206,6 +208,39 @@ uint32_t mssRestoreDramRepairs<TYPE_MBA>( TargetHandle_t i_target, return o_rc; } +//------------------------------------------------------------------------------ + +template<> +uint32_t mssRestoreDramRepairs<TYPE_MEM_PORT>( TargetHandle_t i_target, + uint8_t & o_repairedRankMask, + uint8_t & o_badDimmMask ) +{ + uint32_t o_rc = SUCCESS; + + /* TODO RTC 207273 - no HWP support yet + errlHndl_t errl = NULL; + + + fapi2::buffer<uint8_t> tmpRepairedRankMask, tmpBadDimmMask; + FAPI_INVOKE_HWP( errl, mss::restore_repairs, + fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>( i_target ), + tmpRepairedRankMask, tmpBadDimmMask ); + + if ( NULL != errl ) + { + PRDF_ERR( "[PlatServices::mssRestoreDramRepairs] " + "restore_repairs() failed. HUID: 0x%08x", + getHuid(i_target) ); + PRDF_COMMIT_ERRL( errl, ERRL_ACTION_REPORT ); + o_rc = FAIL; + } + + o_repairedRankMask = (uint8_t)tmpRepairedRankMask; + o_badDimmMask = (uint8_t)tmpBadDimmMask; + */ + + return o_rc; +} //------------------------------------------------------------------------------ uint32_t mssIplUeIsolation( TargetHandle_t i_mba, const MemRank & i_rank, @@ -801,6 +836,119 @@ uint32_t resumeTdSteerCleanup<TYPE_MBA>( ExtensibleChip * i_chip, #undef PRDF_FUNC } +//############################################################################## +//## Explorer/Axone Maintenance Command wrappers +//############################################################################## + +template<> +bool isBroadcastModeCapable<TYPE_OCMB_CHIP>( ExtensibleChip * i_chip ) +{ + /* TODO RTC 207273 - no HWP support yet + PRDF_ASSERT( nullptr != i_chip ); + PRDF_ASSERT( TYPE_OCMB_CHIP == i_chip->getType() ); + + fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP> fapiTrgt ( i_chip->getTrgt() ); + + mss::states l_ret = mss::states::NO; + FAPI_CALL_HWP( l_ret, mss::mcbist::is_broadcast_capable, fapiTrgt ); + return ( mss::states::YES == l_ret ); + */ + return false; +} + +//------------------------------------------------------------------------------ + +template<> +uint32_t startSfRead<TYPE_MEM_PORT>( ExtensibleChip * i_memPort, + const MemRank & i_rank ) +{ + #define PRDF_FUNC "[PlatServices::startSfRead<TYPE_MCA>] " + + PRDF_ASSERT( isInMdiaMode() ); // MDIA must be running. + + PRDF_ASSERT( nullptr != i_memPort ); + PRDF_ASSERT( TYPE_MEM_PORT == i_memPort->getType() ); + + uint32_t o_rc = SUCCESS; + + /* TODO RTC 207273 - no HWP support yet + // Get the OCMB_CHIP fapi target + ExtensibleChip * ocmbChip = getConnectedParent( i_memPort, TYPE_OCMB_CHIP ); + fapi2::Target<fapi2::TYPE_OCMB_CHIP> fapiTrgt ( ocmbChip->getTrgt() ); + + // Get the stop conditions. + mss::mcbist::stop_conditions stopCond; + stopCond.set_pause_on_mpe(mss::ON) + .set_pause_on_ue(mss::ON) + .set_pause_on_aue(mss::ON) + .set_nce_inter_symbol_count_enable(mss::ON) + .set_nce_soft_symbol_count_enable( mss::ON) + .set_nce_hard_symbol_count_enable( mss::ON); + + // Stop on hard CEs if MNFG CE checking is enabled. + if ( isMfgCeCheckingEnabled() ) stopCond.set_pause_on_nce_hard(mss::ON); + + do + { + // Get the first address of the given rank. + mss::mcbist::address saddr, eaddr; + o_rc = getMemAddrRange<TYPE_MEM_PORT>( i_memPort, i_rank, saddr, eaddr, + SLAVE_RANK ); + if ( SUCCESS != o_rc ) + { + PRDF_ERR( PRDF_FUNC "getMemAddrRange(0x%08x,0x%2x) failed", + i_memPort->getHuid(), i_rank.getKey() ); + break; + } + + // Clear all of the counters and maintenance ECC attentions. + o_rc = prepareNextCmd<TYPE_OCMB_CHIP>( ocmbChip ); + if ( SUCCESS != o_rc ) + { + PRDF_ERR( PRDF_FUNC "prepareNextCmd(0x%08x) failed", + ocmbChip->getHuid() ); + break; + } + + // Start the super fast read command. + errlHndl_t errl; + FAPI_INVOKE_HWP( errl, mss::memdiags::sf_read, fapiTrgt, stopCond, + saddr ); + if ( nullptr != errl ) + { + PRDF_ERR( PRDF_FUNC "mss::memdiags::sf_read(0x%08x,%d) failed", + ocmbChip->getHuid(), i_rank.getMaster() ); + PRDF_COMMIT_ERRL( errl, ERRL_ACTION_REPORT ); + o_rc = FAIL; break; + } + + } while (0); + + */ + + return o_rc; + + #undef PRDF_FUNC +} + +//------------------------------------------------------------------------------ + +// This specialization only exists to avoid a lot of extra code in some classes. +// The input chip must still be an MEM_PORT chip. +template<> +uint32_t startSfRead<TYPE_OCMB_CHIP>( ExtensibleChip * i_memPort, + const MemRank & i_rank ) +{ + return startSfRead<TYPE_MEM_PORT>( i_memPort, i_rank ); +} + +//------------------------------------------------------------------------------ + +template<> +uint32_t cleanupSfRead<TYPE_OCMB_CHIP>( ExtensibleChip * i_ocmbChip ) +{ + return SUCCESS; // Not needed for MCBIST commands. +} //------------------------------------------------------------------------------ } // end namespace PlatServices diff --git a/src/usr/diag/prdf/plat/prdfPlatServices_ipl.H b/src/usr/diag/prdf/plat/prdfPlatServices_ipl.H index eaa3937d0..a27f1b92e 100644 --- a/src/usr/diag/prdf/plat/prdfPlatServices_ipl.H +++ b/src/usr/diag/prdf/plat/prdfPlatServices_ipl.H @@ -57,7 +57,7 @@ bool isInMdiaMode(); /** * @brief Sends a MCBIST/maintenance event message to MDIA. - * @param i_trgt An MCBIST or MBA target. + * @param i_trgt An MCBIST, MBA, or OCMB_CHIP target. * @param i_eventType MDIA event type * @return Non-SUCCESS in internal function fails, SUCCESS otherwise. */ @@ -66,7 +66,7 @@ int32_t mdiaSendEventMsg( TARGETING::TargetHandle_t i_trgt, /** * @brief Initiates a reconfig loop due to an RCD parity error. - * @param i_trgt An MCA target. + * @param i_trgt An MCA or MEM_PORT target. * @return True if the number of allowed reconfig loops has been exceeded. * False otherwise. */ @@ -104,7 +104,7 @@ uint32_t mssIplUeIsolation( TARGETING::TargetHandle_t i_mba, * @brief Determines if the given target is capable of running in broadcast * mode. Super fast commands will always run in broadcast mode if it is * possible. - * @param i_chip MCBIST chip. + * @param i_chip MCBIST or OCMB chip. * @return Non-SUCCESS if an internal function fails, otherwise SUCCESS. */ template<TARGETING::TYPE T> @@ -113,7 +113,7 @@ bool isBroadcastModeCapable( ExtensibleChip * i_chip ); /** * @brief Starts a super fast read command from the first address of the given * rank to the end of memory. - * @param i_chip MCBIST/MCA or MBA chip. + * @param i_chip MCBIST/MCA, MBA, or MEM_PORT chip. * @param i_rank Will start the command on the first address of this slave * rank. To ensure the command is started on a master rank boundary, * make sure the slave rank value is 0. @@ -125,7 +125,7 @@ uint32_t startSfRead( ExtensibleChip * i_chip, const MemRank & i_rank ); /** * @brief If necessary, this will do the necessary cleanup for the superfast * command when the command is complete. - * @param i_chip MCBIST or MBA chip. + * @param i_chip MCBIST, MBA, or OCMB chip. * @return Non-SUCCESS if an internal function fails, otherwise SUCCESS. */ template<TARGETING::TYPE T> diff --git a/src/usr/diag/prdf/plat/prdfPlatServices_rt.C b/src/usr/diag/prdf/plat/prdfPlatServices_rt.C index 23926f9bb..25a470f8d 100644 --- a/src/usr/diag/prdf/plat/prdfPlatServices_rt.C +++ b/src/usr/diag/prdf/plat/prdfPlatServices_rt.C @@ -405,6 +405,112 @@ uint32_t resumeTdScrub<TYPE_MBA>( ExtensibleChip * i_chip, } //############################################################################## +//## Explorer/Axone Maintenance Command wrappers +//############################################################################## + +template<> +uint32_t stopBgScrub<TYPE_OCMB_CHIP>( ExtensibleChip * i_chip ) +{ + #define PRDF_FUNC "[PlatServices::stopBgScrub<TYPE_OCMB_CHIP>] " + + PRDF_ASSERT( nullptr != i_chip ); + PRDF_ASSERT( TYPE_OCMB_CHIP == i_chip->getType() ); + + uint32_t rc = SUCCESS; + + /* TODO RTC 207273 - no HWP support yet + fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP> fapiTrgt ( i_chip->getTrgt() ); + + errlHndl_t errl; + FAPI_INVOKE_HWP( errl, mss::memdiags::stop, fapiTrgt ); + + if ( nullptr != errl ) + { + PRDF_ERR( PRDF_FUNC "mss::memdiags::stop(0x%08x) failed", i_chip->getHuid()); + PRDF_COMMIT_ERRL( errl, ERRL_ACTION_REPORT ); + rc = FAIL; + } + */ + + return rc; + + #undef PRDF_FUNC +} + +//------------------------------------------------------------------------------ + +template<> +uint32_t stopBgScrub<TYPE_MEM_PORT>( ExtensibleChip * i_chip ) +{ + PRDF_ASSERT( nullptr != i_chip ); + PRDF_ASSERT( TYPE_MEM_PORT == i_chip->getType() ); + + ExtensibleChip* ocmbChip = getConnectedParent( i_chip, TYPE_OCMB_CHIP ); + return stopBgScrub<TYPE_OCMB_CHIP>( ocmbChip ); +} + +//------------------------------------------------------------------------------ + +template<> +uint32_t resumeBgScrub<TYPE_OCMB_CHIP>( ExtensibleChip * i_chip ) +{ + #define PRDF_FUNC "[PlatServices::resumeBgScrub<TYPE_OCMB_CHIP>] " + + PRDF_ASSERT( nullptr != i_chip ); + PRDF_ASSERT( TYPE_OCMB_CHIP == i_chip->getType() ); + + uint32_t o_rc = SUCCESS; + + /* TODO RTC 207273 - no hwp support yet + + // Get the OCMB_CHIP fapi target + fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP> fapiTrgt ( i_chip->getTrgt() ); + + do + { + // Clear all of the counters and maintenance ECC attentions. + o_rc = prepareNextCmd<TYPE_OCMB_CHIP>( i_chip ); + if ( SUCCESS != o_rc ) + { + PRDF_ERR( PRDF_FUNC "prepareNextCmd(0x%08x) failed", + i_chip->getHuid() ); + break; + } + + // Resume the command on the next address. + errlHndl_t errl; + FAPI_INVOKE_HWP( errl, mss::memdiags::continue_cmd, fapiTrgt ); + + if ( nullptr != errl ) + { + PRDF_ERR( PRDF_FUNC "mss::memdiags::continue_cmd(0x%08x) failed", + i_chip->getHuid() ); + PRDF_COMMIT_ERRL( errl, ERRL_ACTION_REPORT ); + o_rc = FAIL; break; + } + + } while (0); + + */ + + return o_rc; + + #undef PRDF_FUNC +} + +//------------------------------------------------------------------------------ + +template<> +uint32_t resumeBgScrub<TYPE_MEM_PORT>( ExtensibleChip * i_chip ) +{ + PRDF_ASSERT( nullptr != i_chip ); + PRDF_ASSERT( TYPE_MEM_PORT == i_chip->getType() ); + + ExtensibleChip* ocmbChip = getConnectedParent( i_chip, TYPE_OCMB_CHIP ); + return resumeBgScrub<TYPE_OCMB_CHIP>( ocmbChip ); +} + +//############################################################################## //## Line Delete Functions //############################################################################## int32_t extractL3Err( TargetHandle_t i_exTgt, diff --git a/src/usr/diag/prdf/plat/prdfPlatServices_rt.H b/src/usr/diag/prdf/plat/prdfPlatServices_rt.H index f152175f6..5407c94ad 100644 --- a/src/usr/diag/prdf/plat/prdfPlatServices_rt.H +++ b/src/usr/diag/prdf/plat/prdfPlatServices_rt.H @@ -80,7 +80,7 @@ uint32_t nvdimmNotifyPhypProtChange( TARGETING::Target * i_target, /** * @brief Stops Background Scrubbing. - * @param i_chip MCBIST, MCA, or MBA chip. + * @param i_chip MCBIST, MCA, MBA, MEM_PORT, or OCMB chip. * @return Non-SUCCESS if an internal function fails, SUCCESS otherwise. */ template<TARGETING::TYPE T> @@ -99,7 +99,7 @@ uint32_t stopBgScrub( ExtensibleChip * i_chip ); * due to an error. It should not be called after executing a Targeted * Diagnotics procedure. * - * @param i_chip MCBIST, MCA, or MBA chip. + * @param i_chip MCBIST, MCA, MBA, MEM_PORT, or OCMB chip. * @return Non-SUCCESS if an internal function fails, SUCCESS otherwise. */ template<TARGETING::TYPE T> |

