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authorChris Phan <cphan@us.ibm.com>2014-08-20 22:39:21 -0500
committerA. Patrick Williams III <iawillia@us.ibm.com>2014-08-28 13:14:46 -0500
commit0c07aa8e008f340b4258241a6c387e02b950e2bd (patch)
tree27d1a38bd81234c7391ed228fd99cb1badd9579b /src/usr/diag/prdf/common
parent26cf9ba1ab939cde15700c5b5078f6b0b5d01c3c (diff)
downloadtalos-hostboot-0c07aa8e008f340b4258241a6c387e02b950e2bd.tar.gz
talos-hostboot-0c07aa8e008f340b4258241a6c387e02b950e2bd.zip
PRD: fix TP_LFIR[19] masking issue at threshold
Change-Id: I457affecc313b158606bdad34b5679c2dfc780f7 CQ: SW274151 Backport: release-fips811 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/12913 Tested-by: Jenkins Server Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com> Reviewed-by: Zane Shelley <zshelle@us.ibm.com> Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/12941
Diffstat (limited to 'src/usr/diag/prdf/common')
-rwxr-xr-xsrc/usr/diag/prdf/common/framework/resolution/prdfThresholdResolutions.C6
-rwxr-xr-xsrc/usr/diag/prdf/common/plat/pegasus/CommonActions.rule10
-rwxr-xr-xsrc/usr/diag/prdf/common/plat/pegasus/Proc_acts_TP.rule10
-rwxr-xr-xsrc/usr/diag/prdf/common/plat/pegasus/prdfP8Pll.C17
4 files changed, 19 insertions, 24 deletions
diff --git a/src/usr/diag/prdf/common/framework/resolution/prdfThresholdResolutions.C b/src/usr/diag/prdf/common/framework/resolution/prdfThresholdResolutions.C
index e69d58a78..fa775f3fe 100755
--- a/src/usr/diag/prdf/common/framework/resolution/prdfThresholdResolutions.C
+++ b/src/usr/diag/prdf/common/framework/resolution/prdfThresholdResolutions.C
@@ -5,7 +5,9 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* COPYRIGHT International Business Machines Corp. 2003,2014 */
+/* Contributors Listed Below - COPYRIGHT 2012,2014 */
+/* [+] International Business Machines Corp. */
+/* */
/* */
/* Licensed under the Apache License, Version 2.0 (the "License"); */
/* you may not use this file except in compliance with the License. */
@@ -66,7 +68,7 @@ const ThresholdResolution::ThresholdPolicy ThresholdResolution::cv_mnfgDefault
const ThresholdResolution::ThresholdPolicy ThresholdResolution::cv_pllDefault
= g_thresholdPFW.get(
- ThresholdResolution::ThresholdPolicy(2,ThresholdResolution::ONE_MIN));
+ ThresholdResolution::ThresholdPolicy(2,5 * ThresholdResolution::ONE_MIN));
//----------------------------------------------------------------------
// Macros
diff --git a/src/usr/diag/prdf/common/plat/pegasus/CommonActions.rule b/src/usr/diag/prdf/common/plat/pegasus/CommonActions.rule
index f07088826..d91678cc6 100755
--- a/src/usr/diag/prdf/common/plat/pegasus/CommonActions.rule
+++ b/src/usr/diag/prdf/common/plat/pegasus/CommonActions.rule
@@ -5,7 +5,9 @@
#
# OpenPOWER HostBoot Project
#
-# COPYRIGHT International Business Machines Corp. 2012,2014
+# Contributors Listed Below - COPYRIGHT 2012,2014
+# [+] International Business Machines Corp.
+#
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
@@ -61,6 +63,12 @@ actionclass threshold1
threshold( field(1) );
};
+/** PLL Threshold of 2 per 5 mins */
+actionclass thresholdPll
+{
+ threshold( field(2 / 5 min) );
+};
+
/** Threshold of 2 per day */
actionclass threshold2pday
{
diff --git a/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_TP.rule b/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_TP.rule
index 8245acbea..bd451cb92 100755
--- a/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_TP.rule
+++ b/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_TP.rule
@@ -1160,17 +1160,19 @@ actionclass analyzeMcs31
analyze(connected(TYPE_MCS, 7));
};
-# still need to capture PLL FIRs for debugging
+# This action is for the case where TP_LFIR[19] comes on
+# but PLL code fails to isolate to any PLL errors. The
+# threshold is the same as PLL one 2 per 5 mins with
+# callout/gard the chip at threshold along with PLL scom
+# data captured.
/** PCB Slave Internal parity error action */
actionclass PcbSlaveInternalParity
{
capture(PllFIRs);
calloutSelfHigh;
- threshold5pday;
+ thresholdPll;
funccall("AnalyzeParityErr");
funccall("capturePllFfdc");
- funccall("NoClearFirBits"); # Must be called last so return
- # code can be passed on to rule code.
};
# TOD Actions:
diff --git a/src/usr/diag/prdf/common/plat/pegasus/prdfP8Pll.C b/src/usr/diag/prdf/common/plat/pegasus/prdfP8Pll.C
index cc7332324..da76a52c3 100755
--- a/src/usr/diag/prdf/common/plat/pegasus/prdfP8Pll.C
+++ b/src/usr/diag/prdf/common/plat/pegasus/prdfP8Pll.C
@@ -920,23 +920,6 @@ int32_t AnalyzeParityErr( ExtensibleChip * i_chip,
}
PRDF_PLUGIN_DEFINE( Proc, AnalyzeParityErr );
-/**
- * @brief There are some FIR bits that will be cleared manually and must not be
- * cleared by the framework code. The plugin forces the rule code to
- * analyze a special copy of the FIR which will not automatically clear
- * the FIR bits at attention.
- * @param i_chip P8 chip.
- * @param i_sc The step code data struct.
- * @return PRD_NO_CLEAR_FIR_BITS always.
- */
-int32_t NoClearFirBits( ExtensibleChip * i_chip,
- STEP_CODE_DATA_STRUCT & i_sc )
-{
- return PRD_NO_CLEAR_FIR_BITS;
-}
-PRDF_PLUGIN_DEFINE( Proc, NoClearFirBits );
-
-
} // end namespace Proc
} // end namespace PRDF
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