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| author | Zane Shelley <zshelle@us.ibm.com> | 2015-12-02 17:19:15 -0600 |
|---|---|---|
| committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2015-12-11 13:01:48 -0600 |
| commit | 13ca97bba09b9c246b82848bf3fb42c868f0bca5 (patch) | |
| tree | 02707cb11d9ef4f51d43672abbe0239a42d9e287 /src/usr/diag/prdf/common/plat/pegasus | |
| parent | d52716d1be73b27c3d3f5c3ffb84fef546cb6e45 (diff) | |
| download | talos-hostboot-13ca97bba09b9c246b82848bf3fb42c868f0bca5.tar.gz talos-hostboot-13ca97bba09b9c246b82848bf3fb42c868f0bca5.zip | |
PRD: Expanded memory CE table to support more raw card types
Change-Id: Id9c384ff5c9cad6f4ba7ccce0e90a959fe5cb660
Backport: release-fips840
CQ: SW329405
Depends-on: I8de67b0a41307519809147eb90445ea896df0933
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22442
Tested-by: Jenkins Server
Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com>
Reviewed-by: BENJAMIN J. WEISENBECK <bweisenb@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Reviewed-by: Zane Shelley <zshelle@us.ibm.com>
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22617
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22685
Tested-by: Jenkins OP Build CI
Tested-by: Jenkins OP HW
Tested-by: FSP CI Jenkins
Diffstat (limited to 'src/usr/diag/prdf/common/plat/pegasus')
| -rw-r--r-- | src/usr/diag/prdf/common/plat/pegasus/prdfCenMbaCeTable.C | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/usr/diag/prdf/common/plat/pegasus/prdfCenMbaCeTable.C b/src/usr/diag/prdf/common/plat/pegasus/prdfCenMbaCeTable.C index f9e6e735e..8430d58df 100644 --- a/src/usr/diag/prdf/common/plat/pegasus/prdfCenMbaCeTable.C +++ b/src/usr/diag/prdf/common/plat/pegasus/prdfCenMbaCeTable.C @@ -227,9 +227,10 @@ void CenMbaCeTable::addCapData( CaptureData & io_cd ) uint8_t isEcc = it->isEccSpared ? 1 : 0; data[sz_actData ] = it->count; - data[sz_actData+1] = (it->type << 5) | + data[sz_actData+1] = ((it->type & 0x7) << 5) | (mbaPos << 4) | (it->portSlct << 3) | - (isSp << 2) | (isEcc << 1); // 1 spare bit + (isSp << 2) | (isEcc << 1) | + ((it->type & 0x8) >> 3); data[sz_actData+2] = (isHard << 7) | (active << 6) | (it->dram & 0x3f); data[sz_actData+3] = it->dramPins; data[sz_actData+4] = (mrnk << 5) | (srnk << 2) | (svld << 1) | row0; |
