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authorBenjamin Weisenbeck <bweisenb@us.ibm.com>2013-07-09 18:57:23 -0500
committerA. Patrick Williams III <iawillia@us.ibm.com>2013-07-31 16:50:32 -0500
commitede79c98d02499191ad89f00460da6cac524861a (patch)
tree5f65a05d35cecb359f001ab0fc6f6ad3b575069d /src/usr/diag/prdf/common/plat/pegasus/prdfP8Proc.C
parent4ad0062bb79cf86a7c1ed1ef06ee5006a2db3f27 (diff)
downloadtalos-hostboot-ede79c98d02499191ad89f00460da6cac524861a.tar.gz
talos-hostboot-ede79c98d02499191ad89f00460da6cac524861a.zip
PRD: Check IPL state before accessing global unit xstp register
Change-Id: Icd558b528cfae0d54e28f49af04f461d0251bbbb RTC: 68302 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/5352 Reviewed-by: Christopher T. Phan <cphan@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Tested-by: Jenkins Server Reviewed-by: Zane Shelley <zshelle@us.ibm.com> Squashed: I4bdfc19e0a387159e98a77591ec968a6cbc1758d Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/5593
Diffstat (limited to 'src/usr/diag/prdf/common/plat/pegasus/prdfP8Proc.C')
-rwxr-xr-xsrc/usr/diag/prdf/common/plat/pegasus/prdfP8Proc.C39
1 files changed, 18 insertions, 21 deletions
diff --git a/src/usr/diag/prdf/common/plat/pegasus/prdfP8Proc.C b/src/usr/diag/prdf/common/plat/pegasus/prdfP8Proc.C
index fab238c40..c2ae26936 100755
--- a/src/usr/diag/prdf/common/plat/pegasus/prdfP8Proc.C
+++ b/src/usr/diag/prdf/common/plat/pegasus/prdfP8Proc.C
@@ -202,19 +202,18 @@ int32_t CheckForRecoveredSev(ExtensibleChip * i_chip,
uint32_t & o_sev)
{
int32_t o_rc = SUCCESS;
+ bool l_runtime = atRuntime();
SCAN_COMM_REGISTER_CLASS * l_rer = NULL;
SCAN_COMM_REGISTER_CLASS * l_TPrer = NULL;
- // FIXME 68302 - This needs a better check for FSP environment
- // we could get a xstp during hostboot at a stage when GLOBALUNITXSTPFIR
- // can't be accessed
-#ifndef __HOSTBOOT_MODULE
SCAN_COMM_REGISTER_CLASS * l_unitxstp = NULL;
+ if ( l_runtime )
+ {
+ l_unitxstp = i_chip->getRegister("GLOBALUNITXSTPFIR");
+ o_rc |= l_unitxstp->Read();
+ }
- l_unitxstp = i_chip->getRegister("GLOBALUNITXSTPFIR");
- o_rc |= l_unitxstp->Read();
-#endif
l_rer = i_chip->getRegister("GLOBAL_RE_FIR");
o_rc |= l_rer->Read();
l_TPrer = i_chip->getRegister("TP_CHIPLET_RE_FIR");
@@ -242,17 +241,13 @@ int32_t CheckForRecoveredSev(ExtensibleChip * i_chip,
// error from TP (other than MCS chiplets)
o_sev = 3;
}
- // FIXME 68302 - This needs a better check for FSP environment
- // we could get a xstp during hostboot at a stage when GLOBALUNITXSTPFIR
- // can't be accessed
-#ifndef __HOSTBOOT_MODULE
- else if((l_rer->GetBitFieldJustified(16,16) &
+ else if(l_runtime &&
+ (l_rer->GetBitFieldJustified(16,16) &
l_unitxstp->GetBitFieldJustified(16,16)) == 0 )
{
// core recoverable
o_sev = 2;
}
-#endif
else
{
// core checkstop
@@ -360,16 +355,18 @@ int32_t CoreConfiguredAndNotHostboot(ExtensibleChip * i_chip,
bool & o_isCoreConfigured)
{
o_isCoreConfigured = false;
-#ifdef __HOSTBOOT_MODULE
- // if in hostboot just return false to prevent the default reg capture
- return SUCCESS;
-#endif
- TargetHandleList l_coreList =
- PlatServices::getConnected(i_chip->GetChipHandle(), TYPE_EX);
+ // if at not at runtime just return o_isCoreConfigured = false to prevent
+ // the default reg capture
+ if (atRuntime())
+ {
+ // make sure this chip has config'd cores
+ TargetHandleList l_coreList =
+ PlatServices::getConnected(i_chip->GetChipHandle(), TYPE_EX);
- if (l_coreList.size() > 0)
- o_isCoreConfigured = true;
+ if (l_coreList.size() > 0)
+ o_isCoreConfigured = true;
+ }
return SUCCESS;
} PRDF_PLUGIN_DEFINE(Proc, CoreConfiguredAndNotHostboot);
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