PRD: Initial Axone Channel Fail support

Change-Id: I1a86cd97e2188409a1fbcc2fd8981ad5e162214f
RTC: 212714
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/83667
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Paul Greenwood <paul.greenwood@ibm.com>
Reviewed-by: Zane C Shelley <zshelle@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/84365
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>

1 files changed, 80 insertions, 0 deletions

diff --git a/src/usr/diag/prdf/common/plat/axone/axone_mcc_regs.rule b/src/usr/diag/prdf/common/plat/axone/axone_mcc_regs.rule
new file mode 100644
index 000000000..001a54e5c
--- /dev/null
+++ b/src/usr/diag/prdf/common/plat/axone/axone_mcc_regs.rule
@@ -0,0 +1,80 @@
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
+#
+# $Source: src/usr/diag/prdf/common/plat/axone/axone_mcc_regs.rule $
+#
+# OpenPOWER HostBoot Project
+#
+# Contributors Listed Below - COPYRIGHT 2019
+# [+] International Business Machines Corp.
+#
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+# implied. See the License for the specific language governing
+# permissions and limitations under the License.
+#
+# IBM_PROLOG_END_TAG
+
+
+###############################################################################
+# Additional registers for mcc, not defined in XML
+###############################################################################
+
+    ###########################################################################
+    # P9 Axone target Channel Fail Config registers
+    ###########################################################################
+
+    register DSTLCFG2
+    {
+        name        "P9 Axone DSTL Error Injection Register";
+        scomaddr    0x0701090E;
+        capture     group default;
+    };
+
+    register USTLFAILMASK
+    {
+        name        "P9 Axone USTL Fail Response Channel Fail Mask";
+        scomaddr    0x07010A13;
+        capture     group default;
+    };
+
+    ###########################################################################
+    # P9 Axone target DSTLFIR
+    ###########################################################################
+
+    register DSTLFIR_AND
+    {
+        name        "P9 MCC target DSTLFIR atomic AND";
+        scomaddr    0x07010901;
+        capture     group never;
+        access      write_only;
+    };
+
+    register DSTLFIR_MASK_OR
+    {
+        name        "P9 MCC target DSTLFIR MASK atomic OR";
+        scomaddr    0x07010905;
+        capture     group never;
+        access      write_only;
+    };
+
+    ###########################################################################
+    # P9 Axone target USTLFIR
+    ###########################################################################
+
+    register USTLFIR_MASK_OR
+    {
+        name        "P9 MCC target USTLFIR MASK atomic OR";
+        scomaddr    0x07010A05;
+        capture     group never;
+        access      write_only;
+    };
+