Initialize the PIB hardware layer for interrupts

RTC: 47105
Change-Id: Iba893e65ee468b56e9e929a26d2888a67a4788af
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2433
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

5 files changed, 83 insertions, 282 deletions

diff --git a/src/usr/diag/attn/attnbits.H b/src/usr/diag/attn/attnbits.H
index 534e72bc7..c678d7964 100644
--- a/src/usr/diag/attn/attnbits.H
+++ b/src/usr/diag/attn/attnbits.H
@@ -170,92 +170,12 @@ bool getCheckbits(
         uint64_t & o_bits);
 }
 
-/**
- * @brief PsiHbXivr Layout for XIVR registers.
- */
-struct PsiHbXivr
-{
-    union
-    {
-        uint64_t u64;
-
-        struct
-        {
-            uint64_t res1:8;       // zeros
-            uint64_t pir:14;       // interrupt destination (server)
-            uint64_t linkptr:2;    // which link reg in intr presenter
-            uint64_t priority:8;   // intr priority level
-            uint64_t source:3;     // source number
-            uint64_t res2:4;       // zeros
-            uint64_t intr_pend:25; // interrupt is pending
-        } PACKED;
-    };
-
-    PsiHbXivr() : u64(0) {}
-};
-
-/**
- * @brief IcpXisr The XISR fields of the XIRR register.
- */
-struct IcpXisr
-{
-    union
-    {
-        uint64_t u64;
-
-        struct
-        {
-            uint64_t res1:44;    // zeros
-            uint64_t node:4;     // isn - node
-            uint64_t chip:3;     // isn - chip
-            uint64_t unit:2;     // isn - unit
-            uint64_t source:11;  // isn - source
-        } PACKED;
-    };
-
-    IcpXisr() : u64(0) {}
-};
-
-/**
- * @brief PsiHbIrqSrcCmp Layout for the IRQ source compare register.
- *
- * FIXME: This can go away when RTC 47105 in place.
- */
-struct PsiHbIrqSrcCmp
-{
-    union
-    {
-        uint64_t u64;
-
-        struct
-        {
-            uint64_t irsn:19;
-            uint64_t res1:10;
-            uint64_t reset:1;
-            uint64_t die:1;
-            uint64_t uie:1;
-            uint64_t mask:19;
-            uint64_t res2:13;
-        } PACKED;
-    };
-
-    PsiHbIrqSrcCmp() : u64(0) {}
-};
 
 /**
- * @brief PSI host bridge interrupt
- *        config related constants
+ * @brief Interrupt config related constants
  */
 enum
 {
-    PSI_HB_IC_ENABLE        = 1,
-    LCL_ERR_ISN             = 4,
-    LCL_ERR_XIVR_ADDR       = 0x02010919,
-    LCL_ERR_PRIO_DISABLED   = 0xff,
-    LCL_ERR_PRIO            = 0x20,
-    PSI_HB_IRQ_SRC_CMP_ADDR = 0x0201091b,
-    PSI_HB_IRSN             = 0x18,
-    PSI_HB_IRSN_MASK        = 0x7FFF8,
     INTR_TYPE_LCL_ERR_STATUS_REG = 0x1020000,
     INTR_TYPE_MASK_REG      = 0x102000c,
     INTR_TYPE_CONFIG_REG    = 0x102000f,
diff --git a/src/usr/diag/attn/attnfwd.H b/src/usr/diag/attn/attnfwd.H
index af857ddfb..c28551e47 100644
--- a/src/usr/diag/attn/attnfwd.H
+++ b/src/usr/diag/attn/attnfwd.H
@@ -79,7 +79,7 @@ enum MessageType
     /**
      * @brief ATTENTION Attention message.
      */
-    ATTENTION = INTR::ATTENTION,
+    ATTENTION = 0x1,
 
     /**
      * @brief SHUTDOWN Shutdown message.
diff --git a/src/usr/diag/attn/attnsvc.C b/src/usr/diag/attn/attnsvc.C
index 5f8fb5eca..e61ada0a1 100644
--- a/src/usr/diag/attn/attnsvc.C
+++ b/src/usr/diag/attn/attnsvc.C
@@ -45,56 +45,6 @@ using namespace ERRORLOG;
 namespace ATTN
 {
 
-errlHndl_t Service::configureInterrupt(
-        ConfigureMode i_mode,
-        TargetHandle_t i_proc,
-        msg_q_t i_q,
-        uint64_t i_xisr,
-        uint64_t i_xivrData,
-        uint64_t i_xivrAddr)
-{
-    errlHndl_t err = NULL;
-
-    do {
-
-        if(i_mode == UP)
-        {
-            err = INTR::registerMsgQ(
-                    i_q,
-                    ATTENTION,
-                    static_cast<INTR::ext_intr_t>(i_xisr));
-        }
-        else
-        {
-            if(NULL == INTR::unRegisterMsgQ(
-                    static_cast<INTR::ext_intr_t>(i_xisr)))
-            {
-                ATTN_ERR("INTR did not find xisr: 0x%07x, tgt: %p",
-                        i_xisr, i_proc);
-            }
-        }
-
-        if(err)
-        {
-            break;
-        }
-
-
-        // TODO: validate this order of operations doesn't
-        // cause any checkstops (RTC: 52894)
-
-        err = putScom(i_proc, i_xivrAddr, i_xivrData);
-
-        if(err)
-        {
-            break;
-        }
-
-    } while(0);
-
-    return err;
-}
-
 void getMask(uint64_t i_type, void * i_data)
 {
     uint64_t & mask = *static_cast<uint64_t *>(i_data);
@@ -109,152 +59,113 @@ errlHndl_t Service::configureInterrupts(
         msg_q_t i_q,
         ConfigureMode i_mode)
 {
-    uint64_t prio = i_mode == UP
-        ? LCL_ERR_PRIO
-        : LCL_ERR_PRIO_DISABLED;
-
     errlHndl_t err = NULL;
 
-    TargetHandleList procs;
-
-    getTargetService().getAllChips(procs, TYPE_PROC);
-
-    TargetHandleList::iterator it = procs.begin();
-
-    while(it != procs.end())
+    // First register for Q
+    // This will set up the lcl_err interrupt on all chips
+    if(i_mode == UP)
     {
-        PsiHbIrqSrcCmp psiHbIrqSrcCmpData;
-
-        psiHbIrqSrcCmpData.irsn = PSI_HB_IRSN;
-        psiHbIrqSrcCmpData.mask = PSI_HB_IRSN_MASK;
-        psiHbIrqSrcCmpData.die = PSI_HB_IC_ENABLE;
-        psiHbIrqSrcCmpData.uie = PSI_HB_IC_ENABLE;
-
-        if(i_mode == UP)
-        {
-            // setup psihb interrupts
-
-            // FIXME: This scom can go away when RTC 47105 in place.
-
-            err = putScom(
-                    *it,
-                    PSI_HB_IRQ_SRC_CMP_ADDR,
-                    psiHbIrqSrcCmpData.u64);
-        }
-
-        if(err)
+        err = INTR::registerMsgQ(i_q,
+                                 ATTENTION,
+                                 INTR::ISN_LCL_ERR);
+    }
+    else
+    {
+        if(NULL == INTR::unRegisterMsgQ(INTR::ISN_LCL_ERR))
         {
-            break;
+            ATTN_ERR("INTR did not find isn: 0x%07x",
+                     INTR::ISN_LCL_ERR);
         }
+    }
 
-        // setup local error interrupts
-
-        IcpXisr xisr;
-
-        uint64_t node = 0, chip = 0;
-
-        getTargetService().getAttribute(ATTR_FABRIC_NODE_ID, *it, node);
-        getTargetService().getAttribute(ATTR_FABRIC_CHIP_ID, *it, chip);
-
-        xisr.node = node;
-        xisr.chip = chip;
-        xisr.source = PSI_HB_IRSN | LCL_ERR_ISN;
-
-        PsiHbXivr psiHbXivrData;
-
-        psiHbXivrData.source = LCL_ERR_ISN;
-        psiHbXivrData.priority = prio;
-        psiHbXivrData.pir = INTR::intrDestCpuId(xisr.u64);
 
-        err = configureInterrupt(
-                i_mode,
-                *it,
-                i_q,
-                xisr.u64,
-                psiHbXivrData.u64,
-                LCL_ERR_XIVR_ADDR);
+    //Issue scoms to allow attentions to flow via INTR
+    if(!err)
+    {
+        TargetHandleList procs;
+        getTargetService().getAllChips(procs, TYPE_PROC);
+        TargetHandleList::iterator it = procs.begin();
 
-        if(err)
+        while(it != procs.end())
         {
-            break;
-        }
+            uint64_t mask = 0;
 
-        uint64_t mask = 0;
+            // clear status
 
-        // clear status
+            if(i_mode == UP)
+            {
+                err = putScom(*it, INTR_TYPE_LCL_ERR_STATUS_REG,
+                              0);
+            }
 
-        if(i_mode == UP)
-        {
-            err = putScom(*it, INTR_TYPE_LCL_ERR_STATUS_REG, 0);
-        }
+            if(err)
+            {
+                break;
+            }
 
-        if(err)
-        {
-            break;
-        }
+            // unmask lcl err intr
 
-        // unmask lcl err intr
+            mask = 0x8000000000000000ull;
 
-        mask = 0x8000000000000000ull;
+            err = modifyScom(
+                             *it,
+                             INTR_TYPE_MASK_REG,
+                             i_mode == UP ? ~mask : mask,
+                             i_mode == UP ? SCOM_AND : SCOM_OR);
 
-        err = modifyScom(
-                *it,
-                INTR_TYPE_MASK_REG,
-                i_mode == UP ? ~mask : mask,
-                i_mode == UP ? SCOM_AND : SCOM_OR);
+            if(err)
+            {
+                break;
+            }
 
-        if(err)
-        {
-            break;
-        }
+            // set lcl err intr conf - or
 
-        // set lcl err intr conf - or
+            if(i_mode == UP)
+            {
+                err = modifyScom(*it, INTR_TYPE_CONFIG_REG,
+                                 ~mask, SCOM_AND);
+            }
 
-        if(i_mode == UP)
-        {
-            err = modifyScom(*it, INTR_TYPE_CONFIG_REG, ~mask, SCOM_AND);
-        }
+            if(err)
+            {
+                break;
+            }
 
-        if(err)
-        {
-            break;
-        }
+            // enable powerbus gpin
 
-        // enable powerbus gpin
+            mask = 0x0018000000000000ull;
 
-        mask = 0x0018000000000000ull;
+            err = modifyScom(
+                             *it,
+                             GP2_REG,
+                             i_mode == UP ? mask : ~mask,
+                             i_mode == UP ? SCOM_OR : SCOM_AND);
 
-        err = modifyScom(
-                *it,
-                GP2_REG,
-                i_mode == UP ? mask : ~mask,
-                i_mode == UP ? SCOM_OR : SCOM_AND);
+            if(err)
+            {
+                break;
+            }
 
-        if(err)
-        {
-            break;
-        }
+            // enable interrupts in ipoll mask
 
-        // enable interrupts in ipoll mask
+            mask = 0;
 
-        mask = 0;
+            IPOLL::forEach(~0, &mask, &getMask);
 
-        IPOLL::forEach(~0, &mask, &getMask);
+            err = modifyScom(
+                             *it,
+                             IPOLL::address,
+                             i_mode == UP ? mask : ~mask,
+                             i_mode == UP ? SCOM_OR : SCOM_AND);
 
-        err = modifyScom(
-                *it,
-                IPOLL::address,
-                i_mode == UP ? mask : ~mask,
-                i_mode == UP ? SCOM_OR : SCOM_AND);
+            if(err)
+            {
+                break;
+            }
 
-        if(err)
-        {
-            break;
+            ++it;
         }
-
-        ++it;
     }
-
     return err;
 }
 
@@ -326,9 +237,9 @@ errlHndl_t Service::processIntrQMsgPreAck(const msg_t & i_msg,
 
     TargetHandle_t proc = NULL;
 
-    IcpXisr xisr;
+    INTR::XISR_t xisr;
 
-    xisr.u64 = i_msg.data[0];
+    xisr.u32 = i_msg.data[0];
 
     TargetHandleList procs;
     getTargetService().getAllChips(procs, TYPE_PROC);
@@ -352,7 +263,7 @@ errlHndl_t Service::processIntrQMsgPreAck(const msg_t & i_msg,
         ++it;
     }
 
-    ATTN_DBG("preack: xisr: 0x%07x, tgt: %p", xisr.u64, proc);
+    ATTN_DBG("preack: xisr: 0x%07x, tgt: %p", xisr.u32, proc);
 
     do {
 
diff --git a/src/usr/diag/attn/attnsvc.H b/src/usr/diag/attn/attnsvc.H
index 94b231847..2ee84f81e 100644
--- a/src/usr/diag/attn/attnsvc.H
+++ b/src/usr/diag/attn/attnsvc.H
@@ -125,36 +125,6 @@ class Service
                 ConfigureMode i_mode);
 
         /**
-         * @brief configureInterrupt enable or disable
-         *    a specific interrupt type on a single processor.
-         *
-         * @post Service (un)hooked to/from interrupt service
-         *   for local error and host interrupts.
-         * @post local error and host priority set(cleared).
-         * @post local error and host interrupts (un)masked at GFIR macro.
-         *
-         * @param[in] i_mode Up or down
-         * @param[in] i_proc The proc to be configured.
-         * @param[in] i_q The msg q to be registered with the
-         *             interrupt service.
-         * @param[in] i_xisr The XISR value for the type being configured.
-         * @param[in] i_xivrData The XIVR register content for
-         *              the type being configured.
-         * @param[in] i_xivrAddr The XIVR register address for the type
-         *               being configured.
-         *
-         * @retval[0] No error
-         * @retval[!0] Unexpected error
-         */
-        errlHndl_t configureInterrupt(
-                ConfigureMode i_mode,
-                TARGETING::TargetHandle_t i_proc,
-                msg_q_t i_q,
-                uint64_t i_xisr,
-                uint64_t i_xivrData,
-                uint64_t i_xivrAddr);
-
-        /**
          * @brief intrTask infinite wait-for-interrupt loop
          *
          * repeatedly call intrTaskWait and processIntrQMsg
diff --git a/src/usr/diag/attn/test/attnfakepresenter.C b/src/usr/diag/attn/test/attnfakepresenter.C
index bc137a26b..3c6866ade 100644
--- a/src/usr/diag/attn/test/attnfakepresenter.C
+++ b/src/usr/diag/attn/test/attnfakepresenter.C
@@ -129,7 +129,7 @@ void FakePresenter::interrupt(
 
     if(iv_tid)
     {
-        IcpXisr xisr;
+        INTR::XISR_t xisr;
 
         uint64_t node = 0, chip = 0;
 
@@ -145,7 +145,7 @@ void FakePresenter::interrupt(
         p->type = i_type;
         p->data = i_data;
         p->callback = i_callback;
-        p->xisr = xisr.u64;
+        p->xisr = xisr.u32;
 
         msg_t * m = msg_allocate();