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author | Stephen Cprek <smcprek@us.ibm.com> | 2017-02-06 12:31:42 -0600 |
---|---|---|
committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-03-01 14:04:03 -0500 |
commit | f0d7c809d23c2cf44c0be0ff594c14aff22d6f04 (patch) | |
tree | bbb67150e4e1d2a6309c4bed69ab70473d02e7ce /src/securerom | |
parent | d3d4ae7c89e6b35fffa8857170762992dc3c6538 (diff) | |
download | talos-hostboot-f0d7c809d23c2cf44c0be0ff594c14aff22d6f04.tar.gz talos-hostboot-f0d7c809d23c2cf44c0be0ff594c14aff22d6f04.zip |
Add SecureROM version info and Change SBE update to use max HBBL size
The HBBL also contains the securerom code and hw keys' hash
for verification purposes. So looking for the end of the HBBL
code leaves out those sections
Change-Id: I73a1b5c50e3a5b3f642ca569b90e79dbe4c4ba1e
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35979
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/securerom')
-rw-r--r-- | src/securerom/makefile | 2 | ||||
-rw-r--r-- | src/securerom/secureromasm.S (renamed from src/securerom/branchtable.S) | 45 |
2 files changed, 36 insertions, 11 deletions
diff --git a/src/securerom/makefile b/src/securerom/makefile index bd769aa6d..9c9f42017 100644 --- a/src/securerom/makefile +++ b/src/securerom/makefile @@ -38,12 +38,12 @@ LDFLAGS += -N ASMFLAGS += -D__ASSEMBLER__ -OBJS += branchtable.o OBJS += ROM.o OBJS += sha512.o OBJS += ecverify.o OBJS += hw_utils.o OBJS += rom_entry.o +OBJS += secureromasm.o OPT_LEVEL = -Os diff --git a/src/securerom/branchtable.S b/src/securerom/secureromasm.S index 86a1f92a8..12f174906 100644 --- a/src/securerom/branchtable.S +++ b/src/securerom/secureromasm.S @@ -1,11 +1,11 @@ # IBM_PROLOG_BEGIN_TAG # This is an automatically generated prolog. # -# $Source: src/securerom/branchtable.S $ +# $Source: src/securerom/secureromasm.S $ # # OpenPOWER HostBoot Project # -# Contributors Listed Below - COPYRIGHT 2016,2017 +# Contributors Listed Below - COPYRIGHT 2017 # [+] International Business Machines Corp. # # @@ -22,14 +22,37 @@ # permissions and limitations under the License. # # IBM_PROLOG_END_TAG +.include "kernel/ppcconsts.S" + #**************************************************************************** -#* branch table - a more stable location for software entering rom code +#* SecureROM info - useful info used by HBBL. Must match ROM.H #**************************************************************************** +.set SECROM_EYECATCHER, 0x23534543524F4D00 ;// uint64_t '#SECROM.' +.set SECROM_VERSION, 0x0000000900000001 ;// uint64_t -.include "kernel/ppcconsts.S" +# Before the SecureRom code starts there is SecureRomInfo see ROM.H +# - [8 bytes] - eyeCatch +# - [8 bytes] - version +# - [8 bytes] - branchtable offset +# - [16 bytes] - reserved +.section .text.securerominfo + +eyeCatch: + .quad SECROM_EYECATCHER + +version: + .quad SECROM_VERSION -branchtable: - .section ".branchtable","ax" +branchtableoffset: + .quad .text.branchtable + +reserved: + .zero 16 ;// 'reserve 16 bytes' + +#**************************************************************************** +#* branch table - a more stable location for software entering rom code +#**************************************************************************** +.section .text.branchtable .globl _SHA512_Init _SHA512_Init: @@ -66,19 +89,21 @@ _ROM_verify: springboard: b boingboing boingboing: + # @TODO RTC:156485 ROM blob will have to change to allow PHyp to use, + # unless PHyp directly uses mfspr r2, CFAR ;// get address of springboard - addi r2, r2, _SHA512_Init-springboard ;// base address + addi r2, r2, .text.securerominfo-springboard ;// base address add r0, r0, r2 ;// calculate entry relative addi r2, r2, 0x4000 ;//TOC+0x8000 part 1 addi r2, r2, (__toc_start+0x4000)@l ;//TOC+0x8000 part 2 mtctr r0 bctr ;// jump -# could put other assembly ocde routines here to conserver ROM space +# could put other assembly code routines here to conserve ROM space # including the sreset routine -# need to align on securerombase+0x100 !!! - .org .branchtable+0x100 +# need to align on branchtablebase+0x100 !!! + .org .text.branchtable+0x100 .globl _rom_sreset _rom_sreset: li r0, rom_sreset@l |