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| author | Dean Sanner <dsanner@us.ibm.com> | 2019-02-08 06:58:44 -0600 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2019-02-12 16:41:54 -0600 |
| commit | 502ca3e72e19278d25a390e2f9e891d632a2a44b (patch) | |
| tree | 5521f9bcf0916d364969990afaef5f69a0d2b981 /src/kernel/start.S | |
| parent | a733a70261d1c847e3130c509cc911f86d71453d (diff) | |
| download | talos-hostboot-502ca3e72e19278d25a390e2f9e891d632a2a44b.tar.gz talos-hostboot-502ca3e72e19278d25a390e2f9e891d632a2a44b.zip | |
Find cpu struct directly in doorbell interrupt handler
This fix accesses the cpu struct based on current thread
PIR instead of relying on an indirect pointer in the
current task struct. It is attempting to eliminate a
weak consistency/timing issue on the thread wakeups on
the secondary cores.
Given the way hostboot wakes up from the doorbell, there
is a good chunck of code executed prior to the doorbell
interrupt handler --> this also adds a msgsync instruction
in the sreset (0x100) interrupt handler.
Change-Id: I23db1d786a8a8f0637a890e2ac5de6197ee9cabb
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71582
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/kernel/start.S')
| -rw-r--r-- | src/kernel/start.S | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/src/kernel/start.S b/src/kernel/start.S index 0eda5b003..5b99ef691 100644 --- a/src/kernel/start.S +++ b/src/kernel/start.S @@ -5,7 +5,7 @@ # # OpenPOWER HostBoot Project # -# Contributors Listed Below - COPYRIGHT 2010,2018 +# Contributors Listed Below - COPYRIGHT 2010,2019 # [+] International Business Machines Corp. # [+] Joel Stanley # @@ -765,6 +765,10 @@ intvect_system_reset: ;// Raise priority to high. or 2,2,2 + ;// Need to send a msgysnc to prevent weak consistency issues + ;// with doorbells (they execute this path prior to dbell intr) + .long 0x7C0006EC + ;// Free up two registers temporarily. mtsprg0 r1 mtsprg1 r2 |
