Optimize PageTableManager and associated VMM.

    - Changed overall page table behavior to no longer use C bits
      in page table entries.  Instead, individual blocks mark
      pages as dirty based on stores during page faults.  Initially
      all writable pages are marked read-only until the first store
      to it.  At that time the block gets an exception and changes
      the permission on the page table entry to writable and marks
      its own SPTE to dirty.

    - Greatly reduced the number of tlbie's and page table accesses.
      Accomplished this by:
          * Skipping many of the page table manipulations, such as
	    LRU updates, when the PTE is invalid.
	  * Converting most of the previously general-case of
	    "Modifying a PTE" to specific cases such as "Resetting
	    the Reference Bit" and "Modifying the SW field".

    - Fixed the LRU-flush algorithm so that it is O(n) instead of
      O(n^2), where n = size of page table.

Change-Id: I2520fa88970fd7f656e6348bf6b34d5db82fd3db
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/892
Tested-by: Jenkins Server
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

1 files changed, 2 insertions, 2 deletions

diff --git a/src/kernel/basesegment.C b/src/kernel/basesegment.C
index 780c60792..8430538f8 100644
--- a/src/kernel/basesegment.C
+++ b/src/kernel/basesegment.C
@@ -89,10 +89,10 @@ void BaseSegment::_init()
     }
 }
 
-bool BaseSegment::handlePageFault(task_t* i_task, uint64_t i_addr)
+bool BaseSegment::handlePageFault(task_t* i_task, uint64_t i_addr, bool i_store)
 {
     // Tail recursion to block chain.
-    return iv_block->handlePageFault(i_task, i_addr);
+    return iv_block->handlePageFault(i_task, i_addr, i_store);
 }
 
 /**