diff options
| author | Matt Derksen <mderkse1@us.ibm.com> | 2019-01-15 10:48:31 -0600 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2019-01-24 13:12:08 -0600 |
| commit | cb35695328fbc1cb6764f048a8dbb3e81faba1e9 (patch) | |
| tree | ea9cce42514a9f000c687545ab5f417842df04af /src/include | |
| parent | 9de9d8f7c5b5c73247dc69925a594fcd07ce060c (diff) | |
| download | talos-hostboot-cb35695328fbc1cb6764f048a8dbb3e81faba1e9.tar.gz talos-hostboot-cb35695328fbc1cb6764f048a8dbb3e81faba1e9.zip | |
Inform PHYP of NVDIMM protection by OCC
The OCC is responsible for detecting the EPOW signal
and triggering the save operation on the NVDIMM.
Therefore, if the OCC is not running we are unprotected
from a poweroff event. PHYP needs to inform the LPARs
using the NV (non-volatile) memory of this state so they
can behave accordingly.
HBRT is responsible for telling PHYP when we get into this state.
There are two ways we can detect this state:
a) HBRT explicitly puts the PM complex into reset
b) PRD detects a specific FIR bit
The message should include this data:
- what state we are in (protected or unprotected)
- which processor is affected
Work for this story will include:
- Definition of the new message
- Creating a utility function to send the message
- Calling utility function to send 'unprotected' message
inside of all pm reset paths at runtime
Change-Id: Ib015d001d47883a247faedabedb0705ba0f1b215
RTC:201181
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68870
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: TSUNG K. YEUNG <tyeung@us.ibm.com>
Reviewed-by: Roland Veloz <rveloz@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/include')
| -rw-r--r-- | src/include/runtime/interface.h | 20 | ||||
| -rw-r--r-- | src/include/usr/isteps/nvdimm/nvdimm.H | 70 | ||||
| -rw-r--r-- | src/include/usr/isteps/nvdimm/nvdimmreasoncodes.H | 4 | ||||
| -rw-r--r-- | src/include/usr/targeting/common/util.H | 16 |
4 files changed, 92 insertions, 18 deletions
diff --git a/src/include/runtime/interface.h b/src/include/runtime/interface.h index 70b6e7e1d..31f5eaddc 100644 --- a/src/include/runtime/interface.h +++ b/src/include/runtime/interface.h @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2013,2018 */ +/* Contributors Listed Below - COPYRIGHT 2013,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -98,7 +98,7 @@ enum MemoryError_t #define HBRT_RC_NEXT_OPEN_RC ((int)(0x0u - 0x1009u)) /* 0xFFFF_EFF7 */ /** End return codes for scom_read, scom_write. */ - + /** * I2C Master Description: chip, engine and port packed into @@ -551,6 +551,14 @@ typedef struct hostInterfaces HBRT_FW_MSG_HBRT_FSP_RESP = 6, HBRT_FW_MSG_TYPE_I2C_LOCK = 7, HBRT_FW_MSG_TYPE_SBE_STATE = 8, + HBRT_FW_MSG_TYPE_NVDIMM_PROTECTION = 9, + }; + + // NVDIMM protection state enum + enum + { + HBRT_FW_NVDIMM_NOT_PROTECTED = 0, + HBRT_FW_NVDIMM_PROTECTED = 1 }; struct hbrt_fw_msg // define struct hbrt_fw_msg @@ -616,6 +624,14 @@ typedef struct hostInterfaces } __attribute__ ((packed)) sbe_state; // This struct is sent from HBRT with + // io_type set to HBRT_FW_MSG_TYPE_NVDIMM_PROTECTION + struct + { + uint64_t i_procId; // processor ID of the NVDIMM with/without OCC protection + uint64_t i_state; // NVDIMM protection state enum + } __attribute__ ((packed)) nvdimm_protection_state; + + // This struct is sent from HBRT with // io_type set to HBRT_FW_MSG_HBRT_FSP_REQ or // HBRT_FW_MSG_HBRT_FSP_RESP // This struct sends/receives an MBox message to the FSP diff --git a/src/include/usr/isteps/nvdimm/nvdimm.H b/src/include/usr/isteps/nvdimm/nvdimm.H index bfe39fcd0..c1df3033e 100644 --- a/src/include/usr/isteps/nvdimm/nvdimm.H +++ b/src/include/usr/isteps/nvdimm/nvdimm.H @@ -55,26 +55,29 @@ enum void nvdimm_restore(TARGETING::TargetHandleList &i_nvdimmList); #endif + /** - * @brief This function arms the trigger to enable backup in the event - * of power loss (DDR Reset_n goes low) + * @brief This function erases image on the nvdimm target * * @param[in] i_nvdimm - nvdimm target with NV controller * * @return errlHndl_t - Null if successful, otherwise a pointer to * the error log. */ -errlHndl_t nvdimmArmResetN(TARGETING::Target *i_nvdimm); +errlHndl_t nvdimmEraseNF(TARGETING::Target *i_nvdimm); /** - * @brief This function erases image on the nvdimm target + * @brief Set the status flag * - * @param[in] i_nvdimm - nvdimm target with NV controller + * @param[in] i_nvdimm - nvdimm target + * + * @param[in] i_status_flag - status flag to set for each nvdimm * - * @return errlHndl_t - Null if successful, otherwise a pointer to - * the error log. */ -errlHndl_t nvdimmEraseNF(TARGETING::Target *i_nvdimm); +void nvdimmSetStatusFlag(TARGETING::Target *i_nvdimm, const uint8_t i_status_flag); + + +#ifdef __HOSTBOOT_RUNTIME /** * @brief Check nvdimm error state @@ -86,14 +89,57 @@ errlHndl_t nvdimmEraseNF(TARGETING::Target *i_nvdimm); bool nvdimmInErrorState(TARGETING::Target *i_nvdimm); /** - * @brief Set the status flag + * @brief This function arms the trigger to enable backup in the event + * of power loss (DDR Reset_n goes low) * - * @param[in] i_nvdimm - nvdimm target + * @param[in] i_nvdimm - nvdimm target with NV controller * - * @param[in] i_status_flag - status flag to set for each nvdimm + * @return errlHndl_t - Null if successful, otherwise a pointer to + * the error log. + */ +errlHndl_t nvdimmArmResetN(TARGETING::Target *i_nvdimm); + +/** + * @brief Arms the trigger to enable backup in the event of a power loss + * on each NVDIMM + * + * The trigger (DDR_RESETN to the DIMM) is used to tell the NVDIMM + * that we have an EPOW event, so the NV controller can backup the + * data from the DRAM to flash. This will enable the NV controller + * to react when it sees the trigger toggles. * + * @param[in] i_nvdimmTargetList : list of dimms that are NVDIMMs + * @return true if no errors logged, else false */ -void nvdimmSetStatusFlag(TARGETING::Target *i_nvdimm, const uint8_t i_status_flag); +bool nvdimmArm(TARGETING::TargetHandleList &i_nvdimmTargetList); + + +/** + * @brief NVDIMM protection state + * + * NOT_PROTECTED - default state + * PROTECTED - switches to this when armed & OCC is in control + * UNPROTECTED_BECAUSE_ERROR - PRD detected error on NV controller + * Note: error will stay with target preventing PROTECTED status + * until power is cycled again + */ +enum nvdimm_protection_t +{ + NOT_PROTECTED = 0, + PROTECTED = 1, + UNPROTECTED_BECAUSE_ERROR = 2 +}; + +/** + * @brief Notify PHYP of NVDIMM protection status + * + * @param i_target Processor with NVDIMM + * @param i_state Protection state of NVDIMM + */ +errlHndl_t notifyNvdimmProtectionChange(TARGETING::Target* i_target, + const nvdimm_protection_t i_state); +#endif + } #endif // NVDIMM_EXT_H__ diff --git a/src/include/usr/isteps/nvdimm/nvdimmreasoncodes.H b/src/include/usr/isteps/nvdimm/nvdimmreasoncodes.H index bde22b942..0b48e94a0 100644 --- a/src/include/usr/isteps/nvdimm/nvdimmreasoncodes.H +++ b/src/include/usr/isteps/nvdimm/nvdimmreasoncodes.H @@ -72,7 +72,7 @@ enum nvdimmModuleId NVDIMM_CHECK_ERASE = 0x16, NVDIMM_ARM_ERASE = 0x17, NVDIMM_CHECK_READY = 0x18, - + NOTIFY_NVDIMM_PROTECTION_CHG = 0x19, }; /** @@ -111,7 +111,7 @@ enum nvdimmReasonCode NVDIMM_ERASE_FAILED = NVDIMM_COMP_ID | 0x19, // Failure to erase NVDIMM_RESTORE_FAILED = NVDIMM_COMP_ID | 0x1A, // Failure to restore NVDIMM_NOT_READY = NVDIMM_COMP_ID | 0x1B, // NVDIMM not ready for host to access - + NVDIMM_NULL_FIRMWARE_REQUEST_PTR = NVDIMM_COMP_ID | 0x1C, // Firmware request is NULL }; enum UserDetailsTypes diff --git a/src/include/usr/targeting/common/util.H b/src/include/usr/targeting/common/util.H index 971408d16..e26e0c795 100644 --- a/src/include/usr/targeting/common/util.H +++ b/src/include/usr/targeting/common/util.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2012,2018 */ +/* Contributors Listed Below - COPYRIGHT 2012,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -38,6 +38,8 @@ namespace TARGETING { class Target; +typedef Target* TargetHandle_t; +typedef std::vector<TargetHandle_t> TargetHandleList; /** * @brief Macro which indicates whether to translate addresses or not @@ -172,6 +174,7 @@ bool orderByNodeAndPosition( Target* i_firstProc, */ uint8_t is_fused_mode( ); + /** * @brief Determine if the given dimm target is an NVDIMM * @@ -181,6 +184,15 @@ uint8_t is_fused_mode( ); */ bool isNVDIMM( TARGETING::Target * i_target ); -} +/** + * @brief Grab list of NVDIMMs under the processor + * + * @param[in] i_proc : processor under which to search for NVDIMMs + * + * @return List of DIMM targets that are NVDIMMs + */ +TARGETING::TargetHandleList getProcNVDIMMs( TARGETING::Target * i_proc ); + +} // TARGETING #endif // __TARGETING_COMMON_UTIL_H |

