summaryrefslogtreecommitdiffstats
path: root/src/include
diff options
context:
space:
mode:
authorMike Baiocchi <mbaiocch@us.ibm.com>2016-11-04 11:30:17 -0500
committerWilliam G. Hoffa <wghoffa@us.ibm.com>2017-03-08 11:06:34 -0500
commitc3d233bbaf7a2f274147d16edbc080bae0ffd714 (patch)
tree8058bc8e764135eecc21cdcd1177814dd4e180c8 /src/include
parent1301e43641f7d3f315a0abc8112fa88927c9fa9a (diff)
downloadtalos-hostboot-c3d233bbaf7a2f274147d16edbc080bae0ffd714.tar.gz
talos-hostboot-c3d233bbaf7a2f274147d16edbc080bae0ffd714.zip
Hostboot Base TCE Support
This commit adds the base support for hostboot to enable/disable the use of TCEs. It allows for the creation and managment of a TCE table and also initializes the P9 processors to use this table. Change-Id: Idb40f9df5a90d8b7e87b2f5b745cbe7e66109df2 RTC:145071 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32562 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Marshall J. Wilks <mjwilks@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Diffstat (limited to 'src/include')
-rw-r--r--src/include/usr/intr/interrupt.H30
-rw-r--r--src/include/usr/runtime/runtime_reasoncodes.H13
-rw-r--r--src/include/usr/runtime/tceif.H84
-rw-r--r--src/include/usr/util/util_reasoncodes.H19
-rw-r--r--src/include/usr/util/utiltce.H111
-rw-r--r--src/include/usr/vmmconst.h7
6 files changed, 166 insertions, 98 deletions
diff --git a/src/include/usr/intr/interrupt.H b/src/include/usr/intr/interrupt.H
index 38d0fa473..aa0e8cdab 100644
--- a/src/include/usr/intr/interrupt.H
+++ b/src/include/usr/intr/interrupt.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2011,2016 */
+/* Contributors Listed Below - COPYRIGHT 2011,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -144,6 +144,34 @@ namespace INTR
MSG_INTR_ENABLE_PSI_INTR, //!< Enable PSIHB Interrupts
};
+
+ //Derived from 15.8 PSIHB Software Interfaces of the p9_cn_psi_hb_regs.pdf
+ // (splintered off from the P9 Pervasive Workbook)
+ // -- shared with other code (like utiltce)
+ struct PSIHB_SW_INTERFACES_t
+ {
+ uint64_t psihbbar; //Host Bridge Base Address Register - 0x0
+ uint64_t fspbar; //FSP Base Address Register - 0x8
+ uint64_t fspmmr; //FSP Memory Mask Register - 0x10
+ uint64_t tceaddr; //TAR - TCE Address Register - 0x18
+ uint64_t psihbcr; //PSI Host Bridge Ctrl/Status Register - 0x20
+ uint64_t psisemr; //PSIHB Status / Error Mask Register - 0x28
+ uint64_t reserved2; //Unused / Reserved
+ uint64_t phbdsr; //PSIHB Debug Setting register - 0x38
+ uint64_t phbscr; //PSI Host Bridge Ctrl/Status Register - 0x40
+ uint64_t phbccr; //PSI Host Bridge clear ctl/status reg - 0x48
+ uint64_t dmaupaddr; //DMA Upper Address Register - 0x50
+ uint64_t icr; //Interrupt Control Register - 0x58
+ uint64_t esbciaddr; //ESB CI Base Address - 0x60
+ uint64_t esbnotifyaddr; //ESB Notification Address - 0x68
+ uint64_t ivtofforig; //IVT Offset Origin Register - 0x70
+ uint64_t lsiintlevel; //LSI Intr Level Register (lab use - 0x78
+ uint64_t lsiintstatus; //LSI Interrupt Status register - 0x80
+ uint64_t reserved3; //Unused / Reserved - 0x88
+ uint64_t phbsecure; //PSI Host Bridge Secure Control reg - 0x90
+ };
+
+
/**
* Register a message queue for an interrupt type
* @param[in] i_msgQ The message queue
diff --git a/src/include/usr/runtime/runtime_reasoncodes.H b/src/include/usr/runtime/runtime_reasoncodes.H
index 469d2a6b2..311851680 100644
--- a/src/include/usr/runtime/runtime_reasoncodes.H
+++ b/src/include/usr/runtime/runtime_reasoncodes.H
@@ -40,21 +40,14 @@ namespace RUNTIME
MOD_HDATSERVICE_GET_STANDALONE_SECTION = 0x06, /**< hdatservice.C */
MOD_HDATSERVICE_GETHOSTDATASECTION = 0x07, /**< hdatservice.C */
MOD_HDATSERVICE_VERIFY_HDAT_ADDRESS = 0x08, /**< hdatservice.C */
- MOD_TCE_CREATE = 0x09, /**< tce.C */
- MOD_TCE_INIT_HDW = 0x0A, /**< tce.C */
- MOD_TCE_ALLOCATE = 0x0B, /**< tce.C */
- MOD_TCE_DEALLOCATE = 0x0C, /**< tce.C */
- MOD_TCE_INIT = 0x0D, /**< tce.C */
- MOD_TCE_MAP = 0x0E, /**< tce.C */
- MOD_HDATSERVICE_FINDSPIRA = 0x0F, /** hdatservice.C */
- MOD_HDATSERVICE_UPDATE_SECTION_ACTUAL = 0x10, /**< hdatservice.C */
- MOD_HDATSERVICE_MAPREGION = 0x11, /**< hdatservice.C */
+ MOD_HDATSERVICE_FINDSPIRA = 0x09, /** hdatservice.C */
+ MOD_HDATSERVICE_UPDATE_SECTION_ACTUAL = 0x0A, /**< hdatservice.C */
+ MOD_HDATSERVICE_MAPREGION = 0x0B, /**< hdatservice.C */
// customize_attrs_for_payload.C
MOD_CUST_COMP_NON_PHYP_RT_TARGET = 0x12,
MOD_CUST_CONF_HBRT_HYP_IDS = 0x13,
MOD_POPULATE_RTDATABYNODE = 0x14, /**< populate_hbruntime.C */
-
MOD_PM_RT_LOAD_PM_COMPLEX = 0x15, /**< rt_pm.C */
MOD_PM_RT_HCODE_UPDATE = 0x16, /**< rt_pm.C */
};
diff --git a/src/include/usr/runtime/tceif.H b/src/include/usr/runtime/tceif.H
deleted file mode 100644
index 1565200fe..000000000
--- a/src/include/usr/runtime/tceif.H
+++ /dev/null
@@ -1,84 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG */
-/* This is an automatically generated prolog. */
-/* */
-/* $Source: src/include/usr/runtime/tceif.H $ */
-/* */
-/* OpenPOWER HostBoot Project */
-/* */
-/* COPYRIGHT International Business Machines Corp. 2013,2014 */
-/* */
-/* Licensed under the Apache License, Version 2.0 (the "License"); */
-/* you may not use this file except in compliance with the License. */
-/* You may obtain a copy of the License at */
-/* */
-/* http://www.apache.org/licenses/LICENSE-2.0 */
-/* */
-/* Unless required by applicable law or agreed to in writing, software */
-/* distributed under the License is distributed on an "AS IS" BASIS, */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
-/* implied. See the License for the specific language governing */
-/* permissions and limitations under the License. */
-/* */
-/* IBM_PROLOG_END_TAG */
-#ifndef __TCEIF_H
-#define __TCEIF_H
-
-#include <stdint.h>
-#include <builtins.h>
-#include <errl/errlentry.H>
-#include <devicefw/userif.H>
-
-#define TCE_TRACE_NAME "TCE"
-
-namespace TCE
-{
- /**
- * @brief Responsible for initalizing the TCE entries
- *
- * @return errl - Return Error Handle if failed.
- *
- */
- errlHndl_t createTceTable();
-
- /**
- * @brief Responsible for setting up the Processors to point to the TCE
- * table
- *
- * @return errl - Return Error Handle if failed.
- *
- */
- errlHndl_t initTceInHdw();
-
- /**
- * @brief Responsible for allocating TCE Entries
- *
- * @param[in] i_startingAddress - Starting address to TCE
- * @param[in] i_size - Size of the address space
- * @param[out] startingToken - Starting Entry into the table.
- * (this is an offset into the array based on the
- * TCE index * PAGESIZE. Each TCE entry maps to a
- * pagesize of memory)
- *
- * Note: Must run createTceTable and InitTceInHdw or allocate will not work
- *
- * @return errl - Return Error Handle if failed.
- *
- */
- errlHndl_t allocateTces(uint64_t startingAddress, uint64_t size, uint64_t&
- startingToken);
-
- /**
- * @brief Responsible for deallocating TCE Entries
- *
- * @param[in] i_startingToken - Token indicating the starting entry to
- * remove
- * @param[in] i_size - Size of memory space to remove TCE entries
- * associated
- *
- * @return errl - Return Error Handle if fatal failure occurred.
- *
- */
- errlHndl_t deallocateTces(uint64_t startingToken, uint64_t size);
-};
-
-#endif
diff --git a/src/include/usr/util/util_reasoncodes.H b/src/include/usr/util/util_reasoncodes.H
index 4df8d3897..4b9c5c308 100644
--- a/src/include/usr/util/util_reasoncodes.H
+++ b/src/include/usr/util/util_reasoncodes.H
@@ -40,6 +40,14 @@ namespace Util
UTIL_LIDMGR_RT = 0x06,
UTIL_LIDMGR_CLEANUP = 0x07, // UtilLidMgr::cleanup
UTIL_RT_CMDS = 0x08, // rt_cmds.C
+ UTIL_TCE_INIT_HDW = 0x09, // UtilTceMgr::initTceInHdw
+ UTIL_TCE_ALLOCATE = 0x0A, // UtilTceMgr::allocateTces
+ UTIL_TCE_DEALLOCATE = 0x0B, // UtilTceMgr::deallocateTces
+ UTIL_TCE_CREATE_TABLE = 0x0C, // UtilTceMgr::createTceTable
+ UTIL_TCE_DISABLE_TCES = 0x0D, // Util::UTIL_TCE_DISABLE_TCES
+ UTIL_TCE_MAP_PSIHB = 0x0E, // UtilTceMgr::mapPsiHostBridge
+ UTIL_TCE_UNMAP_PSIHB = 0x0F, // UtilTceMgr::unmapPsiHostBridge
+
};
enum ReasonCode
@@ -55,6 +63,17 @@ namespace Util
UTIL_LIDMGR_UNLOAD_RC_FAIL = UTIL_COMP_ID | 0x09,
UTIL_LIDMGR_NOT_FOUND = UTIL_COMP_ID | 0x0A,
UTIL_LIDMGR_MM_FAIL = UTIL_COMP_ID | 0x0B,
+ UTIL_TCE_INVALID_SIZE = UTIL_COMP_ID | 0x0C,
+ UTIL_TCE_ADDR_NOT_ALIGNED = UTIL_COMP_ID | 0x0D,
+ UTIL_TCE_DEV_MAP_FAIL = UTIL_COMP_ID | 0x0E,
+ UTIL_TCE_DEV_UNMAP_FAIL = UTIL_COMP_ID | 0x0F,
+ UTIL_TCE_NOT_ENOUGH_FREE_ENTRIES = UTIL_COMP_ID | 0x10,
+ UTIL_TCE_ENTRY_NOT_CONTIGUOUS = UTIL_COMP_ID | 0x11,
+ UTIL_TCE_PREVIOUSLY_ALLOCATED = UTIL_COMP_ID | 0x12,
+ UTIL_TCE_INVALID_COUNT = UTIL_COMP_ID | 0x13,
+ UTIL_TCE_ALLOC_BLOCK_FAIL = UTIL_COMP_ID | 0x14,
+ UTIL_TCE_BLOCK_UNMAP_FAIL = UTIL_COMP_ID | 0x15,
+
};
};
diff --git a/src/include/usr/util/utiltce.H b/src/include/usr/util/utiltce.H
new file mode 100644
index 000000000..bcaeecbca
--- /dev/null
+++ b/src/include/usr/util/utiltce.H
@@ -0,0 +1,111 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/include/usr/util/utiltce.H $ */
+/* */
+/* OpenPOWER HostBoot Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2013,2017 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+#ifndef __TCEIF_H
+#define __TCEIF_H
+
+#include <stdint.h>
+#include <builtins.h>
+#include <errl/errlentry.H>
+#include <devicefw/userif.H>
+
+#define UTILTCE_TRACE_NAME "UTILTCE"
+
+namespace TCE
+{
+
+/*******************************************/
+/* General TCE Enable/Disable Functions */
+/*******************************************/
+
+/**
+ * @brief Responsible for allocating TCEs
+ *
+ * @param[in] i_startingAddress - Starting physical address that the allocated
+ * TCEs will map to.
+ * Needs to be Page-Aligned or will fail.
+ * @param[in] i_size - Size of the address space that TCEs map to.
+ * Size must be less than (512K * PAGESIZE) or will fail.
+ * Assert if not greater than zero.
+ *
+ * Note: First time this is called will cause TCE Table to be created and
+ * the Processors to be setup to point at the TCE Table
+ *
+ * @return errlHndl_t - Return Error Handle if failed
+ *
+ */
+errlHndl_t utilAllocateTces(uint64_t i_startingAddress,
+ size_t i_size);
+
+/**
+ * @brief Responsible for deallocating TCEs
+ *
+ * @param[in] i_startingAddress Starting physical address of the TCEs that
+ * are to be deallocated from the TCE Table.
+ * Needs to be page-aligned or will fail.
+ * @param[in] i_size - Size of address space that the TCEs that are to
+ * be deallocated map to.
+ * Size must be less than (512K * PAGESIZE) or will fail.
+ * Assert if not greater than zero.
+ *
+ * @return errlHndl_t - Return Error Handle if failed
+ *
+ */
+errlHndl_t utilDeallocateTces(uint64_t i_startingAddress,
+ size_t i_size);
+
+
+/**
+ * @brief Responsible for disabling TCEs on the system, including
+ * clearing the TCE Table and disabling Processor settings
+ *
+ * @return errlHndl_t - Return Error Handle if failed
+ *
+ */
+errlHndl_t utilDisableTces(void);
+
+
+/******************************************************/
+/* Specific TCE Setup/Close Functions for PAYLOAD */
+/******************************************************/
+
+/**
+ * @brief Responsible for Setting up TCEs for PAYLOAD
+ *
+ * @return errlHndl_t - Return Error Handle if failed
+ *
+ */
+errlHndl_t utilSetupPayloadTces(void);
+
+/**
+ * @brief Responsible for closing the TCEs for PAYLOAD
+ *
+ * @return errlHndl_t - Return Error Handle if failed
+ *
+ */
+errlHndl_t utilClosePayloadTces(void);
+
+};
+
+#endif
diff --git a/src/include/usr/vmmconst.h b/src/include/usr/vmmconst.h
index 17d8815b0..e6763c7bd 100644
--- a/src/include/usr/vmmconst.h
+++ b/src/include/usr/vmmconst.h
@@ -228,10 +228,11 @@ enum BlockPriority
#define DUMP_TEST_MEMORY_ADDR (MPIPL_ATTR_DATA_ADDR + MPIPL_ATTR_DATA_SIZE)
#define DUMP_TEST_MEMORY_SIZE (4*MEGABYTE)
-/** Location of the TCE Table */
-#define TCE_TABLE_ADDR (90*MEGABYTE)
+/** Physical memory location of the TCE Table */
+/** - needs to be aligned on 4MB boundary */
+#define TCE_TABLE_ADDR (88*MEGABYTE)
-// The size if 512K bytes of entries each uint64_t or 8 bytes in size.
+/** The TCE Table size is 512K entries each uint64_t (8 bytes) in size */
#define TCE_TABLE_SIZE ((512*KILOBYTE)*sizeof(uint64_t))
#endif /* _VMMCONST_H */
OpenPOWER on IntegriCloud