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author | Andre Marin <aamarin@us.ibm.com> | 2019-07-23 12:32:07 -0500 |
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committer | Daniel M Crowell <dcrowell@us.ibm.com> | 2019-08-08 17:08:12 -0500 |
commit | 9fb424b8af396bb626c28105b4383fc22aeccd94 (patch) | |
tree | 39c761004e6f89f880743d7c556d423ab80126a6 /src/include | |
parent | 4a6e203860f5b8cfeb7de3740b06f9bbaf2d5f1e (diff) | |
download | talos-hostboot-9fb424b8af396bb626c28105b4383fc22aeccd94.tar.gz talos-hostboot-9fb424b8af396bb626c28105b4383fc22aeccd94.zip |
Change return size of the DDR4 DDIMM SPD
Change-Id: If531b0ce88692f6900e414012c44de578acea2b7
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/80826
Reviewed-by: Christian R Geddes <crgeddes@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/include')
-rw-r--r-- | src/include/usr/fapi2/hwpf_fapi2_reasoncodes.H | 3 | ||||
-rw-r--r-- | src/include/usr/vpd/spdenums.H | 13 |
2 files changed, 16 insertions, 0 deletions
diff --git a/src/include/usr/fapi2/hwpf_fapi2_reasoncodes.H b/src/include/usr/fapi2/hwpf_fapi2_reasoncodes.H index 8c85fa1dd..2cc133468 100644 --- a/src/include/usr/fapi2/hwpf_fapi2_reasoncodes.H +++ b/src/include/usr/fapi2/hwpf_fapi2_reasoncodes.H @@ -72,6 +72,7 @@ namespace fapi2 MOD_FAPI2_PLAT_GET_MC_PLL_BUCKET = 0x1D, MOD_FAPI2_PLAT_GET_FREQ_MCA_MHZ = 0x1E, MOD_GET_OMI_FREQ_AND_VCO = 0x1F, + MOD_FAPI2_SPD_ACCESS = 0x20, }; /** @@ -143,6 +144,8 @@ namespace fapi2 RC_NO_MATCHING_FREQ = HWPF_COMP_ID | 0x31, RC_FREQ_LIST_NOT_FOUND = HWPF_COMP_ID | 0x32, RC_PROC_FREQ_MISMATCH = HWPF_COMP_ID | 0x33, + + RC_INVALID_SPD_DRAM_GEN = FAPI2_COMP_ID | 0x34, }; /** diff --git a/src/include/usr/vpd/spdenums.H b/src/include/usr/vpd/spdenums.H index a6577ed12..ecfe51098 100644 --- a/src/include/usr/vpd/spdenums.H +++ b/src/include/usr/vpd/spdenums.H @@ -46,6 +46,19 @@ enum }; /** +* @brief Enumerations for common SPD values +*/ +enum +{ + MEM_DDR3 = 0xB, + MEM_DDR4 = 0xC, + DDR3_SPD_SIZE = 256, + DDR4_SPD_SIZE = 512, + DDIMM_DDR4_SPD_SIZE = 640, + MEM_DDIMM = 0xA +}; + +/** * @brief Enumerations for fields that can be accessed in the SPD */ enum |