diff options
author | Dan Crowell <dcrowell@us.ibm.com> | 2019-07-16 15:51:06 -0500 |
---|---|---|
committer | Daniel M Crowell <dcrowell@us.ibm.com> | 2019-08-05 15:33:09 -0500 |
commit | 7a758c4ef4c69abf1510271e437d250e4691f1ac (patch) | |
tree | 3b271dcbfe48d4ff0d02304675275434dc634b8a /src/include | |
parent | 4ced775921eb599a0579e98c2f3f19ab08b53ed3 (diff) | |
download | talos-hostboot-7a758c4ef4c69abf1510271e437d250e4691f1ac.tar.gz talos-hostboot-7a758c4ef4c69abf1510271e437d250e4691f1ac.zip |
Handle processor swap between slots to 1-socket system
If a processor was booted in the second slot, it will be programmed
to use the memory for that slot. When it is installed in the first
slot it will then get reprogrammed to use the data for slot0.
However, if the new system only contains data for that 1 slot, we
won't be able to find a match to do the initial part of the boot.
This change will force some values into good enough shape to get
the boot far enough to do the SBE update to reprogram the memory
map.
Change-Id: I9b88d4181272104a8c680e9b5e84c4d204fdea05
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/80680
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Reviewed-by: Christian R Geddes <crgeddes@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/include')
-rw-r--r-- | src/include/arch/memorymap.H | 25 | ||||
-rw-r--r-- | src/include/usr/isteps/istep_reasoncodes.H | 2 |
2 files changed, 27 insertions, 0 deletions
diff --git a/src/include/arch/memorymap.H b/src/include/arch/memorymap.H index 7b75f6363..1ea479d8c 100644 --- a/src/include/arch/memorymap.H +++ b/src/include/arch/memorymap.H @@ -39,8 +39,13 @@ constexpr uint64_t MMIO_OFFSET_PER_CHIP = (4*TERABYTE); //0x40000000000 constexpr uint64_t MMIO_OFFSET_PER_GROUP = (32*TERABYTE); //0x200000000000 constexpr uint64_t MMIO_BASE = 0x6000000000000; + /** * @brief Compute MMIO value for a given chip and base value + * @param[in] i_baseAddr group0-chip0 address + * @param[in] i_group Fabric Group ID to compute address for + * @param[in] i_chip Fabric Chip ID to compute address for + * @return Fully qualified memory address */ inline uint64_t computeMemoryMapOffset( uint64_t i_baseAddr, uint8_t i_group, @@ -52,6 +57,26 @@ inline uint64_t computeMemoryMapOffset( uint64_t i_baseAddr, }; /** + * @brief Determine fabric id from a MMIO address + * @param[in] i_addr position-specific memory address + * @param[out] i_group Fabric Group ID to compute address for + * @param[out] i_chip Fabric Chip ID to compute address for + */ +inline void getFabricIdFromAddr( uint64_t i_addr, + uint8_t& o_group, + uint8_t& o_chip ) +{ + // chop off any high-order offset + uint64_t l_addr = i_addr % MMIO_BASE; + // use integer math to get the group id + o_group = l_addr / MMIO_OFFSET_PER_GROUP; + // chop off the group + l_addr = l_addr % MMIO_OFFSET_PER_GROUP; + // use integer math to get the chip id + o_chip = l_addr % MMIO_OFFSET_PER_CHIP; +}; + +/** * @brief A few default values that will need to be known * by low-level code */ diff --git a/src/include/usr/isteps/istep_reasoncodes.H b/src/include/usr/isteps/istep_reasoncodes.H index 36c1e8e39..2199d75c8 100644 --- a/src/include/usr/isteps/istep_reasoncodes.H +++ b/src/include/usr/isteps/istep_reasoncodes.H @@ -69,6 +69,7 @@ namespace ISTEP MOD_CALL_UPDATE_UCD_FLASH = 0x26, MOD_LOAD_HCODE = 0x27, MOD_GET_OMI_FREQ = 0x28, + MOD_DISCOVER_TARGETS = 0x29, }; /** @@ -144,6 +145,7 @@ namespace ISTEP RC_UCD_IMG_NOT_IN_CONTAINER = ISTEP_COMP_ID | 0x4F, RC_MM_UNMAP_FAILED = ISTEP_COMP_ID | 0x50, RC_OMI_FREQ_MISMATCH = ISTEP_COMP_ID | 0x51, + RC_CANNOT_BOOT_WITH_MISMATCHED_BARS = ISTEP_COMP_ID | 0x52, }; }; |