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authorRoland Veloz <rveloz@us.ibm.com>2018-03-27 11:17:43 -0500
committerDaniel M. Crowell <dcrowell@us.ibm.com>2018-06-01 23:56:31 -0400
commitc6916a42d34bdd1c9502056740ec3a819c082099 (patch)
tree9876a2d6e6a72d66b6733a68dcb308f18db493a8 /src/include/usr
parent6bb10d4941533e21d5b01c634d7f2fcaed83364c (diff)
downloadtalos-hostboot-c6916a42d34bdd1c9502056740ec3a819c082099.tar.gz
talos-hostboot-c6916a42d34bdd1c9502056740ec3a819c082099.zip
Add support for getting SBE Capabilites; extract SBE Version, Commit ID and Tags
Structure sbeCapabilities_t was added to the sbe_utils.H, a common file that can be shared among other files that need the sbeCapabilities_t struct. The psuCommand structure was updated, in file sbe_psudd.H, to facilitate the PSU call to get SBE Capabilities. Also structs fifoGetCapabilitiesResponse/ fifoGetCapabilitiesRequest were added to file sbe_fifodd to facilitate the FIFO call to get SBE Capabilities. Attributes SBE_COMMIT_ID, SBE_VERSION_INFO and SBE_RELEASE_TAGS were added to the target '<id>chip-processor</id>'. These attributes are the ultimate receiver of the SBE capabilities' version, commit id and release tags info. New file sbe_capabilities.C contains the call to getPsuSbeCapabilities and getFifoSbeCapabilities which ultimately perform the call to do the PSU chip operation, FIFO chip operation and update the attributes above. In step 6, host_discover_targets, and in step 8, call_proc_check_slave_sbe_seeprom_complete, is where the calls to getPsuSbeCapabilities and getFifoSbeCapabilities are made respectively. The file FipS_SBE_Interface_Specification_v1.3a.pdf (FIFO), file Host_SBE_Interface_Specification_v0.9d.pdf and looking at HW code were used to guide the coding of this. Change-Id: I32ccdeab7bf0a478298b199d42d74650a3f393f6 RTC:181139 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56317 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/include/usr')
-rw-r--r--src/include/usr/sbeio/sbe_psudd.H65
-rw-r--r--src/include/usr/sbeio/sbe_utils.H31
-rw-r--r--src/include/usr/sbeio/sbeioif.H20
-rw-r--r--src/include/usr/sbeio/sbeioreasoncodes.H1
4 files changed, 111 insertions, 6 deletions
diff --git a/src/include/usr/sbeio/sbe_psudd.H b/src/include/usr/sbeio/sbe_psudd.H
index 76603859f..aee071949 100644
--- a/src/include/usr/sbeio/sbe_psudd.H
+++ b/src/include/usr/sbeio/sbe_psudd.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2016,2017 */
+/* Contributors Listed Below - COPYRIGHT 2016,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -55,6 +55,11 @@ class SbePsu
public:
/**
+ * @brief The alignment boundary for sending an SBE Capabilities message
+ */
+ static constexpr uint32_t SBE_CAPABILITIES_ALIGNMENT_SIZE_IN_BYTES = 128;
+
+ /**
* @brief get the instance of this class
*
* @return the (one and only) instance of SbePsu
@@ -102,6 +107,7 @@ class SbePsu
//BYTE 7 options
enum psuGenericMessageCommands
{
+ SBE_PSU_MSG_GET_CAPABILITIES = 0x02,
SBE_PSU_READ_SEEPROM = 0x03,
SBE_PSU_SET_FFDC_ADDRESS = 0x04,
SBE_PSU_GENERIC_MSG_QUIESCE = 0x05,
@@ -227,6 +233,25 @@ class SbePsu
* 0x4 - Reg 2 is non-reserved (read or write this reg)
* 0x8 - Reg 3 is non-reserved (read or write this reg)
*/
+ enum psuGetCapabilitiesNonReservedMsgs
+ {
+ SBE_GET_CAPABILITIES_REQ_USED_REGS = 0x07, // Use Reg 0 ... Reg 2 (0x1 + 0x2 + 0x4)
+ SBE_GET_CAPABILITIES_RSP_USED_REGS = 0x07, // Use Reg 0 ... Reg 2 (0x1 + 0x2 + 0x4)
+ };
+
+ /**
+ * @brief non reserved word enums
+ *
+ * Shows which of the request and response msg registers are
+ * not reserved. Reserved registers do not need to be written
+ * or read.
+ *
+ * This is a 4 bit field:
+ * 0x1 - Reg 0 is non-reserved (read or write this reg)
+ * 0x2 - Reg 1 is non-reserved (read or write this reg)
+ * 0x4 - Reg 2 is non-reserved (read or write this reg)
+ * 0x8 - Reg 3 is non-reserved (read or write this reg)
+ */
enum psuReadSeepromMsgs
{
SBE_READ_SEEPROM_REQ_USED_REGS = 0x07,
@@ -407,6 +432,19 @@ class SbePsu
uint64_t cd7_stashKeyAddr_MbxReg3Reserved; //Mbx Reg 3
} PACKED;
+ // Complies with document Host_SBE_Interface_Specification_v0.9e.pdf
+ struct // getSbeCapabilities
+ {
+ uint16_t cd7_getSbeCapabilities_Reserved; //Mbx Reg 0
+ uint16_t cd7_getSbeCapabilities_ControlFlags; //Mbx Reg 0
+ uint16_t cd7_getSbeCapabilities_SeqID; //Mbx Reg 0
+ uint8_t cd7_getSbeCapabilities_CommandClass; //Mbx Reg 0: 0xD7 (SBE_PSU_GENERIC_MESSAGE)
+ uint8_t cd7_getSbeCapabilities_Command; //Mbx Reg 0: 0x02 (SBE_PSU_MSG_GET_CAPABILITIES)
+ uint64_t cd7_getSbeCapabilities_CapabilitiesSize; //Mbx Reg 1
+ uint64_t cd7_getSbeCapabilities_CapabilitiesAddr; //Mbx Reg 2
+ uint64_t cd7_getSbeCapabilities_MbxReg3Reserved; //Mbx Reg 3
+ } PACKED;
+
struct //setUnsecureMemoryRegion
{
uint16_t cd6_memRegion_Reserved; //Mbx Reg 0
@@ -475,7 +513,7 @@ class SbePsu
{
}
- };
+ }; // end union psuCommand
/**
* @brief Struct for PSU response message format
@@ -526,6 +564,27 @@ class SbePsu
uint32_t indirect_reserved;
uint32_t indirect_size; //Size in dbl words for Indirect data
} PACKED;
+
+ // Complies with document Host_SBE_Interface_Specification_v0.9e.pdf
+ struct // fields for the SBE Capabilities response
+ {
+ // mbxReg 4
+ uint16_t sbe_primaryStatus;
+ uint16_t sbe_secondaryStatus;
+ uint16_t sbe_seqID;
+ uint8_t sbe_commandClass; // 0xD7 (SBE_PSU_GENERIC_MESSAGE)
+ uint8_t sbe_command; // 0x02 (SBE_PSU_MSG_GET_CAPABILITIES)
+ // mbxReg 5
+ uint32_t sbe_reserved1;
+ uint32_t sbe_capabilities_size; // Size of Capabilities data returned in bytes
+ // mbxReg 6
+ uint16_t sbe_major_version;
+ uint16_t sbe_minor_version;
+ uint32_t sbe_commit_id;
+ // mbxReg 7
+ uint64_t sbe_reserved2;
+ } PACKED;
+
psuResponse() :
primaryStatus (0xffff), //invalid status
secondaryStatus (0xffff), //invalid status
@@ -541,7 +600,7 @@ class SbePsu
{
}
- };
+ }; // end struct psuResponse
/**
* @brief timeout values
diff --git a/src/include/usr/sbeio/sbe_utils.H b/src/include/usr/sbeio/sbe_utils.H
index 848586e62..8f1f77688 100644
--- a/src/include/usr/sbeio/sbe_utils.H
+++ b/src/include/usr/sbeio/sbe_utils.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2017 */
+/* Contributors Listed Below - COPYRIGHT 2017,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -34,6 +34,32 @@
namespace SBEIO
{
+ /**
+ * @brief Struct for the SBE Capabilities
+ *
+ * Complies with document Host_SBE_Interface_Specification_v0.9e.pdf
+ */
+ static constexpr uint8_t SBE_RELEASE_TAG_MAX_CHARS = 20;
+ static constexpr uint8_t SBE_MAX_CAPABILITIES = 20;
+
+ struct sbeCapabilities_t
+ {
+ uint16_t majorVersion;
+ uint16_t minorVersion;
+ uint32_t commitId;
+ char releaseTag[SBE_RELEASE_TAG_MAX_CHARS]; // AKA build tag
+ uint32_t capabilities[SBE_MAX_CAPABILITIES];
+
+ sbeCapabilities_t() :
+ majorVersion(0)
+ , minorVersion(0)
+ , commitId(0)
+ , releaseTag{ 0 }
+ , capabilities{ 0 }
+ {
+ }
+ } PACKED; // end struct sbeCapabilities_t
+
enum SBE_TARGET_TYPES {
SBE_TARGET_TYPE_PROC = 0x00,
@@ -53,7 +79,6 @@ namespace SBEIO
/// @param[in] i_hbTarget includes the HB target type
/// @return: ChipletID for i_hbTarget target
uint8_t getChipletIDForSBE(TARGETING::Target * i_hbTarget);
-
}
-#endif // __SBE_UTILS_H \ No newline at end of file
+#endif // __SBE_UTILS_H
diff --git a/src/include/usr/sbeio/sbeioif.H b/src/include/usr/sbeio/sbeioif.H
index 3e68599f3..0f879de92 100644
--- a/src/include/usr/sbeio/sbeioif.H
+++ b/src/include/usr/sbeio/sbeioif.H
@@ -96,6 +96,26 @@ namespace SBEIO
*/
errlHndl_t sendPsuQuiesceSbe(TARGETING::Target * i_target);
+ /**
+ * @brief Get the capabilities of the SBE via PSU
+ *
+ * @param[in] i_target Target with SBE to get capabilities from
+ *
+ * @return errlHndl_t Error log handle on failure.
+ *
+ */
+ errlHndl_t getPsuSbeCapabilities(TARGETING::TargetHandle_t i_target);
+
+ /**
+ * @brief Get the capabilities of the SBE via FIFO
+ *
+ * @param[in] i_target Target with SBE to get capabilities from
+ *
+ * @return errlHndl_t Error log handle on failure.
+ *
+ */
+ errlHndl_t getFifoSbeCapabilities(TARGETING::TargetHandle_t i_target);
+
/**
* @brief Sends a PSU chipOp to stash away a key,addr pair on the SBE
*
diff --git a/src/include/usr/sbeio/sbeioreasoncodes.H b/src/include/usr/sbeio/sbeioreasoncodes.H
index a17b2576a..ff82aca13 100644
--- a/src/include/usr/sbeio/sbeioreasoncodes.H
+++ b/src/include/usr/sbeio/sbeioreasoncodes.H
@@ -127,6 +127,7 @@ enum sbeioReasonCode
SBEIO_EXCEED_MAX_SIDE_SWITCHES = SBEIO_COMP_ID | 0x5C,
SBEIO_EXCEED_MAX_SIDE_BOOTS = SBEIO_COMP_ID | 0x5D,
SBEIO_SLAVE_FAILED_TO_BOOT = SBEIO_COMP_ID | 0x5E,
+ SBEIO_RECEIVED_UNEXPECTED_MSG = SBEIO_COMP_ID | 0x5F,
// SBE Vital Attention error codes
SBEIO_SBE_RC_VALUE_INFO = SBEIO_COMP_ID | 0x60,
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