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authorAndrew Jeffery <andrewrj@au1.ibm.com>2018-10-15 14:50:54 +1030
committerDaniel M. Crowell <dcrowell@us.ibm.com>2018-10-15 16:11:03 -0500
commit95165ec1e1116f5675c8410f230ecce95af86c6d (patch)
tree77bf916f2256c57324e2d9f76fc8a97adfa19867 /src/include/usr
parent79549236b644e839dc672aaf5964add580c6caa4 (diff)
downloadtalos-hostboot-95165ec1e1116f5675c8410f230ecce95af86c6d.tar.gz
talos-hostboot-95165ec1e1116f5675c8410f230ecce95af86c6d.zip
Revert "sio: Add test for availability - LPC error tweak"
This reverts commit 627379aeaa27e30d66ebb0aecf218708d465162c, which incorrectly attempted to account for LPC errors during testing for SIO absence. The broken patch interprets the OPBM status as LPCHC status and expects an LPCHC SYNC Abnormal error, however as it's the OPBM status that indicates the error we never hit the LPCHC error path to populate the errl with the error RC expected by the SIO driver. Change-Id: Ib993d4a2b9b4e5018d9273a1c82f8b5c21ec9a25 Signed-off-by: Andrew Jeffery <andrewrj@au1.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67459 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/include/usr')
-rw-r--r--src/include/usr/lpc/lpc_reasoncodes.H3
-rw-r--r--src/include/usr/sio/sio.H14
2 files changed, 1 insertions, 16 deletions
diff --git a/src/include/usr/lpc/lpc_reasoncodes.H b/src/include/usr/lpc/lpc_reasoncodes.H
index ed2de4bfb..d5c15628a 100644
--- a/src/include/usr/lpc/lpc_reasoncodes.H
+++ b/src/include/usr/lpc/lpc_reasoncodes.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2014,2018 */
+/* Contributors Listed Below - COPYRIGHT 2014,2017 */
/* [+] Google Inc. */
/* [+] International Business Machines Corp. */
/* */
@@ -55,7 +55,6 @@ namespace LPC
RC_CANT_USE_SENTINEL = LPC_COMP_ID | 0x08,
RC_BAD_TARGET = LPC_COMP_ID | 0x09,
RC_LPCHC_ERROR = LPC_COMP_ID | 0x0A,
- RC_LPCHC_SYNCAB_ERROR = LPC_COMP_ID | 0x0B,
};
};
diff --git a/src/include/usr/sio/sio.H b/src/include/usr/sio/sio.H
index ec422d8b7..52f752da7 100644
--- a/src/include/usr/sio/sio.H
+++ b/src/include/usr/sio/sio.H
@@ -25,8 +25,6 @@
#ifndef __SIO_SIO_H
#define __SIO_SIO_H
-#include <errl/errlentry.H>
-
namespace SIO
{
/**
@@ -49,17 +47,5 @@ namespace SIO
SIO_SCRATCH_REG1 = 0x21, /**< Scratch Reg */
SIO_SCRATCH_REG2 = 0x22, /**< Scratch Reg */
};
-
- /**
- * @brief Test if SuperIO is accessible on the LPC bus
- *
- * @param[out] o_available Set true if the SuperIO controller is available,
- * false if it explicitly detected as unavailable,
- * and unchanged if an unexpected error occurs.
- *
- * @return NULL if the test did not fail unexpectedly, otherwise a pointer
- * to an errorlog associated with the error.
- */
- errlHndl_t isAvailable(bool& o_available);
}
#endif
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