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authorDan Crowell <dcrowell@us.ibm.com>2018-10-11 09:22:47 -0500
committerWilliam G. Hoffa <wghoffa@us.ibm.com>2018-10-11 17:53:08 -0500
commit627379aeaa27e30d66ebb0aecf218708d465162c (patch)
tree14782327cf978a2f05efdc74339990a8f8fceb37 /src/include/usr
parent30bd2ff53aa13e2d01bf02405f3e6eed3e576454 (diff)
downloadtalos-hostboot-627379aeaa27e30d66ebb0aecf218708d465162c.tar.gz
talos-hostboot-627379aeaa27e30d66ebb0aecf218708d465162c.zip
sio: Add test for availability - LPC error tweak
Some components can continue to operate in the face of the SuperIO controller being unavailable on the LPC bus (specifically, the UART and boot flag processing). Other components require it present (AST-based SFC implementations and the AST mailbox). Components in the latter category can just fail with an errl when they attempt to access the controller, but for those in the former category we add an isAvailable() function in the SIO namespace to sidestep dealing with errors. Specifically, isAvailable() tests for the expected error when the SuperIO controller is disabled, and returns an errlHndl_t if any other error occurs. This way true LPC errors are propagated to the caller to commit as desired. Change-Id: Ib94ceabfd4f4e9c63c114cfe3db3c954dbb6d6e5 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67315 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: ANDREW R. JEFFERY <andrewrj@au1.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Diffstat (limited to 'src/include/usr')
-rw-r--r--src/include/usr/lpc/lpc_reasoncodes.H3
-rw-r--r--src/include/usr/sio/sio.H14
2 files changed, 16 insertions, 1 deletions
diff --git a/src/include/usr/lpc/lpc_reasoncodes.H b/src/include/usr/lpc/lpc_reasoncodes.H
index d5c15628a..ed2de4bfb 100644
--- a/src/include/usr/lpc/lpc_reasoncodes.H
+++ b/src/include/usr/lpc/lpc_reasoncodes.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2014,2017 */
+/* Contributors Listed Below - COPYRIGHT 2014,2018 */
/* [+] Google Inc. */
/* [+] International Business Machines Corp. */
/* */
@@ -55,6 +55,7 @@ namespace LPC
RC_CANT_USE_SENTINEL = LPC_COMP_ID | 0x08,
RC_BAD_TARGET = LPC_COMP_ID | 0x09,
RC_LPCHC_ERROR = LPC_COMP_ID | 0x0A,
+ RC_LPCHC_SYNCAB_ERROR = LPC_COMP_ID | 0x0B,
};
};
diff --git a/src/include/usr/sio/sio.H b/src/include/usr/sio/sio.H
index 52f752da7..ec422d8b7 100644
--- a/src/include/usr/sio/sio.H
+++ b/src/include/usr/sio/sio.H
@@ -25,6 +25,8 @@
#ifndef __SIO_SIO_H
#define __SIO_SIO_H
+#include <errl/errlentry.H>
+
namespace SIO
{
/**
@@ -47,5 +49,17 @@ namespace SIO
SIO_SCRATCH_REG1 = 0x21, /**< Scratch Reg */
SIO_SCRATCH_REG2 = 0x22, /**< Scratch Reg */
};
+
+ /**
+ * @brief Test if SuperIO is accessible on the LPC bus
+ *
+ * @param[out] o_available Set true if the SuperIO controller is available,
+ * false if it explicitly detected as unavailable,
+ * and unchanged if an unexpected error occurs.
+ *
+ * @return NULL if the test did not fail unexpectedly, otherwise a pointer
+ * to an errorlog associated with the error.
+ */
+ errlHndl_t isAvailable(bool& o_available);
}
#endif
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