diff options
author | Raja Das <rajadas2@in.ibm.com> | 2019-02-06 03:50:46 -0600 |
---|---|---|
committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2019-03-21 08:12:43 -0500 |
commit | 55260d579728b2e625b1251c5a4ec21071b7db4d (patch) | |
tree | 27c14150598fff753a53fa56a981c359a4f503e3 /src/include/usr | |
parent | be07d93af71c9213818304af4ed125a60f458d38 (diff) | |
download | talos-hostboot-55260d579728b2e625b1251c5a4ec21071b7db4d.tar.gz talos-hostboot-55260d579728b2e625b1251c5a4ec21071b7db4d.zip |
Security List Binary Dump Chip-op Support
Change-Id: I4a4b7c8fccab508ee59e5e6330b27b07b5ae91f8
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71417
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: MURULIDHAR NATARAJU <murulidhar@in.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/include/usr')
-rw-r--r-- | src/include/usr/sbeio/sbe_psudd.H | 34 | ||||
-rw-r--r-- | src/include/usr/sbeio/sbeioif.H | 17 |
2 files changed, 48 insertions, 3 deletions
diff --git a/src/include/usr/sbeio/sbe_psudd.H b/src/include/usr/sbeio/sbe_psudd.H index 8c56b2a8d..3a21ad122 100644 --- a/src/include/usr/sbeio/sbe_psudd.H +++ b/src/include/usr/sbeio/sbe_psudd.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016,2018 */ +/* Contributors Listed Below - COPYRIGHT 2016,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -119,6 +119,7 @@ class SbePsu SBE_PSU_GENERIC_MSG_QUIESCE = 0x05, SBE_CMD_CONTROL_SYSTEM_CONFIG = 0x06, SBE_PSU_MSG_STASH_KEY_ADDR = 0x07, + SBE_PSU_SECURITY_LIST_BIN_DUMP = 0x08, }; /** @@ -322,6 +323,25 @@ class SbePsu SBE_MEM_REGION_RSP_USED_REGS = 0x01, }; + /** + * @brief non reserved word enums + * + * Shows which of the request and response msg registers are + * not reserved. Reserved registers do not need to be written + * or read. + * + * This is a 4 bit field: + * 0x1 - Reg 0 is non-reserved (read or write this reg) + * 0x2 - Reg 1 is non-reserved (read or write this reg) + * 0x4 - Reg 2 is non-reserved (read or write this reg) + * 0x8 - Reg 3 is non-reserved (read or write this reg) + */ + enum psuSecurityListBinDumpNonReservedMsgs + { + SBE_SECURITY_LIST_BIN_DUMP_REQ_USED_REGS = 0x01, + SBE_SECURITY_LIST_BIN_DUMP_RSP_USED_REGS = 0x01, + }; + /** * @brief Struct for PSU command message format @@ -423,6 +443,18 @@ class SbePsu uint64_t cd7_PsuQuiesce_MbxReg3reserved; } PACKED; + struct //securityListBinDump + { + uint16_t cd7_securityListBinDump_MbxReg0Reserved; //Mbx Reg 0 + uint16_t cd7_securityListBinDump_ControlFlags; //Mbx Reg 0 + uint16_t cd7_securityListBinDump_SeqID; //Mbx Reg 0 + uint8_t cd7_securityListBinDump_CommandClass; //Mbx Reg 0 0xD7 (SBE_PSU_GENERIC_MESSAGE) + uint8_t cd7_securityListBinDump_Command; //Mbx Reg 0 0x08 (SBE_PSU_SECURITY_LIST_BIN_DUMP) + uint64_t cd7_securityListBinDump_addr; //Mbx Reg 1 + uint64_t cd7_securityListBinDump_MbxReg2reserved; //Mbx Reg 2 + uint64_t cd7_securityListBinDump_MbxReg3reserved; //Mbx Reg 3 + } PACKED; + struct //stashKeyAddr { uint16_t cd7_stashKeyAddr_MbxReg0Reserved; //Mbx Reg 0 diff --git a/src/include/usr/sbeio/sbeioif.H b/src/include/usr/sbeio/sbeioif.H index 65fa474f1..33b0edac8 100644 --- a/src/include/usr/sbeio/sbeioif.H +++ b/src/include/usr/sbeio/sbeioif.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2013,2018 */ +/* Contributors Listed Below - COPYRIGHT 2013,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -347,7 +347,20 @@ namespace SBEIO uint64_t i_destAddr, bool & o_opSupported); - + /** + * @brief Sends a PSU chipOp to fetch security list binary dump in the SBE + * + * @param[in] i_addr Address that hostboot has prepared which the + * securityList Bin Dump addr sbe will write too + * + * @param[in] i_procChip Target with SBE to send read request to + * Assert if i_procChip == nullptr + * + * @return errlHndl_t Error log handle on failure. + * + */ + errlHndl_t sendPsuSecurityListBinDumpRequest(const uint64_t i_addr, + TARGETING::Target *i_procChip); } //end namespace SBEIO |