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authorMark Wenning <wenning@us.ibm.com>2012-04-02 17:27:57 -0500
committerA. Patrick Williams III <iawillia@us.ibm.com>2012-04-17 11:34:02 -0500
commitb97e806c5c044abd0cc12cbca41c8358c67eade1 (patch)
tree6f16776b8247eec8c6be8465e1ffd1daad65534b /src/include/usr/isteps/istep16list.H
parentb3c9d1540732ead1232098cf3c5c1ebcbc89e573 (diff)
downloadtalos-hostboot-b97e806c5c044abd0cc12cbca41c8358c67eade1.tar.gz
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Add IStep Stubs for all ISteps in IPL Flow Document
Add stubs for all remaining ISteps, based on HostBoot_IPL_Flow_v1.01.odt document. Task 39253 1 -5 Not applicable, performed by SBE 6 - Save SBE (HWAS) ALL, Brian is moving some of them from 4 7 - Start Clocks on Nest Chiplets ALL 8 - EDI, EI init ALL 9 - Activate PowerBus ALL 10 - Centaur Init already implemented 11 - DMI Training already implemented 12 - MC Init already Implemented 13 - Dram Training already Implemented 14 - Dram Initialization ALL 15 - Build Winkle Images ALL 16 - Core Activate ALL 17 - Init PSI marked FSP, not implemented 18 - Establish System SMP 18.8, 9, 10 only, the rest are marked FSP 19 - Build and Load Host Image marked FSP, not implemented 20 - Load Payload ALL 21 - Start Payload ALL RTC: 38196 Change-Id: I4e853f58caafe7dd472d57b42883724eaaa2e8a3 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/826 Tested-by: Jenkins Server Reviewed-by: Brian H. Horton <brianh@linux.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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diff --git a/src/include/usr/isteps/istep16list.H b/src/include/usr/isteps/istep16list.H
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+// IBM_PROLOG_BEGIN_TAG
+// This is an automatically generated prolog.
+//
+// $Source: src/include/usr/isteps/istep16list.H $
+//
+// IBM CONFIDENTIAL
+//
+// COPYRIGHT International Business Machines Corp. 2012
+//
+// p1
+//
+// Object Code Only (OCO) source materials
+// Licensed Internal Code Source Materials
+// IBM HostBoot Licensed Internal Code
+//
+// The source code for this program is not published or other-
+// wise divested of its trade secrets, irrespective of what has
+// been deposited with the U.S. Copyright Office.
+//
+// Origin: 30
+//
+// IBM_PROLOG_END
+
+#ifndef __ISTEPS_ISTEP16LIST_H
+#define __ISTEPS_ISTEP16LIST_H
+
+/**
+ * @file istep16list.H
+ *
+ * IStep 16 Core Activate
+ * IPL FLow Doc v1.01 (03/26/12)
+ *
+ * 16.1 host_activate_master
+ * : Activate master core
+ * 16.2 host_activate_slave_cores
+ * : Activate slave cores
+ * 16.3 host_ipl_complete
+ * : Notify FSP drawer ipl complete
+ *
+ * *****************************************************************
+ * THIS FILE WAS GENERATED ON 2012-04-11:1609
+ * *****************************************************************
+ *
+ * Please see the note in initsvcstructs.H for description of
+ * the ISTEPNAME macro.
+ *
+ */
+
+#include <initservice/initsvcstructs.H>
+#include <initservice/initsvcreasoncodes.H>
+
+// include prototypes file
+#include "../../../usr/hwpf/hwp/core_activate/core_activate.H"
+
+namespace INITSERVICE
+{
+ const TaskInfo g_istep16[] = {
+
+ {
+
+ "", // dummy, index 0
+ NULL,
+ {
+ NONE,
+ EXT_IMAGE,
+ }
+ },
+
+ {
+ ISTEPNAME(16,01,"host_activate_master"),
+ CORE_ACTIVATE::call_host_activate_master,
+ {
+ START_FN,
+ EXT_IMAGE,
+ }
+ },
+
+
+ {
+ ISTEPNAME(16,02,"host_activate_slave_cores"),
+ CORE_ACTIVATE::call_host_activate_slave_cores,
+ {
+ START_FN,
+ EXT_IMAGE,
+ }
+ },
+
+
+ {
+ ISTEPNAME(16,03,"host_ipl_complete"),
+ CORE_ACTIVATE::call_host_ipl_complete,
+ {
+ START_FN,
+ EXT_IMAGE,
+ }
+ },
+
+
+ // END OF LIST!
+};
+
+// make a struct from the above with the number of items included
+const ExtTaskInfo g_istep16TaskList = {
+ &(g_istep16[0]),
+ ( sizeof(g_istep16)/sizeof(TaskInfo) ),
+ NULL // later, depModules struct
+};
+
+}; // end namespace
+
+#endif
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