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| author | Doug Gilbert <dgilbert@us.ibm.com> | 2013-04-23 14:10:52 -0500 |
|---|---|---|
| committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2013-05-16 12:36:09 -0500 |
| commit | 8fac481d825883154ca20612ca0a69bc52f02618 (patch) | |
| tree | 4429e6f57e9b73a4750181cbe138d74c359c6cf1 /src/include/usr/intr | |
| parent | a151ccb70dab1007ca8aed2f0b89dfdf1cfe406b (diff) | |
| download | talos-hostboot-8fac481d825883154ca20612ca0a69bc52f02618.tar.gz talos-hostboot-8fac481d825883154ca20612ca0a69bc52f02618.zip | |
Inter-processor communications for multinode
RTC: 63128
Change-Id: Ica27c7f714bc8b874c9bccb663a32d3cfba37c5a
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/4193
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/include/usr/intr')
| -rw-r--r-- | src/include/usr/intr/interrupt.H | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/src/include/usr/intr/interrupt.H b/src/include/usr/intr/interrupt.H index 2ac07cc15..cf129712a 100644 --- a/src/include/usr/intr/interrupt.H +++ b/src/include/usr/intr/interrupt.H @@ -5,7 +5,7 @@ /* */ /* IBM CONFIDENTIAL */ /* */ -/* COPYRIGHT International Business Machines Corp. 2011,2012 */ +/* COPYRIGHT International Business Machines Corp. 2011,2013 */ /* */ /* p1 */ /* */ @@ -67,6 +67,7 @@ namespace INTR ISN_LCL_ERR = 4, ISN_HOST = 5, ISN_INTERPROC = 0xF0, //"special" as it isn't part of PSIHB + //Converts to INTERPROC_XISR when registered }; /** @@ -119,7 +120,9 @@ namespace INTR * * @note the interrupt type is currently the ISN value in the PSIHB * XIVR register - * @see i_intr_type for enumerations. + * @see ISNvalue_t for enumerations. + * The XISR value is calculated and registered for all chips + * presently capable of generaing interrupts. * * @note when an interrupt of type i_msg_type occurrs, the * interrupt presenter sends a sync message with type i_msg_type to |
