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| author | Patrick Williams <iawillia@us.ibm.com> | 2013-10-22 15:10:18 -0500 |
|---|---|---|
| committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2013-11-07 14:49:45 -0600 |
| commit | 2d6ab3cf820134bd3086139adea76f51bbdceb64 (patch) | |
| tree | 85111c6a6b313bfa5044e3e45ba9fb9df5890bc6 /src/include/usr/intr | |
| parent | 7c27703341d61f28b204254ad96c3fea5840bb73 (diff) | |
| download | talos-hostboot-2d6ab3cf820134bd3086139adea76f51bbdceb64.tar.gz talos-hostboot-2d6ab3cf820134bd3086139adea76f51bbdceb64.zip | |
Handle winkle-wakeup times in slave cores.
Change-Id: I6978d66ecfdef57da9754e6251d2ac1d3d078210
RTC: 73559
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/6851
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/include/usr/intr')
| -rw-r--r-- | src/include/usr/intr/interrupt.H | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/src/include/usr/intr/interrupt.H b/src/include/usr/intr/interrupt.H index 473fa7cd3..f8dd202ac 100644 --- a/src/include/usr/intr/interrupt.H +++ b/src/include/usr/intr/interrupt.H @@ -53,6 +53,11 @@ namespace INTR }; PIR_t(uint32_t i_word = 0) : word(i_word) {} + PIR_t(uint32_t i_nodeId, uint32_t i_chipId, + uint32_t i_coreId, uint32_t i_thread = 0) : + nodeId(i_nodeId), chipId(i_chipId), + coreId(i_coreId), threadId(i_thread) {} + PIR_t operator= (uint32_t i_word) { word = i_word; @@ -71,7 +76,7 @@ namespace INTR * @note The XISR is 24 bits: * XISR[ 0: 4] NOT DEFINED * XISR[ 5: 7] Node id - * XISR[ 8:10] chipId within Node + * XISR[ 8:10] chipId within Node * XISR[11:12] Unit selection [GX='00', PHB0='01', PHB1='10', PHB2='11'] * XISR[13:19] BUID * XISR[20:23] level @@ -139,6 +144,7 @@ namespace INTR MSG_INTR_SHUTDOWN, //!< Call to shutdown interrupt presenter MSG_INTR_ENABLE_PSI_INTR, //!< Enable PSI interrupts MSG_INTR_MPIPL_CLEANUP, //!< Clean up interrupts on MPIPL + MSG_INTR_ADD_CPU_TIMEOUT, //!< Check for a timeout waiting for a core. }; /** |
