start occ checkstop handling during IPL

Change-Id: I38e29f0044b982073fc7c24b71b5104515e74024
RTC: 115587
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/18883
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

1 files changed, 7 insertions, 2 deletions

diff --git a/src/include/usr/hwpf/hwp/occ/occ.H b/src/include/usr/hwpf/hwp/occ/occ.H
index 9bf494669..c4dba0996 100644
--- a/src/include/usr/hwpf/hwp/occ/occ.H
+++ b/src/include/usr/hwpf/hwp/occ/occ.H
@@ -35,17 +35,22 @@ namespace HBOCC {
      *
      * @param[out] o_failedOccTarget: Pointer to the target failing
      *                       loadnStartAllOccs
+     * @param[in] i_useSRAM: bool - use SRAM for OCC image, ie during IPL
+     *     true if during IPL, false if at end of IPL (default)
      * @return errlHndl_t  Error log if OCC load failed
      */
-    errlHndl_t loadnStartAllOccs(TARGETING::Target *& o_failedOccTarget);
+    errlHndl_t loadnStartAllOccs(TARGETING::Target *& o_failedOccTarget,
+                                 bool i_useSRAM = false);
 
     /**
      * @brief Starts OCCs on all Processors in the node
      *        This is intended to be used for Open Power.
      *
+     * @param[in] i_useSRAM: bool - use SRAM for OCC image, ie during IPL
+     *     true if during IPL, false if at end of IPL (default)
      * @return errlHndl_t  Error log if OCC load failed
      */
-    errlHndl_t activateOCCs();
+    errlHndl_t activateOCCs(bool i_useSRAM = false);
 
 } //end OCC namespace