Handle the PR keyword

Add support in the HWAS code to handle the PR keyword, to potentially
force processors to run with less cores than are available.

Move FRU_ID from fsp-only to common, so that the PR keyword code knows
which procs are to be grouped.

This work involves changes to HWAS Common code, as well as hostboot
and FSP platform-specific code.

Change-Id: I6d437a68c37f51edbd6d0d4741f2193892f80a6b
RTC: 35077
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/4221
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

1 files changed, 37 insertions, 1 deletions

diff --git a/src/include/usr/hwas/common/hwasCommon.H b/src/include/usr/hwas/common/hwasCommon.H
index ae0c52ac6..edf87f129 100644
--- a/src/include/usr/hwas/common/hwasCommon.H
+++ b/src/include/usr/hwas/common/hwasCommon.H
@@ -87,7 +87,7 @@ errlHndl_t platReadIDEC(const TARGETING::TargetHandle_t &i_target);
  *  target. The platform specific code is responsible for returning the
  *  vector. The caller is reponsible for allocating and de-allocating the space.
  *
- * @param[in]  i_target    target to check for chip ID/EC
+ * @param[in]  i_target    target to read the Partial Good keyword from
  * @param[out] o_pgData    pointer to area that will hold the partialGood vector
  *                          read from VPD; must be malloc'ed by the caller,
  *                          and must be VPD_CP00_PG_DATA_LENGTH in size.
@@ -136,6 +136,42 @@ const uint32_t VPD_CP00_PG_EX0_INDEX        = 16;
 const uint32_t VPD_CP00_PG_EX0_GOOD         = 0xF300;
 
 /**
+ * @brief platform specific code to determine the PR vector of the input
+ *  target. The platform specific code is responsible for returning the
+ *  vector. The caller is reponsible for allocating and de-allocating the space.
+ *
+ * @param[in]  i_target    target to read the PR keyword from
+ * @param[out] o_prData    pointer to area that will hold the PR keyword
+ *                          read from VPD; must be malloc'ed by the caller,
+ *                          and must be VPD_CP00_PR_DATA_LENGTH in size.
+ *
+ * @return errlHndl_t       valid errlHndl_t handle if there was an error
+ *                          NULL if no errors;
+ */
+errlHndl_t platReadPR(const TARGETING::TargetHandle_t &i_target,
+                                void *o_prData);
+
+// constants the platReadPR will use for looking at the VPD data
+const uint32_t VPD_VINI_PR_DATA_LENGTH      = 8;
+
+// Byte 2 Number of processors per module chip
+const uint32_t VPD_VINI_PR_B2_MASK          = 0xF0; // bits 0-3
+const uint32_t VPD_VINI_PR_B2_SHIFT         = 4;
+// Byte 7 Max VPD copies (aka replication factor)
+// Bits 2:7
+//   Number of chips using this VPD minus 1, i.e., Used to
+//   calculate the maximum number of duplicate copies of the B9
+//   keyword allowed. Multiply PR byte 2 (number of processor
+//   per module) times this value [(PR byte 7) + 1] to get the max
+//   number of copies of any given B9 keyword data in the SPIRA
+//   PACA structure.
+//   If the number of functional processors is different on chips
+//   within the same module. It will be firmwares responsibility
+//   average them out as specified in byte 2 above.
+const uint32_t VPD_VINI_PR_B7_MASK          = 0x3F; // bits 2-7
+
+
+/**
  * @brief platform specific code to get the address in PNOR to read
  *  and write GARD data
  *