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authorMatt Raybuck <mraybuc@us.ibm.com>2018-12-21 10:47:04 -0600
committerDaniel M. Crowell <dcrowell@us.ibm.com>2019-01-04 13:50:39 -0600
commit24f66ecb7882be36eba5ef13cbc414acb642c2af (patch)
treef0e2d9714a91c12f6204db3d77ae0c643730cd25 /src/include/usr/hwas
parentb014251663729bd8a6beaf4245f08ec3a04fbdd1 (diff)
downloadtalos-hostboot-24f66ecb7882be36eba5ef13cbc414acb642c2af.tar.gz
talos-hostboot-24f66ecb7882be36eba5ef13cbc414acb642c2af.zip
Better logging for Partial Good Issues (1.5/2)
Add necessary files for HWSV team to be able to make changes for (2/2) Change-Id: I1cc0c799d9fb743f9ab19dd0393015f16a3d4c01 RTC:180365 CMVC-Prereq:1074242 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70003 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/include/usr/hwas')
-rw-r--r--src/include/usr/hwas/common/hwasCommon.H158
-rw-r--r--src/include/usr/hwas/common/vpdConstants.H136
-rw-r--r--src/include/usr/hwas/hwasPlatError.H6
-rw-r--r--src/include/usr/hwas/hwasPlatReasonCodes.H (renamed from src/include/usr/hwas/hwasplatreasoncodes.H)15
4 files changed, 185 insertions, 130 deletions
diff --git a/src/include/usr/hwas/common/hwasCommon.H b/src/include/usr/hwas/common/hwasCommon.H
index 7a02b9595..0d168008e 100644
--- a/src/include/usr/hwas/common/hwasCommon.H
+++ b/src/include/usr/hwas/common/hwasCommon.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2012,2018 */
+/* Contributors Listed Below - COPYRIGHT 2012,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -32,7 +32,8 @@
#ifndef HWASCOMMON_H_
#define HWASCOMMON_H_
-#include<map>
+#include <map>
+#include <hwas/common/vpdConstants.H>
// 'system' headers
#include <stdint.h>
@@ -117,116 +118,6 @@ errlHndl_t platReadIDEC(const TARGETING::TargetHandle_t &i_target);
errlHndl_t platReadPartialGood(const TARGETING::TargetHandle_t &i_target,
void *o_pgData);
-// constants the platReadPartialGood will use for looking at the VPD data
-const uint32_t VPD_CP00_PG_DATA_LENGTH = 128;
-const uint32_t VPD_CP00_PG_HDR_LENGTH = 1;
-const uint32_t VPD_CP00_PG_DATA_ENTRIES = VPD_CP00_PG_DATA_LENGTH / 2;
-
-// components of the partial good vector
-// * = region does not exist in Nimbus
-// + = partial good region
-// '0' = region is good (NOTE: opposite of P8 where '1' represented good)
-// '1' = region is bad or does not exist
-
-const uint32_t VPD_CP00_PG_FSI_INDEX = 0;
-// all good - 4:FSI0, 5:FSI1, 6:FSIa
-const uint32_t VPD_CP00_PG_FSI_GOOD = 0xF1FF;
-
-const uint32_t VPD_CP00_PG_PERVASIVE_INDEX = 1;
-// all good - 3:VITAL, 4:PRV, 5:NET, 6:PIB, 7:OCC, 8:ANPERV, 14:PLLNEST
-const uint32_t VPD_CP00_PG_PERVASIVE_GOOD = 0xE07D;
-
-const uint32_t VPD_CP00_PG_N0_INDEX = 2;
-// all good - 3:VITAL, 4:PRV, 5:NX, 6:CXA0, 7:PBIOE0, 8:PBIOE1, 9:PBIOE2
-const uint32_t VPD_CP00_PG_N0_GOOD = 0xE03F;
-
-const uint32_t VPD_CP00_PG_N1_INDEX = 3;
-// all good - 3:VITAL, 4:PRV, 5:MCD, 6:VA, 7:PBIOO0+, 8:PBIOO1+, 9:MCS23+
-const uint32_t VPD_CP00_PG_N1_GOOD = 0xE03F;
-const uint32_t VPD_CP00_PG_N1_PG_MASK = 0x01C0;
-const uint32_t VPD_CP00_PG_N1_PBIOO0 = 0x0100;
-const uint32_t VPD_CP00_PG_N1_PBIOO1 = 0x0080;
-const uint32_t VPD_CP00_PG_N1_MCS23 = 0x0040;
-
-const uint32_t VPD_CP00_PG_N2_INDEX = 4;
-// all good - 3:VITAL, 4:PRV, 5:CXA1, 6:PCIS0, 7:PCIS1, 8:PCIS2, 9:IOPSI
-const uint32_t VPD_CP00_PG_N2_GOOD = 0xE03F;
-
-const uint32_t VPD_CP00_PG_N3_INDEX = 5;
-// all good - 3:VITAL, 4:PRV, 5:PB, 6:BR, 7:NPU+, 8:MM, 9:INT, 10:MCS01+
-const uint32_t VPD_CP00_PG_N3_GOOD = 0xE01F;
-const uint32_t VPD_CP00_PG_N3_PG_MASK = 0x0120;
-const uint32_t VPD_CP00_PG_N3_NPU = 0x0100;
-const uint32_t VPD_CP00_PG_N3_MCS01 = 0x0020;
-
-const uint32_t VPD_CP00_PG_XBUS_INDEX = 6;
-// all good - 3:VITAL, 4:PRV, 5:IOX0*, 6:IOX1, 7:IOX2, 8:IOPPE
-// 9:PBIOX0*+, 10:PBIOX1+, 11:PBIOX2+, 14:PLLIOX
-// Nimbus doesn't physically have PBIOX0 and IOX0. IOX0 is
-// taken care of by xbus links, need to handle PBIOX0 as part of
-// the full chiplet good, so full good is E40D instead of E44D
-// Currently, there are two versions of the MVPD PG keyword:
-// 0xE44D == XBUS0 bad
-// 0xE45D and 0xE55D == XBUS 0,2 bad
-// Spec indicates that both iox (second nibble) and pbiox
-// (third nibble) are bad for sforza and monza type modules.
-// We support generically the following cases:
-// 0xE50D --> xbus chiplet good
-// 0xE40D --> xbus chiplet good
-// and rely solely on the pbiox as the Xbus target indicator
-// (0x0040, 0x0020, 0x0010) for all types of chips.
-const uint32_t VPD_CP00_PG_XBUS_GOOD_NIMBUS = 0xE40D;
-const uint32_t VPD_CP00_PG_XBUS_GOOD_CUMULUS= 0xE00D;
-const uint32_t VPD_CP00_PG_XBUS_PG_MASK = 0x00170;
-const uint32_t VPD_CP00_PG_XBUS_IOX[3] = {0x0040, 0x0020, 0x0010};
-
-const uint32_t VPD_CP00_PG_MC01_INDEX = 7;
-const uint32_t VPD_CP00_PG_MC23_INDEX = 8;
-const uint32_t VPD_CP00_PG_MCxx_INDEX[4] = {VPD_CP00_PG_MC01_INDEX,
- VPD_CP00_PG_MC01_INDEX,
- VPD_CP00_PG_MC23_INDEX,
- VPD_CP00_PG_MC23_INDEX}; // by MCS
-// Nimbus:
-// all good - 3:VITAL, 4:PRV, 5:MC01, 6:IOM01+, 7:IOM23+, 14:PLLMEM
-// all good - 3:VITAL, 4:PRV, 5:MC23, 6:IOM45+, 7:IOM67+, 14:PLLMEM
-// Cumulus:
-// all good - 3:VITAL, 4:PRV, 5:MC01, 6:IOM01, 7:IOM01PPE, 14:PLLMEM
-// all good - 3:VITAL, 4:PRV, 5:MC23, 6:IOM23, 7:IOM23PPE, 14:PLLMEM
-const uint32_t VPD_CP00_PG_MCxx_GOOD = 0xE0FD;
-const uint32_t VPD_CP00_PG_MCxx_PG_MASK = 0x0300; // Nimbus only
-// iom0 and iom4 need to be good for zqcal to work on any
-// of the MCAs on that side
-const uint32_t VPD_CP00_PG_MCA_MAGIC_PORT_MASK = 0x0200;
-const uint32_t VPD_CP00_PG_MCxx_IOMyy[4] = {0x0200, 0x0100, 0x0200, 0x0100};
-
-const uint32_t VPD_CP00_PG_OB0_INDEX = 9;
-const uint32_t VPD_CP00_PG_OB3_INDEX = 12;
-// all good - 3:VITAL, 4:PRV, 5:PLIOOAx, 6:IOOx, 14:PLLIOO; x=0, 1*, 2*, 3
-const uint32_t VPD_CP00_PG_OBUS_GOOD = 0xE1FD;
-
-const uint32_t VPD_CP00_PG_PCI0_INDEX = 13;
-// all good - 3:VITAL, 4:PRV, 5:PCI00, 6:IOPCI0, 14:PLLPCI0
-// all good - 3:VITAL, 4:PRV, 5:PCI11, 6:PCI12, 7:IOPCI1, 14:PLLPCI1
-// all good - 3:VITAL, 4:PRV, 5:PCI23, 6:PCI24, 7:PCI25, 8:IOPCI2, 14:PLLPCI2
-const uint32_t VPD_CP00_PG_PCIx_GOOD[3] = {0xE1FD, 0xE0FD, 0xE07D};
-
-const uint32_t VPD_CP00_PG_EP0_INDEX = 16;
-const uint32_t VPD_CP00_PG_EP5_INDEX = 21;
-// all good - 3:VITAL, 4:PRV, 5:EQPB, 6:L30+, 7:L31+,
-// 8:L20+, 9:L21+, 10:AN, 11:PBLEQ, 12:REFR0, 13:REFR1, 14:DPLL
-const uint32_t VPD_CP00_PG_EPx_GOOD = 0xE001;
-const uint32_t VPD_CP00_PG_EPx_PG_MASK = 0x03CC;
-const uint32_t VPD_CP00_PG_EPx_L3L2REFR[2] = {0x0288, 0x0144};
-
-const uint32_t VPD_CP00_PG_EC00_INDEX = 32;
-// all good - 3:VITAL, 4:PRV, 5:C00, 6:C01
-const uint32_t VPD_CP00_PG_ECxx_GOOD = 0xE1FF;
-const uint32_t VPD_CP00_PG_ECxx_MAX_ENTRIES = 24;
-
-const uint32_t VPD_CP00_PG_MAX_USED_INDEX = 55;
-const uint32_t VPD_CP00_PG_xxx_VITAL = 0x1000;
-const uint32_t VPD_CP00_PG_xxx_PERV = 0x0800;
-const uint32_t VPD_CP00_PG_RESERVED_GOOD = 0xFFFF;
/**
@@ -296,10 +187,6 @@ bool isDescFunctional(const TARGETING::TargetHandle_t &i_desc,
errlHndl_t platReadPR(const TARGETING::TargetHandle_t &i_target,
void *o_prData);
-// constants the platReadPR will use for looking at the VPD data
-const uint32_t VPD_VINI_PR_DATA_LENGTH = 8; //@deprecrated
-
-
/**
* @brief platform specific code to determine the Lx vector of the input
* target. The platform specific code is responsible for returning the
@@ -317,16 +204,6 @@ const uint32_t VPD_VINI_PR_DATA_LENGTH = 8; //@deprecrated
errlHndl_t platReadLx(const TARGETING::TargetHandle_t &i_mca,
void *o_lxData);
-// constants the platReadLx will use for looking at the VPD data
-const uint32_t VPD_CRP0_LX_HDR_DATA_LENGTH = 256;
-
-const uint32_t VPD_CRP0_LX_FREQ_INDEP_INDEX = 8;
-const uint32_t VPD_CRP0_LX_PORT_DISABLED = 0;
-
-const uint8_t VPD_CRP0_LX_MIN_X = 1;
-const uint8_t VPD_CRP0_LX_MAX_X = 8;
-
-
/**
* @brief platform specific code to read the Field Core Override
*
@@ -392,6 +269,35 @@ void platHwasErrorAddHWCallout(errlHndl_t & io_errl,
void hwasErrorUpdatePlid(errlHndl_t & io_errl,
uint32_t & io_plid);
+
+/**
+ * @brief wrapper function to add a partial good user detail section to an error
+ * log in a platform-specific manner.
+ *
+ * @param[io] io_errl A reference to the error log handle.
+ * @param[i] i_modelPgData A reference to the model-specific xbus and
+ * obus entries for pg vector; must be
+ * MODEL_PG_DATA_ENTRIES in size.
+ * @param[i] i_pgData Reference to area holding the PG keyword read
+ * from VPD; must be VPD_CP00_PG_DATA_ENTRIES in
+ * size.
+ */
+void hwasErrorAddPartialGoodFFDC(errlHndl_t & io_errl,
+ const uint16_t (&i_modelPgData)[MODEL_PG_DATA_ENTRIES],
+ const uint16_t (&i_pgData)[VPD_CP00_PG_DATA_ENTRIES]);
+
+
+/**
+ * @brief wrapper function to add target info to an error log in a
+ * platform-specific way.
+ *
+ * @param[io] io_errl A reference to the error log handle.
+ * @param[i] i_target A constant pointer to the target to be added
+ * to the error log.
+ */
+void hwasErrorAddTargetInfo(errlHndl_t & io_errl,
+ const TARGETING::ConstTargetHandle_t i_target);
+
/**
* @brief Platform-specific checks for minimum hardware.
* Verifies that the system has enough hardware to proceed through
diff --git a/src/include/usr/hwas/common/vpdConstants.H b/src/include/usr/hwas/common/vpdConstants.H
index ee661a265..a82eb3fb3 100644
--- a/src/include/usr/hwas/common/vpdConstants.H
+++ b/src/include/usr/hwas/common/vpdConstants.H
@@ -22,3 +22,139 @@
/* permissions and limitations under the License. */
/* */
/* IBM_PROLOG_END_TAG */
+
+#ifndef VPD_CONSTANTS_H
+#define VPD_CONSTANTS_H
+
+namespace HWAS
+{
+
+// constants the platReadPartialGood will use for looking at the VPD data
+const uint32_t VPD_CP00_PG_DATA_LENGTH = 128;
+const uint32_t VPD_CP00_PG_HDR_LENGTH = 1;
+const uint32_t VPD_CP00_PG_DATA_ENTRIES = VPD_CP00_PG_DATA_LENGTH / 2;
+
+// components of the partial good vector
+// * = region does not exist in Nimbus
+// + = partial good region
+// '0' = region is good (NOTE: opposite of P8 where '1' represented good)
+// '1' = region is bad or does not exist
+
+const uint32_t VPD_CP00_PG_FSI_INDEX = 0;
+// all good - 4:FSI0, 5:FSI1, 6:FSIa
+const uint32_t VPD_CP00_PG_FSI_GOOD = 0xF1FF;
+
+const uint32_t VPD_CP00_PG_PERVASIVE_INDEX = 1;
+// all good - 3:VITAL, 4:PRV, 5:NET, 6:PIB, 7:OCC, 8:ANPERV, 14:PLLNEST
+const uint32_t VPD_CP00_PG_PERVASIVE_GOOD = 0xE07D;
+
+const uint32_t VPD_CP00_PG_N0_INDEX = 2;
+// all good - 3:VITAL, 4:PRV, 5:NX, 6:CXA0, 7:PBIOE0, 8:PBIOE1, 9:PBIOE2
+const uint32_t VPD_CP00_PG_N0_GOOD = 0xE03F;
+
+const uint32_t VPD_CP00_PG_N1_INDEX = 3;
+// all good - 3:VITAL, 4:PRV, 5:MCD, 6:VA, 7:PBIOO0+, 8:PBIOO1+, 9:MCS23+
+const uint32_t VPD_CP00_PG_N1_GOOD = 0xE03F;
+const uint32_t VPD_CP00_PG_N1_PG_MASK = 0x01C0;
+const uint32_t VPD_CP00_PG_N1_PBIOO0 = 0x0100;
+const uint32_t VPD_CP00_PG_N1_PBIOO1 = 0x0080;
+const uint32_t VPD_CP00_PG_N1_MCS23 = 0x0040;
+
+const uint32_t VPD_CP00_PG_N2_INDEX = 4;
+// all good - 3:VITAL, 4:PRV, 5:CXA1, 6:PCIS0, 7:PCIS1, 8:PCIS2, 9:IOPSI
+const uint32_t VPD_CP00_PG_N2_GOOD = 0xE03F;
+
+const uint32_t VPD_CP00_PG_N3_INDEX = 5;
+// all good - 3:VITAL, 4:PRV, 5:PB, 6:BR, 7:NPU+, 8:MM, 9:INT, 10:MCS01+
+const uint32_t VPD_CP00_PG_N3_GOOD = 0xE01F;
+const uint32_t VPD_CP00_PG_N3_PG_MASK = 0x0120;
+const uint32_t VPD_CP00_PG_N3_NPU = 0x0100;
+const uint32_t VPD_CP00_PG_N3_MCS01 = 0x0020;
+
+const uint32_t VPD_CP00_PG_XBUS_INDEX = 6;
+// all good - 3:VITAL, 4:PRV, 5:IOX0*, 6:IOX1, 7:IOX2, 8:IOPPE
+// 9:PBIOX0*+, 10:PBIOX1+, 11:PBIOX2+, 14:PLLIOX
+// Nimbus doesn't physically have PBIOX0 and IOX0. IOX0 is
+// taken care of by xbus links, need to handle PBIOX0 as part of
+// the full chiplet good, so full good is E40D instead of E44D
+// Currently, there are two versions of the MVPD PG keyword:
+// 0xE44D == XBUS0 bad
+// 0xE45D and 0xE55D == XBUS 0,2 bad
+// Spec indicates that both iox (second nibble) and pbiox
+// (third nibble) are bad for sforza and monza type modules.
+// We support generically the following cases:
+// 0xE50D --> xbus chiplet good
+// 0xE40D --> xbus chiplet good
+// and rely solely on the pbiox as the Xbus target indicator
+// (0x0040, 0x0020, 0x0010) for all types of chips.
+const uint32_t VPD_CP00_PG_XBUS_GOOD_NIMBUS = 0xE40D;
+const uint32_t VPD_CP00_PG_XBUS_GOOD_CUMULUS= 0xE00D;
+const uint32_t VPD_CP00_PG_XBUS_PG_MASK = 0x00170;
+const uint32_t VPD_CP00_PG_XBUS_IOX[3] = {0x0040, 0x0020, 0x0010};
+
+const uint32_t VPD_CP00_PG_MC01_INDEX = 7;
+const uint32_t VPD_CP00_PG_MC23_INDEX = 8;
+const uint32_t VPD_CP00_PG_MCxx_INDEX[4] = {VPD_CP00_PG_MC01_INDEX,
+ VPD_CP00_PG_MC01_INDEX,
+ VPD_CP00_PG_MC23_INDEX,
+ VPD_CP00_PG_MC23_INDEX}; // by MCS
+// Nimbus:
+// all good - 3:VITAL, 4:PRV, 5:MC01, 6:IOM01+, 7:IOM23+, 14:PLLMEM
+// all good - 3:VITAL, 4:PRV, 5:MC23, 6:IOM45+, 7:IOM67+, 14:PLLMEM
+// Cumulus:
+// all good - 3:VITAL, 4:PRV, 5:MC01, 6:IOM01, 7:IOM01PPE, 14:PLLMEM
+// all good - 3:VITAL, 4:PRV, 5:MC23, 6:IOM23, 7:IOM23PPE, 14:PLLMEM
+const uint32_t VPD_CP00_PG_MCxx_GOOD = 0xE0FD;
+const uint32_t VPD_CP00_PG_MCxx_PG_MASK = 0x0300; // Nimbus only
+// iom0 and iom4 need to be good for zqcal to work on any
+// of the MCAs on that side
+const uint32_t VPD_CP00_PG_MCA_MAGIC_PORT_MASK = 0x0200;
+const uint32_t VPD_CP00_PG_MCxx_IOMyy[4] = {0x0200, 0x0100, 0x0200, 0x0100};
+
+const uint32_t VPD_CP00_PG_OB0_INDEX = 9;
+const uint32_t VPD_CP00_PG_OB3_INDEX = 12;
+// all good - 3:VITAL, 4:PRV, 5:PLIOOAx, 6:IOOx, 14:PLLIOO; x=0, 1*, 2*, 3
+const uint32_t VPD_CP00_PG_OBUS_GOOD = 0xE1FD;
+
+const uint32_t VPD_CP00_PG_PCI0_INDEX = 13;
+// all good - 3:VITAL, 4:PRV, 5:PCI00, 6:IOPCI0, 14:PLLPCI0
+// all good - 3:VITAL, 4:PRV, 5:PCI11, 6:PCI12, 7:IOPCI1, 14:PLLPCI1
+// all good - 3:VITAL, 4:PRV, 5:PCI23, 6:PCI24, 7:PCI25, 8:IOPCI2, 14:PLLPCI2
+const uint32_t VPD_CP00_PG_PCIx_GOOD[3] = {0xE1FD, 0xE0FD, 0xE07D};
+
+const uint32_t VPD_CP00_PG_EP0_INDEX = 16;
+const uint32_t VPD_CP00_PG_EP5_INDEX = 21;
+// all good - 3:VITAL, 4:PRV, 5:EQPB, 6:L30+, 7:L31+,
+// 8:L20+, 9:L21+, 10:AN, 11:PBLEQ, 12:REFR0, 13:REFR1, 14:DPLL
+const uint32_t VPD_CP00_PG_EPx_GOOD = 0xE001;
+const uint32_t VPD_CP00_PG_EPx_PG_MASK = 0x03CC;
+const uint32_t VPD_CP00_PG_EPx_L3L2REFR[2] = {0x0288, 0x0144};
+
+const uint32_t VPD_CP00_PG_EC00_INDEX = 32;
+// all good - 3:VITAL, 4:PRV, 5:C00, 6:C01
+const uint32_t VPD_CP00_PG_ECxx_GOOD = 0xE1FF;
+const uint32_t VPD_CP00_PG_ECxx_MAX_ENTRIES = 24;
+
+const uint32_t VPD_CP00_PG_MAX_USED_INDEX = 55;
+const uint32_t VPD_CP00_PG_xxx_VITAL = 0x1000;
+const uint32_t VPD_CP00_PG_xxx_PERV = 0x0800;
+const uint32_t VPD_CP00_PG_RESERVED_GOOD = 0xFFFF;
+
+// constants the platReadPR will use for looking at the VPD data
+const uint32_t VPD_VINI_PR_DATA_LENGTH = 8; //@deprecrated
+
+// constants the platReadLx will use for looking at the VPD data
+const uint32_t VPD_CRP0_LX_HDR_DATA_LENGTH = 256;
+
+const uint32_t VPD_CRP0_LX_FREQ_INDEP_INDEX = 8;
+const uint32_t VPD_CRP0_LX_PORT_DISABLED = 0;
+
+const uint8_t VPD_CRP0_LX_MIN_X = 1;
+const uint8_t VPD_CRP0_LX_MAX_X = 8;
+
+// constants for the error log parser for partial good issues
+const uint8_t MODEL_PG_DATA_ENTRIES = 2;
+
+}
+
+#endif
diff --git a/src/include/usr/hwas/hwasPlatError.H b/src/include/usr/hwas/hwasPlatError.H
index 64442d1ef..27f86b0e6 100644
--- a/src/include/usr/hwas/hwasPlatError.H
+++ b/src/include/usr/hwas/hwasPlatError.H
@@ -5,7 +5,9 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* COPYRIGHT International Business Machines Corp. 2012,2014 */
+/* Contributors Listed Below - COPYRIGHT 2012,2019 */
+/* [+] International Business Machines Corp. */
+/* */
/* */
/* Licensed under the Apache License, Version 2.0 (the "License"); */
/* you may not use this file except in compliance with the License. */
@@ -40,7 +42,7 @@
#include <hbotcompid.H>
#include <errl/errlentry.H>
-#include <hwas/hwasplatreasoncodes.H>
+#include <hwas/hwasPlatReasonCodes.H>
namespace HWAS
{
diff --git a/src/include/usr/hwas/hwasplatreasoncodes.H b/src/include/usr/hwas/hwasPlatReasonCodes.H
index cbc28e81c..b02de6789 100644
--- a/src/include/usr/hwas/hwasplatreasoncodes.H
+++ b/src/include/usr/hwas/hwasPlatReasonCodes.H
@@ -1,11 +1,11 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: src/include/usr/hwas/hwasplatreasoncodes.H $ */
+/* $Source: src/include/usr/hwas/hwasPlatReasonCodes.H $ */
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2014,2018 */
+/* Contributors Listed Below - COPYRIGHT 2014,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -52,6 +52,17 @@ namespace HWAS
RC_BAD_MCA = HWAS_COMP_ID | 0x85,
RC_RT_NULL_FIRMWARE_REQUEST_PTR = HWAS_COMP_ID | 0x86,
RC_RT_NULL_FIRMWARE_MSG_PTR = HWAS_COMP_ID | 0x87,
+ RC_PARTIAL_GOOD_INFORMATION = HWAS_COMP_ID | 0x88,
+ };
+
+ enum HwasPlatUserDetailsTypes
+ {
+ HWAS_UDT_PARTIAL_GOOD_DATA = 0x01,
+ };
+
+ enum HwasPlatUserDetailsVersions
+ {
+ HWAS_UDT_VERSION_1 = 0x01,
};
};
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