Pull FSI data from real attributes (Task 3909).

There are a group of attributes defined for FSI now.
-ATTR_FSI_MASTER_CHIP
-ATTR_FSI_MASTER_TYPE
-ATTR_FSI_MASTER_PORT
-ATTR_FSI_SLAVE_CASCADE
-ATTR_FSI_OPTION_FLAGS

Also includes work for Story 3996.  The attributes are now broken
into 3 distinct pieces:
- attribute_types.xml : defines hostboot attributes
- target_types.xml : defines different types of targets
- XXX.system.xml : system-specific information, equivalent to what
                   we'll get from system workbook

These are then used to generic system-specific binaries, currently
for 3 platforms:
- simics_SALERNO_targeting.bin
- simics_VENICE_targeting.bin
- vbu_targeting.bin

Change-Id: I2bf920cc62cceb761ab44a07df433da44249d0e0
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/426
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

2 files changed, 24 insertions, 30 deletions

diff --git a/src/include/usr/fsi/fsi_reasoncodes.H b/src/include/usr/fsi/fsi_reasoncodes.H
index 24442062e..80539c691 100644
--- a/src/include/usr/fsi/fsi_reasoncodes.H
+++ b/src/include/usr/fsi/fsi_reasoncodes.H
@@ -34,10 +34,9 @@ namespace FSI
         MOD_FSIDD_READ                = 0x02, /**< fsidd.C : FsiDD::read */
         MOD_FSIDD_VERIFYADDRESSRANGE  = 0x03, /**< fsidd.C : FsiDD::verifyAddressRange */
         MOD_FSIDD_HANDLEOPBERRORS     = 0x04, /**< fsidd.C : FsiDD::handleOpbErrors */
-        MOD_FSIDD_DDREAD              = 0x05, /**< fsidd.C : ddRead */
-        MOD_FSIDD_DDWRITE             = 0x06, /**< fsidd.C : ddWrite */
+        MOD_FSIDD_DDOP                = 0x05, /**< fsidd.C : ddOp */
+        MOD_FSIDD_POLLFORCOMPLETE     = 0x06, /**< fsidd.C : FsiDD::pollForComplete */
         MOD_FSIDD_INITPORT            = 0x07, /**< fsidd.C : FsiDD::initPort */
-        MOD_FSIDD_POLLFORCOMPLETE     = 0x08, /**< fsidd.C : FsiDD::pollForComplete */
     };
 
     enum FSIReasonCode
@@ -49,6 +48,9 @@ namespace FSI
         RC_INVALID_TARGET            = FSI_COMP_ID | 0x05,
         RC_OPB_NO_READ_VALID         = FSI_COMP_ID | 0x06,
         RC_ERROR_ENABLING_SLAVE      = FSI_COMP_ID | 0x07,
+        RC_INVALID_OPERATION         = FSI_COMP_ID | 0x08, 
+        RC_NULL_TARGET               = FSI_COMP_ID | 0x09,
+        RC_MASTER_TARGET             = FSI_COMP_ID | 0x0A,
     };
 };
 
diff --git a/src/include/usr/fsi/fsiif.H b/src/include/usr/fsi/fsiif.H
index 3c366fd9d..183267249 100644
--- a/src/include/usr/fsi/fsiif.H
+++ b/src/include/usr/fsi/fsiif.H
@@ -32,41 +32,33 @@ namespace FSI
 {
 
 /**
- * Master or Cascaded Master
+ * @brief Initialize the FSI hardware
+ *
+ * @return errlHndl_t  NULL on success
  */
-enum MasterType {
-    MFSI_TYPE  = 0,
-    CMFSI_TYPE = 1,
-    NO_MASTER  = 2
-};
+errlHndl_t initializeHardware();
 
 
-//@todo - move this into attributes
 /**
- * @brief Structure which defines info necessary to access a chip via FSI
- *
- * Structure which defines info necessary for FSI access.  Only applicable
- * for chip targets.  Structure is read-only.  Each chip will have 2 copies
- * of this data, depending on which chip we boot from.
+ * FSI Slave Registers for P8
+ *   These registers are repeated for every master+port+cascade combo 
  */
-struct FsiChipInfo_t
+enum SlaveRegistersP8
 {
-    TARGETING::Target* master; ///< FSI Master  @fixme - convert to EntityPath
-    MasterType type; ///< Master or Cascaded Master
-    uint8_t port; ///< Which port is this chip hanging off of  
-    uint8_t cascade; ///< Slave cascade position
-    uint64_t attributes; ///< Reserved for any special flags we might need
+    // Local FSI Space
+    SLAVE_CFG_TABLE  = 0x000000, /**< Configuration Table of CFAM */
+    SLAVE_PEEK_TABLE = 0x000400, /**< Peek Table */
+
+    SLAVE_REGS       = 0x000800, /**< FSI Slave Register */
+    SLAVE_MODE_00    = SLAVE_REGS|0x00,
+
+    FSI_SHIFT_ENGINE = 0x000C00, /**< FSI Shift Engine (SCAN) */
+    FSI2PIB_ENGINE   = 0x001000, /**< FSI2PIB Engine (SCOM) */
+    FSI_SCRATCHPAD   = 0x001400, /**< FSI Scratchpad */
+    FSI_I2C_MASTER   = 0x001800, /**< FSI I2C-Master */
+    FSI_GEMINI_MBOX  = 0x002800, /**< FSI Gemini Mailbox with FSI GPx Registers */
 };
 
-/**
- * @brief Initialize the FSI hardware
- *
- * @param[out] o_numPorts  Number of FSI ports that were
- *    successfully initialized
- *
- * @return errlHndl_t  NULL on success
- */
-errlHndl_t initializeHardware( uint64_t& o_numPorts );
 
 
 }