Adding support for remote FSI accesses

RTC Story 3792
- Added 7 more Venice targets and 7 more Centaur targets to the
     simics_VENICE.system.xml to match the latest simics config
     Note: remove Centaurs are currently disabled due to SW107421
- Modified testcases to be more tolerant of system config differences
- Changes to initialization flow to be more tolerant of missing
     chips
- Expanded the size of the HB_DATA section of PNOR to hold the
     additional targets (up to 128KB space now, actual is 36KB)

Change-Id: Ic92708ccb147fb18bf992ef3ac318a287d32fafe
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/445
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

1 files changed, 22 insertions, 0 deletions

diff --git a/src/include/usr/fsi/fsiif.H b/src/include/usr/fsi/fsiif.H
index 183267249..4fdfaed93 100644
--- a/src/include/usr/fsi/fsiif.H
+++ b/src/include/usr/fsi/fsiif.H
@@ -40,6 +40,28 @@ errlHndl_t initializeHardware();
 
 
 /**
+ * @brief Retrieves the status of a given port
+ *
+ * @param[in] i_fsiMaster  FSI Master chip
+ * @param[in] i_type  FSI Master Type (MFSI or cMFSI)
+ * @param[in] i_port  Slave port number
+ * 
+ * @return bool  true if port sensed as active during FSI initialization
+ */
+bool isSlavePresent( const TARGETING::Target* i_fsiMaster,
+                     TARGETING::FSI_MASTER_TYPE i_type,
+                     uint8_t i_port );
+
+/**
+ * @brief Retrieves the FSI status of a given chip
+ *
+ * @param[in] i_target
+ * 
+ * @return bool  true if port sensed as active during FSI initialization
+ */
+bool isSlavePresent( const TARGETING::Target* i_target );
+
+/**
  * FSI Slave Registers for P8
  *   These registers are repeated for every master+port+cascade combo 
  */