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author | Christian Geddes <crgeddes@us.ibm.com> | 2018-08-01 16:04:35 -0500 |
---|---|---|
committer | William G. Hoffa <wghoffa@us.ibm.com> | 2018-08-08 16:05:56 -0500 |
commit | f8e8d7c203dcd6ff31459253ba42a3dbe970765e (patch) | |
tree | e33dfe5fa1e6c562930d31f53652e89b9c3553d8 /src/include/usr/fapi2 | |
parent | 3cb9eb102386c50d0e7b7b67f64b702097b7eb16 (diff) | |
download | talos-hostboot-f8e8d7c203dcd6ff31459253ba42a3dbe970765e.tar.gz talos-hostboot-f8e8d7c203dcd6ff31459253ba42a3dbe970765e.zip |
Base targeting support for Axone memory complex
Added 3 new target types to start things off. These are the OMI
(open-capi memory interface), the OMIC (open-capi memory interface
controller), and the MCC (memory channel controller). These new
targets will help us represent the new memory complex we are using
for axone. The axone memory hiearchy will look like this:
MI--MCC
/ \
Proc--MC < __ OMI--OCMB--MEMPORT--DIMM
\ /
OMIC
**Note that OCMB/MEMPORT have not been implemented in hostboot yet
Change-Id: I3df4eb3e279f825f0bdee86448ea23cb975e5511
RTC:172969
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/63744
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: ILYA SMIRNOV <ismirno@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Prachi Gupta <pragupta@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Diffstat (limited to 'src/include/usr/fapi2')
-rw-r--r-- | src/include/usr/fapi2/target.H | 98 |
1 files changed, 95 insertions, 3 deletions
diff --git a/src/include/usr/fapi2/target.H b/src/include/usr/fapi2/target.H index a77182281..5cfa0bd31 100644 --- a/src/include/usr/fapi2/target.H +++ b/src/include/usr/fapi2/target.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2017 */ +/* Contributors Listed Below - COPYRIGHT 2015,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -238,6 +238,15 @@ inline TARGETING::TYPE convertFapi2TypeToTargeting(fapi2::TargetType i_T) case fapi2::TARGET_TYPE_MC: o_targetingType = TARGETING::TYPE_MC; break; + case fapi2::TARGET_TYPE_OMI: + o_targetingType = TARGETING::TYPE_OMI; + break; + case fapi2::TARGET_TYPE_OMIC: + o_targetingType = TARGETING::TYPE_OMIC; + break; + case fapi2::TARGET_TYPE_MCC: + o_targetingType = TARGETING::TYPE_MCC; + break; default: FAPI_ERR("convertFapi2TypeToTargeting:: Chiplet type not supported 0x%.8X!", i_T); assert(false); @@ -338,6 +347,15 @@ inline fapi2::TargetType convertTargetingTypeToFapi2(TARGETING::TYPE i_T) case TARGETING::TYPE_MC: o_targetingType = fapi2::TARGET_TYPE_MC; break; + case TARGETING::TYPE_OMI: + o_targetingType = fapi2::TARGET_TYPE_OMI; + break; + case TARGETING::TYPE_OMIC: + o_targetingType = fapi2::TARGET_TYPE_OMIC; + break; + case TARGETING::TYPE_MCC: + o_targetingType = fapi2::TARGET_TYPE_MCC; + break; default: o_targetingType = fapi2::TARGET_TYPE_NONE; break; @@ -372,6 +390,9 @@ inline Target<K_PARENT, V> Target<T_SELF, V>::getParent(void) const fapi2::TARGET_TYPE_MCBIST | fapi2::TARGET_TYPE_MC | fapi2::TARGET_TYPE_MI | + fapi2::TARGET_TYPE_OMI | + fapi2::TARGET_TYPE_MCC | + fapi2::TARGET_TYPE_OMIC | fapi2::TARGET_TYPE_CAPP | fapi2::TARGET_TYPE_DMI | fapi2::TARGET_TYPE_OBUS | @@ -399,7 +420,10 @@ inline Target<K_PARENT, V> Target<T_SELF, V>::getParent(void) const fapi2::TARGET_TYPE_MC | fapi2::TARGET_TYPE_DMI | fapi2::TARGET_TYPE_PEC | - fapi2::TARGET_TYPE_PHB; + fapi2::TARGET_TYPE_PHB | + fapi2::TARGET_TYPE_OMI | + fapi2::TARGET_TYPE_OMIC | + fapi2::TARGET_TYPE_MCC; static_assert( !((K_PARENT == fapi2::TARGET_TYPE_PERV) && ((T_SELF & TARGET_TYPE_PERV_CHIPLETS) == fapi2::TARGET_TYPE_NONE)), @@ -517,6 +541,44 @@ inline Target<K_PARENT, V> Target<T_SELF, V>::getParent(void) const (K_PARENT != fapi2::TARGET_TYPE_PROC_CHIP)), "improper parent of fapi2::TARGET_TYPE_MI"); + // valid parents for MCC + // MCC -> PERV + // MCC -> MI + // MCC -> MC + // MCC -> PROC + static_assert(!((T_SELF == fapi2::TARGET_TYPE_MCC) && + (K_PARENT != fapi2::TARGET_TYPE_PERV) && + (K_PARENT != fapi2::TARGET_TYPE_MI) && + (K_PARENT != fapi2::TARGET_TYPE_MC) && + (K_PARENT != fapi2::TARGET_TYPE_PROC_CHIP)), + "improper parent of fapi2::TARGET_TYPE_MI"); + + // valid parents for OMI + // OMI -> PERV + // OMI -> MCC + // OMI -> MI + // OMI -> MC + // OMI -> OMIC + // OMI -> PROC + static_assert(!((T_SELF == fapi2::TARGET_TYPE_OMI) && + (K_PARENT != fapi2::TARGET_TYPE_PERV) && + (K_PARENT != fapi2::TARGET_TYPE_MCC) && + (K_PARENT != fapi2::TARGET_TYPE_MI) && + (K_PARENT != fapi2::TARGET_TYPE_MC) && + (K_PARENT != fapi2::TARGET_TYPE_OMIC) && + (K_PARENT != fapi2::TARGET_TYPE_PROC_CHIP)), + "improper parent of fapi2::TARGET_TYPE_MI"); + + // valid parents for OMIC + // OMIC -> PERV + // OMIC -> MC + // OMIC -> PROC + static_assert(!((T_SELF == fapi2::TARGET_TYPE_OMIC) && + (K_PARENT != fapi2::TARGET_TYPE_PERV) && + (K_PARENT != fapi2::TARGET_TYPE_MC) && + (K_PARENT != fapi2::TARGET_TYPE_PROC_CHIP)), + "improper parent of fapi2::TARGET_TYPE_OMIC"); + // valid parents for DMI // DMI -> MI // DMI -> MC @@ -674,7 +736,7 @@ inline std::vector<Target<K_CHILD, V> > // PERV -> XBUS // PERV -> OBUS // PERV -> CAPP - // PERV -> NV + // PERV -> OBUS_BRICK // PERV -> MCBIST // PERV -> MCS // PERV -> MCA @@ -682,6 +744,9 @@ inline std::vector<Target<K_CHILD, V> > // PERV -> PHB // PERV -> MC // PERV -> MI + // PERV -> MCC + // PERV -> OMIC + // PERV -> OMI // PERV -> DMI static_assert(!((T_SELF == fapi2::TARGET_TYPE_PERV) && (K_CHILD != fapi2::TARGET_TYPE_EQ) && @@ -697,6 +762,9 @@ inline std::vector<Target<K_CHILD, V> > (K_CHILD != fapi2::TARGET_TYPE_PHB) && (K_CHILD != fapi2::TARGET_TYPE_MC) && (K_CHILD != fapi2::TARGET_TYPE_MI) && + (K_CHILD != fapi2::TARGET_TYPE_MCC) && + (K_CHILD != fapi2::TARGET_TYPE_OMIC) && + (K_CHILD != fapi2::TARGET_TYPE_OMI) && (K_CHILD != fapi2::TARGET_TYPE_DMI)), "improper child of fapi2::TARGET_TYPE_PERV"); @@ -755,18 +823,42 @@ inline std::vector<Target<K_CHILD, V> > // Cumulus Memory // valid children for MC // MC -> MI + // MC -> MCC + // MC -> OMIC + // MC -> OMI // MC -> DMI static_assert(!((T_SELF == fapi2::TARGET_TYPE_MC) && (K_CHILD != fapi2::TARGET_TYPE_MI) && + (K_CHILD != fapi2::TARGET_TYPE_MCC) && + (K_CHILD != fapi2::TARGET_TYPE_OMIC) && + (K_CHILD != fapi2::TARGET_TYPE_OMI) && (K_CHILD != fapi2::TARGET_TYPE_DMI)), "improper child of fapi2::TARGET_TYPE_MC"); // valid children for MI + // MI -> MCC + // MI -> OMI // MI -> DMI static_assert(!((T_SELF == fapi2::TARGET_TYPE_MI) && + (K_CHILD != fapi2::TARGET_TYPE_MCC) && + (K_CHILD != fapi2::TARGET_TYPE_OMI) && (K_CHILD != fapi2::TARGET_TYPE_DMI)), "improper child of fapi2::TARGET_TYPE_MI"); + // valid children for MCC + // MCC -> OMI + static_assert(!((T_SELF == fapi2::TARGET_TYPE_MCC) && + (K_CHILD != fapi2::TARGET_TYPE_OMI)), + "improper child of fapi2::TARGET_TYPE_MCC"); + + // valid children for OMIC + // OMIC -> OMI + static_assert(!((T_SELF == fapi2::TARGET_TYPE_OMIC) && + (K_CHILD != fapi2::TARGET_TYPE_OMI)), + "improper child of fapi2::TARGET_TYPE_OMIC"); + + // TODO RTC:172970 When OCMB is added we need to add getchild support for OMI targets + // valid children for DMI // DMI -> MEMBUF static_assert(!((T_SELF == fapi2::TARGET_TYPE_DMI) && |