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| author | Dan Crowell <dcrowell@us.ibm.com> | 2013-01-07 13:34:27 -0600 |
|---|---|---|
| committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2013-02-08 16:51:17 -0600 |
| commit | 0ace043e6f4df6ce20d32524923e732a185853bf (patch) | |
| tree | 49abd153d81dc2aa204cc64fed49f6ae243f4487 /src/include/sys | |
| parent | caf328ccd931de4ce4e4d285d1a4e5ddd151abb5 (diff) | |
| download | talos-hostboot-0ace043e6f4df6ce20d32524923e732a185853bf.tar.gz talos-hostboot-0ace043e6f4df6ce20d32524923e732a185853bf.zip | |
Support for less than 8 threads per core
Modified anywhere that we enable non-master threads to only
touch the threads that we are told to update.
Change-Id: I5b764e51d85a5c663ac76164e9465831ef0c167c
RTC: 48808
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2877
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/include/sys')
| -rw-r--r-- | src/include/sys/misc.h | 7 | ||||
| -rw-r--r-- | src/include/sys/mmio.h | 3 |
2 files changed, 7 insertions, 3 deletions
diff --git a/src/include/sys/misc.h b/src/include/sys/misc.h index c8d3ba510..8c119aca5 100644 --- a/src/include/sys/misc.h +++ b/src/include/sys/misc.h @@ -5,7 +5,7 @@ /* */ /* IBM CONFIDENTIAL */ /* */ -/* COPYRIGHT International Business Machines Corp. 2011,2012 */ +/* COPYRIGHT International Business Machines Corp. 2011,2013 */ /* */ /* p1 */ /* */ @@ -86,7 +86,7 @@ ProcessorCoreType cpu_core_type(); uint8_t cpu_dd_level(); /** @fn cpu_thread_count() - * @brief Get the number of threads per cpu for this proctype + * @brief Get the number of available threads per cpu for this proctype * @return # of threads per cpu */ size_t cpu_thread_count(); @@ -95,6 +95,7 @@ size_t cpu_thread_count(); * @brief Have the kernel start a new core. * * @param[in] pir - PIR value of the first thread on the core. + * @param[in] i_threads - Bitstring of threads to enable (left-justified). * * @note The kernel will start all threads on the requested core even * though the callee only requests with a single PIR value. @@ -104,7 +105,7 @@ size_t cpu_thread_count(); * @retval -ENXIO - The core ID was outside of the range the kernel is * prepared to support. */ -int cpu_start_core(uint64_t pir); +int cpu_start_core(uint64_t pir,uint64_t i_threads); /** * @enum CpuSprNames diff --git a/src/include/sys/mmio.h b/src/include/sys/mmio.h index 610db0124..afdf0d5d1 100644 --- a/src/include/sys/mmio.h +++ b/src/include/sys/mmio.h @@ -97,6 +97,9 @@ enum MMIO_Scratch_Register /** Thread7 Scratch Register - Identifies if Hostboot is active after * host_start_payload. */ MMIO_SCRATCH_HOSTBOOT_ACTIVE = 0x38, + /** Thread7 Scratch Register - Set be SBE for reduced-threads support + * for AVPs. */ + MMIO_SCRATCH_AVP_THREADS = 0x38, }; /** @fn mmio_scratch_read() |
