Support HB running in SMF

Support SMF for P9N/P9C.  Lots of minor tweaks to make this
work, but the biggest is to run userspace in problem state
This is needed because for SMF Hostboot will need to run in S=1,
HV=0,PR=1 (and kernel in S=1, HV=1, PR=0)

This commit makes P9 HB userpsace run in HV=0 PR=1 and kernel in
HV=1, PR=0.

Change-Id: Ia4771df5e8858c6b7ae54b0746e62b283afb4bc4
RTC: 197243
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/50530
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

4 files changed, 75 insertions, 38 deletions

diff --git a/src/include/kernel/cpumgr.H b/src/include/kernel/cpumgr.H
index 7c6421cd6..f8daf5ab3 100644
--- a/src/include/kernel/cpumgr.H
+++ b/src/include/kernel/cpumgr.H
@@ -30,6 +30,46 @@
 #include <kernel/barrier.H>
 #include <kernel/idebug.H>
 
+/** Desired value for MSR after wakeup.
+ *
+ *  bit 0 - 64 bit mode.
+ *  bit 3 - Hypervisor mode.
+ *  bit 51 - Machine-check enable
+ */
+extern const uint64_t WAKEUP_MSR_VALUE;
+
+/** Desired value for LPCR after wakeup.
+ *
+ *  bit 48 - Wake-up from hyp doorbell
+ *  bit 49 - Wake-up from external interrupt.
+ *  bit 50 - Wake-up from decrementer.
+ *  bit 51 - Wake-up from machine check.
+ *  bit 60 - LPES(0) = 1 (see ISA).
+ *  bit 61 - LPES(1) = 0 (P8 RFC02204 forces to 0)
+ *  bit 62 - HVICE - Hypervisor Virt Interrupt Conditionally Enable
+ */
+extern const uint64_t WAKEUP_LPCR_VALUE;
+
+/** Desired value for RPR after wakeup.
+ *
+ *      Priority     Us    PHYP
+ *      Very Low      0      0
+ *      Low           1      1    <--- hostboot "low"
+ *      Med Low       3      3
+ *      Med          32      7    <--- hostboot "high"
+ *      Med High     33     15
+ *      High         34     31
+ *      Very High    63     63
+ */
+extern const uint64_t WAKEUP_RPR_VALUE;
+
+/** The mask to isolate SMF enabled value
+ *
+ * bit 41 - SMF (Ultravisor) enable
+ *
+ */
+extern const uint64_t MSR_SMF_MASK;
+
 class CpuManager
 {
     public:
@@ -159,39 +199,6 @@ class CpuManager
          */
         static void critAssert(uint64_t i_failAddr);
 
-        /** Desired value for MSR after wakeup.
-         *
-         *  bit 0 - 64 bit mode.
-         *  bit 3 - Hypervisor mode.
-         *  bit 51 - Machine-check enable
-         */
-        static const uint64_t WAKEUP_MSR_VALUE =    0x9000000000001000;
-
-        /** Desired value for LPCR after wakeup.
-         *
-         *  bit 48 - Wake-up from hyp doorbell
-         *  bit 49 - Wake-up from external interrupt.
-         *  bit 50 - Wake-up from decrementer.
-         *  bit 51 - Wake-up from machine check.
-         *  bit 60 - LPES(0) = 1 (see ISA).
-         *  bit 61 - LPES(1) = 0 (P8 RFC02204 forces to 0)
-         *  bit 62 - HVICE - Hypervisor Virt Interrupt Conditionally Enable
-         */
-        static const uint64_t WAKEUP_LPCR_VALUE =   0x000000000000F00A;
-
-        /** Desired value for RPR after wakeup.
-         *
-         *      Priority     Us    PHYP
-         *      Very Low      0      0
-         *      Low           1      1    <--- hostboot "low"
-         *      Med Low       3      3
-         *      Med          32      7    <--- hostboot "high"
-         *      Med High     33     15
-         *      High         34     31
-         *      Very High    63     63
-         */
-        static const uint64_t WAKEUP_RPR_VALUE =    0x0001032021223F;
-
         /** @fn startCPU
          *  Starts the requested CPU. Default of -1 implies current CPU.
          */
diff --git a/src/include/kernel/intmsghandler.H b/src/include/kernel/intmsghandler.H
index 2dad00c2b..87fc501d1 100644
--- a/src/include/kernel/intmsghandler.H
+++ b/src/include/kernel/intmsghandler.H
@@ -70,7 +70,12 @@ class InterruptMsgHdlr : public MessageHandler
             P9_IP_NODEID_LSL   = (22-PIR_t::BITS_AFTER_GROUP),
             XIRR_ADDR_OFFSET   = 4,
             MFRR_ADDR_OFFSET   = 12,
-            ACK_HYPERVISOR_INT_REG_OFFSET = 0x830,
+
+            // When doing MMIO to the interrupt contsoller, we need
+            // to use Hyp page (page 1), since page 0 is reserved for
+            // Ultravisor in SMF mode. Using page 1 here for compatibility
+            // between SMF and non-SMF.
+            ACK_HYPERVISOR_INT_REG_OFFSET = 0x1830,
 
             INTP_BAR_VALUE     = 0xFFFFE000,    // upper 32 bits of IPCBAR
             INTERPROC_XISR     = 2,     //IPI XISR is 2
@@ -92,6 +97,24 @@ class InterruptMsgHdlr : public MessageHandler
          */
         virtual ~InterruptMsgHdlr() {};
 
+        /** @brief 'Send message' interface.
+         *  Used to send a message into userspace.
+         *
+         *  @param[in] i_type - Message type (from sys/msg.h).
+         *  @param[in] i_key  - Key (msg->data[0]) for the message.
+         *  @param[in] i_data - Data (msg->data[1]) for the message.
+         *  @param[in] i_task - Optional task being deferred due to this
+         *                      message.
+         *
+         *  The result of this message is that a message will be created and
+         *  inserted onto a user-space message queue, awaking the waiter if
+         *  blocked.  The task passed as a parameter, if not nullptr, will be
+         *  deferred.
+         */
+        virtual void sendMessage(msg_sys_types_t i_type, void* i_key,
+                         void* i_data, task_t* i_task);
+
+
         /**
          * Handle response to 'send message'
          *
diff --git a/src/include/kernel/msghandler.H b/src/include/kernel/msghandler.H
index 46e3e7060..049e76436 100644
--- a/src/include/kernel/msghandler.H
+++ b/src/include/kernel/msghandler.H
@@ -5,7 +5,9 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2011,2014              */
+/* Contributors Listed Below - COPYRIGHT 2011,2018                        */
+/* [+] International Business Machines Corp.                              */
+/*                                                                        */
 /*                                                                        */
 /* Licensed under the Apache License, Version 2.0 (the "License");        */
 /* you may not use this file except in compliance with the License.       */
@@ -140,7 +142,7 @@ class MessageHandler
          *  blocked.  The task passed as a parameter, if not NULL, will be
          *  deferred.
          */
-        void sendMessage(msg_sys_types_t i_type, void* i_key,
+        virtual void sendMessage(msg_sys_types_t i_type, void* i_key,
                          void* i_data, task_t* i_task);
 
         /** @brief 'Handle response' interface.
@@ -180,7 +182,7 @@ class MessageHandler
          */
         int recvMessage(msg_t* i_msg);
 
-    private:
+    protected:
             /** Pointer to the subsystem lock. */
         Spinlock* const iv_lock;
             /** Message queue to relay messages to. */
diff --git a/src/include/kernel/ppcconsts.S b/src/include/kernel/ppcconsts.S
index 404fbc34d..e7d8fa471 100644
--- a/src/include/kernel/ppcconsts.S
+++ b/src/include/kernel/ppcconsts.S
@@ -5,7 +5,7 @@
 #
 # OpenPOWER HostBoot Project
 #
-# Contributors Listed Below - COPYRIGHT 2010,2015
+# Contributors Listed Below - COPYRIGHT 2010,2018
 # [+] International Business Machines Corp.
 #
 #
@@ -167,6 +167,11 @@
                 .set PTCR,464
                 .set HID0,1008
                 .set PIR, 1023
+                .set URMOR,505
+                .set USRR0,506
+                .set USRR1,507
+                .set USPRG0,496
+                .set USPRG1,497
 
 #*--------------------------------------------------------------------*#
 #*  Task offset Constants                                             *#