Support HB running in SMF

Support SMF for P9N/P9C.  Lots of minor tweaks to make this
work, but the biggest is to run userspace in problem state
This is needed because for SMF Hostboot will need to run in S=1,
HV=0,PR=1 (and kernel in S=1, HV=1, PR=0)

This commit makes P9 HB userpsace run in HV=0 PR=1 and kernel in
HV=1, PR=0.

Change-Id: Ia4771df5e8858c6b7ae54b0746e62b283afb4bc4
RTC: 197243
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/50530
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

1 files changed, 15 insertions, 1 deletions

diff --git a/src/include/bootloader/bootloader.H b/src/include/bootloader/bootloader.H
index 55b148f6b..a911b0a5b 100644
--- a/src/include/bootloader/bootloader.H
+++ b/src/include/bootloader/bootloader.H
@@ -44,7 +44,8 @@
 #include <bootloader/hbblreasoncodes.H>
 
 extern "C" void task_end_stub();
-extern "C" void enterHBB(uint64_t i_hbb_hrmor, uint64_t i_hbb_offset);
+extern "C" void enterHBB(uint64_t i_hbb_hrmor, uint64_t i_hbb_offset,
+                         uint64_t i_urmor_hack_req);
 
 #define printk(format...)
 
@@ -138,6 +139,19 @@ namespace Bootloader{
         return hrmor;
     }
 
+    /**
+     * @brief Get the current PVR of the chip
+     *
+     * Used to perform SMF workarounds for p9 chips
+     */
+    ALWAYS_INLINE
+      inline uint64_t getPVR()
+    {
+        register uint64_t pvr = 0;
+        asm volatile("mfspr %0, 287" : "=r" (pvr));
+        return pvr;
+    }
+
 
      /**Core Scratch Register 1 which tells HRMOR and memsize.
         This is passed into writeScratchReg to select which scratch