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| author | Emmanuel Sacristan <esacris@us.ibm.com> | 2019-07-30 13:18:01 -0500 |
|---|---|---|
| committer | Daniel M Crowell <dcrowell@us.ibm.com> | 2019-08-09 07:57:48 -0500 |
| commit | eb3d4239bbecc49ac6f6d3a78ef196136caea07c (patch) | |
| tree | 2f44d859b880c308b619be6bf754df418ca6a18d /src/import | |
| parent | 0d1f65bf28a7e415c830dd8cf57c5e1f8fbd0c1f (diff) | |
| download | talos-hostboot-eb3d4239bbecc49ac6f6d3a78ef196136caea07c.tar.gz talos-hostboot-eb3d4239bbecc49ac6f6d3a78ef196136caea07c.zip | |
adding iss 768 init for p9 behaviour in nmmu
Change-Id: I41d302272200ddc37276f56e238ccab8ed768163
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/81386
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Adam S Hale <adam.samuel.hale@ibm.com>
Reviewed-by: JAKE C TRUELOVE <jtruelove@us.ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/81402
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import')
| -rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index 0c2eb62bd..a3e660b90 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -3164,6 +3164,23 @@ </chip> </chipEcFeature> </attribute> + <!-- ********************************************************************* --> +<attribute> + <id>ATTR_CHIP_EC_FEATURE_NMMU_AX1_ISS768_FIX_DIS</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + NMMU disables seg fault generation for radix access to DR=1, HV=1 with lpid !=0. + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_AXONE</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + </chipEcFeature> + </attribute> <!-- ******************************************************************** --> <attribute> <id>ATTR_CHIP_EC_FEATURE_NMMU_PWC_DIS_DD2</id> |
