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| author | Andre Marin <aamarin@us.ibm.com> | 2018-12-12 14:51:15 -0600 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2019-02-05 17:01:27 -0600 |
| commit | bd7d0b7b5d90275064bdb3ca6a5cd1e36f37bcf7 (patch) | |
| tree | 71f22570545632fc1be38a817e443f6926bc033a /src/import | |
| parent | 605baad67443c4c282d322115e4d5edbaf118d3a (diff) | |
| download | talos-hostboot-bd7d0b7b5d90275064bdb3ca6a5cd1e36f37bcf7.tar.gz talos-hostboot-bd7d0b7b5d90275064bdb3ca6a5cd1e36f37bcf7.zip | |
Add SPD DDIMM DDR4 module except for PMIC fields
Change-Id: Ib5268d2bc425733d30fbca98eaeb8d4a62a918a2
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69838
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Dev-Ready: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70746
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import')
11 files changed, 4490 insertions, 14 deletions
diff --git a/src/import/generic/memory/lib/spd/common/ddr4/spd_decoder_ddr4.H b/src/import/generic/memory/lib/spd/common/ddr4/spd_decoder_ddr4.H index 96765b420..f4e97a7c7 100644 --- a/src/import/generic/memory/lib/spd/common/ddr4/spd_decoder_ddr4.H +++ b/src/import/generic/memory/lib/spd/common/ddr4/spd_decoder_ddr4.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2018 */ +/* Contributors Listed Below - COPYRIGHT 2015,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -762,7 +762,7 @@ class decoder<DDR4, BASE_CNFG, R> : public base_cnfg_decoder virtual fapi2::ReturnCode base_module( uint8_t& o_value ) const override { // Sparsed reserved bits within valid SPD field range - static const std::vector<uint8_t> l_reserved_bits{0b0111, 0b1010, 0b1011, 0b1110, 0b1111}; + static const std::vector<uint8_t> l_reserved_bits{0b0111, 0b1011, 0b1110, 0b1111}; FAPI_TRY( (mss::spd::reader<fields_t::BASE_MODULE, R>(iv_target, iv_data, o_value)) ); FAPI_TRY( check::reserved_values(iv_target, l_reserved_bits, BASE_MODULE_TYPE, o_value) ); diff --git a/src/import/generic/memory/lib/spd/common/dimm_module_decoder.H b/src/import/generic/memory/lib/spd/common/dimm_module_decoder.H index ec7916df4..11e5f3a6e 100644 --- a/src/import/generic/memory/lib/spd/common/dimm_module_decoder.H +++ b/src/import/generic/memory/lib/spd/common/dimm_module_decoder.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016,2018 */ +/* Contributors Listed Below - COPYRIGHT 2016,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -554,6 +554,854 @@ class dimm_module_decoder o_output = 0; return fapi2::FAPI2_RC_SUCCESS; } + + ////////////////////////////////////////// + // DDIMM information from here on out + ////////////////////////////////////////// + /// + /// @brief Decodes SPD Revision for bytes 192->447 -> SPD_REVISION + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode ddimm_spd_revision(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes Module Height -> MODULE_BASE_HEIGHT + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode module_base_height(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes DIMM attributes -> NUM_BUFFERS + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode num_buffers_used(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes DMB Manfacture ID code 2nd byte + /// @param[out] o_output encoding from SPD - multiple fields used + /// @return FAPI2_RC_SUCCESS if okay + /// @note Uses the following bytes and fields to build up the combined data: + /// Byte 198: CONTINUATION_CODE + /// Byte 199: LAST_NON_ZERO + /// + virtual fapi2::ReturnCode dmb_manufacturer_id_code(uint16_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes DMB Revision Number -> DMB_REV + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode dmb_rev_num(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes DIMM Module Oranization -> RANK_MIX + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode rank_mix(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes DIMM Module Oranization -> PACKAGE_RANK + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode package_ranks_per_channel(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes DIMM Module Oranization -> DATA_WIDTH + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode dram_component_width_per_channel(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes Memory Channel Bus Width -> NUM_DIMM_CHANNELS + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode num_channels_per_dimm(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes Memory Channel Bus Width -> BUS_WIDTH_EXT + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode bus_width_extension(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes Memory Channel Bus Width -> DEVICE_WIDTH + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode memory_width_per_channel(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes Module Thermal Sensors -> MOD_THERMAL_SENSOR + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode module_thermal_sensors(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes Host Interface Protocols -> PROTOCOL_SUPPORT + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode host_protocol_support(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes Host Interface Speed Supported -> SPEED_SUPPORTED_LSB + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode host_speed_supported(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes Address Mirroring -> ADDRESS_MIRROR + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode address_mirroring(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes Byte enables MSB + /// @param[out] o_output encoding from SPD - multiple fields used + /// @return FAPI2_RC_SUCCESS if okay + /// @note Uses the following bytes and fields to build up the combined data: + /// Byte 208: BYTE_ENABLES_LSB + /// Byte 209: BYTE_ENABLES_MSB + /// + virtual fapi2::ReturnCode byte_enables(uint16_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes Nibble enables LSB1 + /// @param[out] o_output encoding from SPD - multiple fields used + /// @return FAPI2_RC_SUCCESS if okay + /// @note Uses the following bytes and fields to build up the combined data: + /// Byte 210: NIBBLE_ENABLES_LSB0 + /// Byte 211: NIBBLE_ENABLES_MSB0 + /// Byte 212: NIBBLE_ENABLES_LSB1 + /// + virtual fapi2::ReturnCode nibble_enables(uint32_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes Four Rank Mode - DDP Compatibility - TSV 8 High Support - MRAM Support -> DDIMM_COMPAT + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode compatabilty_modes(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes Number of P-States -> NUM_P_STATES + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode num_p_states(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes Spare Device Mapping LSB1 + /// @param[out] o_output encoding from SPD - multiple fields used + /// @return FAPI2_RC_SUCCESS if okay + /// @note Uses the following bytes and fields to build up the combined data: + /// Byte 216: SPARE_DEVICE_LSB0 + /// Byte 217: SPARE_DEVICE_MSB0 + /// Byte 218: SPARE_DEVICE_LSB1 + /// + virtual fapi2::ReturnCode spare_device_mapping(uint32_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes Host Interface Speed to DDR Interface Speed Ratio -> HI_DDR_SPEED_RATIO + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode host_to_ddr_speed_ratio(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes Voltage VIN_MTG Edge connector -> VIN_MGMT_NOMINAL + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode vin_mgmt_nominal(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes Voltage VIN_MTG Edge connector -> VIN_MGMT_OPERABLE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode vin_mgmt_operable(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes Voltage VIN_MTG Edge connector -> VIN_MGMT_ENDURANT + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode vin_mgmt_endurant(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes Voltage VIN_BULK Edge Connecto -> VIN_BULK_NOMINAL + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode vin_bulk_nominal(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes Voltage VIN_BULK Edge Connecto -> VIN_BULK_OPERABLE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode vin_bulk_operable(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes Voltage VIN_BULK Edge Connecto -> VIN_BULK_ENDURANT + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode vin_bulk_endurant(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes VDD_Core PMIC0 -> VDD_CORE_PMIC0 + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode vdd_core_pmic0(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC0 Manfacture ID code 2nd byte + /// @param[out] o_output encoding from SPD - multiple fields used + /// @return FAPI2_RC_SUCCESS if okay + /// @note Uses the following bytes and fields to build up the combined data: + /// Byte 227: PMIC0_CONT_CODE + /// Byte 228: PMIC0_LAST_NON_ZERO + /// + virtual fapi2::ReturnCode mfg_id_pmic0(uint16_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC0 Revision Number -> PMIC0_REV + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode revision_pmic0(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes VDD_Core PMIC1 -> VDD_CORE_PMIC1 + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode vdd_core_pmic1(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC1 Manfacture ID code 2nd byte + /// @param[out] o_output encoding from SPD - multiple fields used + /// @return FAPI2_RC_SUCCESS if okay + /// @note Uses the following bytes and fields to build up the combined data: + /// Byte 231: PMIC1_CONT_CODE + /// Byte 232: PMIC1_LAST_NON_ZERO + /// + virtual fapi2::ReturnCode mfg_id_pmic1(uint16_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC1 Revision Number -> PMIC1_REV + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode revision_pmic1(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC0 SWA Voltage Setting -> PMIC0_SWA_VOLT_SET + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_swa_pmic0(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC0 SWA Voltage Setting -> PMIC0_SWA_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_range_swa_pmic0(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC0 SWA Voltage Offset -> PMIC0_SWA_VOLT_OFF + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_swa_pmic0(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC0 SWA Voltage Offset -> PMIC0_SWA_OFF_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_range_swa_pmic0(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC0 SWA Delay Sequence Order -> PMIC0_SWA_ORDER + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_order_swa_pmic0(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC0 SWB Voltage Setting -> PMIC0_SWB_VOLT_SET + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_swb_pmic0(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC0 SWB Voltage Setting -> PMIC0_SWB_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_range_swb_pmic0(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC0 SWB Voltage Offset -> PMIC0_SWB_VOLT_OFF + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_swb_pmic0(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC0 SWB Voltage Offset -> PMIC0_SWB_OFF_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_range_swb_pmic0(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC0 SWB Delay Sequence Order -> PMIC0_SWB_ORDER + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_order_swb_pmic0(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC0 SWC Voltage Setting -> PMIC0_SWC_VOLT_SET + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_swc_pmic0(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC0 SWC Voltage Setting -> PMIC0_SWC_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_range_swc_pmic0(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC0 SWC Voltage Offset -> PMIC0_SWC_VOLT_OFF + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_swc_pmic0(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC0 SWC Voltage Offset -> PMIC0_SWC_OFF_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_range_swc_pmic0(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC0 SWC Delay Sequence Order -> PMIC0_SWC_ORDER + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_order_swc_pmic0(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC0 SWD Voltage Setting -> PMIC0_SWD_VOLT_SET + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_swd_pmic0(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC0 SWD Voltage Setting -> PMIC0_SWD_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_range_swd_pmic0(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC0 SWD Voltage Offset -> PMIC0_SWD_VOLT_OFF + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_swd_pmic0(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC0 SWD Voltage Offset -> PMIC0_SWD_OFF_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_range_swd_pmic0(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC0 SWD Delay Sequence Order -> PMIC0_SWD_ORDER + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_order_swd_pmic0(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC0 Phase Combination -> PMIC0_PHASE_COMBIN + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode phase_combination_pmic0(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC1 SWA Voltage Setting -> PMIC1_SWA_VOLT_SET + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_swa_pmic1(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC1 SWA Voltage Setting -> PMIC1_SWA_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_range_swa_pmic1(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC1 SWA Voltage Offset -> PMIC1_SWA_VOLT_OFF + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_swa_pmic1(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC1 SWA Voltage Offset -> PMIC1_SWA_OFF_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_range_swa_pmic1(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC1 SWA Delay Sequence Order -> PMIC1_SWA_ORDER + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_order_swa_pmic1(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC1 SWB Voltage Setting -> PMIC1_SWB_VOLT_SET + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_swb_pmic1(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC1 SWB Voltage Setting -> PMIC1_SWB_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_range_swb_pmic1(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC1 SWB Voltage Offset -> PMIC1_SWB_VOLT_OFF + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_swb_pmic1(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC1 SWB Voltage Offset -> PMIC1_SWB_OFF_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_range_swb_pmic1(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC1 SWB Delay Sequence Order -> PMIC1_SWB_ORDER + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_order_swb_pmic1(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC1 SWC Voltage Setting -> PMIC1_SWC_VOLT_SET + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_swc_pmic1(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC1 SWC Voltage Setting -> PMIC1_SWC_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_range_swc_pmic1(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC1 SWC Voltage Offset -> PMIC1_SWC_VOLT_OFF + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_swc_pmic1(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC1 SWC Voltage Offset -> PMIC1_SWC_OFF_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_range_swc_pmic1(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC1 SWC Delay Sequence Order -> PMIC1_SWC_ORDER + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_order_swc_pmic1(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC1 SWD Voltage Setting -> PMIC1_SWD_VOLT_SET + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_swd_pmic1(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC1 SWD Voltage Setting -> PMIC1_SWD_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_range_swd_pmic1(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC1 SWD Voltage Offset -> PMIC1_SWD_VOLT_OFF + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_swd_pmic1(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC1 SWD Voltage Offset -> PMIC1_SWD_OFF_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_range_swd_pmic1(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC1 SWD Delay Sequence Order -> PMIC1_SWD_ORDER + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_order_swd_pmic1(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } + + /// + /// @brief Decodes PMIC1 Phase Combination -> PMIC1_PHASE_COMBIN + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode phase_combination_pmic1(uint8_t& o_output) const + { + o_output = 0; + return fapi2::FAPI2_RC_SUCCESS; + } }; }// spd diff --git a/src/import/generic/memory/lib/spd/ddimm/ddr4/ddimm_decoder_ddr4.H b/src/import/generic/memory/lib/spd/ddimm/ddr4/ddimm_decoder_ddr4.H index 87f0bb92f..5e736cc76 100644 --- a/src/import/generic/memory/lib/spd/ddimm/ddr4/ddimm_decoder_ddr4.H +++ b/src/import/generic/memory/lib/spd/ddimm/ddr4/ddimm_decoder_ddr4.H @@ -22,3 +22,1282 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ +/// +/// @file ddimm_decoder_ddr4.H +/// @brief RDIMM module SPD decoder declarations +/// +// *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com> +// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com> +// *HWP Team: Memory +// *HWP Level: 3 +// *HWP Consumed by: HB:FSP + +#ifndef _MSS_DDIMM_DECODER_DDR4_H_ +#define _MSS_DDIMM_DECODER_DDR4_H_ + +#include <fapi2.H> +#include <generic/memory/lib/spd/spd_checker.H> +#include <generic/memory/lib/spd/common/dimm_module_decoder.H> +#include <generic/memory/lib/spd/spd_decoder_def.H> +#include <generic/memory/lib/spd/spd_traits_ddr4.H> +#include <generic/memory/lib/spd/spd_reader.H> +#include <generic/memory/lib/utils/mss_buffer_utils.H> + +namespace mss +{ +namespace spd +{ + +/// +/// @class decoder +/// @tparam R SPD revision - partial specialization +/// @brief DDIMM module SPD DRAM decoder +/// +template < rev R > +class decoder<DDR4, DDIMM_MODULE, R > : public dimm_module_decoder +{ + private: + + using fields_t = fields<DDR4, DDIMM_MODULE>; + fapi2::Target<fapi2::TARGET_TYPE_DIMM> iv_target; + std::vector<uint8_t> iv_data; + + public: + + // deleted default ctor + decoder() = delete; + + /// + /// @brief ctor + /// @param[in] i_target dimm target + /// @param[in] i_spd_data vector DIMM SPD data + /// + decoder(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, + const std::vector<uint8_t>& i_spd_data): + dimm_module_decoder(i_target, i_spd_data), + iv_target(i_target), + iv_data(i_spd_data) + { + static_assert( R <= rev::DDIMM_MAX, " R > rev::DDIMM_MAX"); + } + + /// + /// @brief default dtor + /// + virtual ~decoder() = default; + + /// + /// @brief Gets decoder target + /// @return fapi2::Target<fapi2::TARGET_TYPE_DIMM> + /// + virtual fapi2::Target<fapi2::TARGET_TYPE_DIMM> get_dimm_target() const + { + return iv_target; + } + + /// + /// @brief Gets decoder SPD data + /// @return std::vector<uint8_t> + /// + virtual std::vector<uint8_t> get_data() const + { + return iv_data; + } + + /// + /// @brief Sets decoder SPD data + /// @param[in] i_spd_data SPD data in a vector reference + /// + virtual void set_data(const std::vector<uint8_t>& i_spd_data) + { + iv_data = i_spd_data; + } + + /// + /// @brief Decodes SPD Revision for bytes 192->447 -> SPD_REVISION + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode ddimm_spd_revision(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::SPD_REVISION, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Module Height -> MODULE_BASE_HEIGHT + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode module_base_height(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::MODULE_BASE_HEIGHT, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Module Height -> MODULE_HEIGHT_MAX + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode max_module_nominal_height(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::MODULE_HEIGHT_MAX, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Module Maximum Thickness -> MAX_THICKNESS_BACK + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode back_module_max_thickness(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::MAX_THICKNESS_BACK, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Module Maximum Thickness -> MAX_THICKNESS_FRONT + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode front_module_max_thickness(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::MAX_THICKNESS_FRONT, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Reference Raw Card used -> DESIGN_REV + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode reference_raw_card(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::DESIGN_REV, R>(iv_target, iv_data, o_output)) ); + + // Checks that we don't hit the reserved field for the RC design + { + static constexpr uint8_t RC_DESIGN_START = 3; + static constexpr uint8_t RC_DESIGN_LEN = 5; + static constexpr uint8_t RESERVED = 0x1f; + fapi2::buffer<uint8_t> l_buff(o_output); + uint8_t l_rc_design = 0; + l_buff.extractToRight<RC_DESIGN_START, RC_DESIGN_LEN>(l_rc_design); + + // Lets make an additional check that we aren't being set to a reserved field + FAPI_ASSERT( l_rc_design != RESERVED, + fapi2::MSS_INVALID_SPD_RESERVED_BITS() + .set_FUNCTION_CODE(DDIMM_RAWCARD_DECODE) + .set_TARGET(iv_target), + "Reserved bits seen on %s", + spd::c_str(iv_target) ); + } + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes DIMM attributes -> NUM_ROWS + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode num_rows_of_drams(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::NUM_ROWS, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes DIMM attributes -> NUM_BUFFERS + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode num_buffers_used(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::NUM_BUFFERS, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Thermal Heat Spreader Solution -> HEAT_SPREADER_SOL + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode heat_spreader_solution(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::HEAT_SPREADER_SOL, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Thermal Heat Spreader Solution -> HEAT_SPREADER_CHAR + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode heat_spreader_thermal_char(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::HEAT_SPREADER_CHAR, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes DMB Manfacture ID code 2nd byte + /// @param[out] o_output encoding from SPD - multiple fields used + /// @return FAPI2_RC_SUCCESS if okay + /// @note Uses the following bytes and fields to build up the combined data: + /// Byte 198: CONTINUATION_CODE + /// Byte 199: LAST_NON_ZERO + /// + virtual fapi2::ReturnCode dmb_manufacturer_id_code(uint16_t& o_output) const override + { + uint8_t l_byte0 = 0; + uint8_t l_byte1 = 0; + + FAPI_TRY( (mss::spd::reader<fields_t::CONTINUATION_CODE, R>(iv_target, iv_data, l_byte0)) ); + FAPI_TRY( (mss::spd::reader<fields_t::LAST_NON_ZERO, R>(iv_target, iv_data, l_byte1)) ); + + { + fapi2::buffer<uint16_t> l_buffer; + right_aligned_insert(l_buffer, l_byte1, l_byte0); + o_output = l_buffer; + FAPI_INF("%s. Register Manufacturer ID Code: 0x%04x", + spd::c_str(iv_target), + o_output); + } + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes DMB Revision Number -> DMB_REV + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode dmb_rev_num(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::DMB_REV, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes DIMM Module Oranization -> RANK_MIX + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode rank_mix(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::RANK_MIX, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes DIMM Module Oranization -> PACKAGE_RANK + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode package_ranks_per_channel(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PACKAGE_RANK, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes DIMM Module Oranization -> DATA_WIDTH + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode dram_component_width_per_channel(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::DATA_WIDTH, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Memory Channel Bus Width -> NUM_DIMM_CHANNELS + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode num_channels_per_dimm(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::NUM_DIMM_CHANNELS, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Memory Channel Bus Width -> BUS_WIDTH_EXT + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode bus_width_extension(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::BUS_WIDTH_EXT, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Memory Channel Bus Width -> DEVICE_WIDTH + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode memory_width_per_channel(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::DEVICE_WIDTH, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Module Thermal Sensors -> MOD_THERMAL_SENSOR + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode module_thermal_sensors(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::MOD_THERMAL_SENSOR, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Host Interface Protocols -> PROTOCOL_SUPPORT + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode host_protocol_support(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PROTOCOL_SUPPORT, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Host Interface Speed Supported -> SPEED_SUPPORTED_LSB + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode host_speed_supported(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::SPEED_SUPPORTED_LSB, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Address Mirroring -> ADDRESS_MIRROR + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode address_mirroring(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::ADDRESS_MIRROR, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Byte enables MSB + /// @param[out] o_output encoding from SPD - multiple fields used + /// @return FAPI2_RC_SUCCESS if okay + /// @note Uses the following bytes and fields to build up the combined data: + /// Byte 208: BYTE_ENABLES_LSB + /// Byte 209: BYTE_ENABLES_MSB + /// + virtual fapi2::ReturnCode byte_enables(uint16_t& o_output) const override + { + uint8_t l_byte0 = 0; + uint8_t l_byte1 = 0; + + FAPI_TRY( (mss::spd::reader<fields_t::BYTE_ENABLES_LSB, R>(iv_target, iv_data, l_byte0)) ); + FAPI_TRY( (mss::spd::reader<fields_t::BYTE_ENABLES_MSB, R>(iv_target, iv_data, l_byte1)) ); + + { + fapi2::buffer<uint16_t> l_buffer; + right_aligned_insert(l_buffer, l_byte1, l_byte0); + o_output = l_buffer; + FAPI_INF("%s. Register Manufacturer ID Code: 0x%04x", + spd::c_str(iv_target), + o_output); + } + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Nibble enables LSB1 + /// @param[out] o_output encoding from SPD - multiple fields used + /// @return FAPI2_RC_SUCCESS if okay + /// @note Uses the following bytes and fields to build up the combined data: + /// Byte 210: NIBBLE_ENABLES_LSB0 + /// Byte 211: NIBBLE_ENABLES_MSB0 + /// Byte 212: NIBBLE_ENABLES_LSB1 + /// + virtual fapi2::ReturnCode nibble_enables(uint32_t& o_output) const override + { + uint8_t l_byte0 = 0; + uint8_t l_byte1 = 0; + uint8_t l_byte2 = 0; + uint8_t l_byte3 = 0; + + FAPI_TRY( (mss::spd::reader<fields_t::NIBBLE_ENABLES_LSB0, R>(iv_target, iv_data, l_byte0)) ); + FAPI_TRY( (mss::spd::reader<fields_t::NIBBLE_ENABLES_MSB0, R>(iv_target, iv_data, l_byte1)) ); + FAPI_TRY( (mss::spd::reader<fields_t::NIBBLE_ENABLES_LSB1, R>(iv_target, iv_data, l_byte2)) ); + + { + fapi2::buffer<uint32_t> l_buffer; + right_aligned_insert(l_buffer, l_byte3, l_byte2, l_byte1, l_byte0); + o_output = l_buffer; + FAPI_INF("%s. Register Manufacturer ID Code: 0x%04x", + spd::c_str(iv_target), + o_output); + } + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Four Rank Mode - DDP Compatibility - TSV 8 High Support - MRAM Support -> DDIMM_COMPAT + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode compatabilty_modes(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::DDIMM_COMPAT, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Number of P-States -> NUM_P_STATES + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode num_p_states(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::NUM_P_STATES, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Spare Device Mapping LSB1 + /// @param[out] o_output encoding from SPD - multiple fields used + /// @return FAPI2_RC_SUCCESS if okay + /// @note Uses the following bytes and fields to build up the combined data: + /// Byte 216: SPARE_DEVICE_LSB0 + /// Byte 217: SPARE_DEVICE_MSB0 + /// Byte 218: SPARE_DEVICE_LSB1 + /// + virtual fapi2::ReturnCode spare_device_mapping(uint32_t& o_output) const override + { + uint8_t l_byte0 = 0; + uint8_t l_byte1 = 0; + uint8_t l_byte2 = 0; + uint8_t l_byte3 = 0; + + FAPI_TRY( (mss::spd::reader<fields_t::SPARE_DEVICE_LSB0, R>(iv_target, iv_data, l_byte0)) ); + FAPI_TRY( (mss::spd::reader<fields_t::SPARE_DEVICE_MSB0, R>(iv_target, iv_data, l_byte1)) ); + FAPI_TRY( (mss::spd::reader<fields_t::SPARE_DEVICE_LSB1, R>(iv_target, iv_data, l_byte2)) ); + + { + fapi2::buffer<uint32_t> l_buffer; + right_aligned_insert(l_buffer, l_byte3, l_byte2, l_byte1, l_byte0); + o_output = l_buffer; + FAPI_INF("%s. Register Manufacturer ID Code: 0x%04x", + spd::c_str(iv_target), + o_output); + } + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Host Interface Speed to DDR Interface Speed Ratio -> HI_DDR_SPEED_RATIO + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode host_to_ddr_speed_ratio(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::HI_DDR_SPEED_RATIO, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Voltage VIN_MTG Edge connector -> VIN_MGMT_NOMINAL + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode vin_mgmt_nominal(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::VIN_MGMT_NOMINAL, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Voltage VIN_MTG Edge connector -> VIN_MGMT_OPERABLE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode vin_mgmt_operable(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::VIN_MGMT_OPERABLE, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Voltage VIN_MTG Edge connector -> VIN_MGMT_ENDURANT + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode vin_mgmt_endurant(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::VIN_MGMT_ENDURANT, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Voltage VIN_BULK Edge Connecto -> VIN_BULK_NOMINAL + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode vin_bulk_nominal(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::VIN_BULK_NOMINAL, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Voltage VIN_BULK Edge Connecto -> VIN_BULK_OPERABLE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode vin_bulk_operable(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::VIN_BULK_OPERABLE, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Voltage VIN_BULK Edge Connecto -> VIN_BULK_ENDURANT + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode vin_bulk_endurant(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::VIN_BULK_ENDURANT, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes VDD_Core PMIC0 -> VDD_CORE_PMIC0 + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode vdd_core_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::VDD_CORE_PMIC0, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 Manfacture ID code 2nd byte + /// @param[out] o_output encoding from SPD - multiple fields used + /// @return FAPI2_RC_SUCCESS if okay + /// @note Uses the following bytes and fields to build up the combined data: + /// Byte 227: PMIC0_CONT_CODE + /// Byte 228: PMIC0_LAST_NON_ZERO + /// + virtual fapi2::ReturnCode mfg_id_pmic0(uint16_t& o_output) const override + { + uint8_t l_byte0 = 0; + uint8_t l_byte1 = 0; + + FAPI_TRY( (mss::spd::reader<fields_t::PMIC0_CONT_CODE, R>(iv_target, iv_data, l_byte0)) ); + FAPI_TRY( (mss::spd::reader<fields_t::PMIC0_LAST_NON_ZERO, R>(iv_target, iv_data, l_byte1)) ); + + { + fapi2::buffer<uint16_t> l_buffer; + right_aligned_insert(l_buffer, l_byte1, l_byte0); + o_output = l_buffer; + FAPI_INF("%s. Register Manufacturer ID Code: 0x%04x", + spd::c_str(iv_target), + o_output); + } + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 Revision Number -> PMIC0_REV + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode revision_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC0_REV, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes VDD_Core PMIC1 -> VDD_CORE_PMIC1 + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode vdd_core_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::VDD_CORE_PMIC1, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 Manfacture ID code 2nd byte + /// @param[out] o_output encoding from SPD - multiple fields used + /// @return FAPI2_RC_SUCCESS if okay + /// @note Uses the following bytes and fields to build up the combined data: + /// Byte 231: PMIC1_CONT_CODE + /// Byte 232: PMIC1_LAST_NON_ZERO + /// + virtual fapi2::ReturnCode mfg_id_pmic1(uint16_t& o_output) const override + { + uint8_t l_byte0 = 0; + uint8_t l_byte1 = 0; + + FAPI_TRY( (mss::spd::reader<fields_t::PMIC1_CONT_CODE, R>(iv_target, iv_data, l_byte0)) ); + FAPI_TRY( (mss::spd::reader<fields_t::PMIC1_LAST_NON_ZERO, R>(iv_target, iv_data, l_byte1)) ); + + { + fapi2::buffer<uint16_t> l_buffer; + right_aligned_insert(l_buffer, l_byte1, l_byte0); + o_output = l_buffer; + FAPI_INF("%s. Register Manufacturer ID Code: 0x%04x", + spd::c_str(iv_target), + o_output); + } + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 Revision Number -> PMIC1_REV + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode revision_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC1_REV, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 SWA Voltage Setting -> PMIC0_SWA_VOLT_SET + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_swa_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC0_SWA_VOLT_SET, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 SWA Voltage Setting -> PMIC0_SWA_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_range_swa_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC0_SWA_RANGE, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 SWA Voltage Offset -> PMIC0_SWA_VOLT_OFF + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_swa_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC0_SWA_VOLT_OFF, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 SWA Voltage Offset -> PMIC0_SWA_OFF_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_range_swa_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC0_SWA_OFF_RANGE, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 SWA Delay Sequence Order -> PMIC0_SWA_ORDER + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_order_swa_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC0_SWA_ORDER, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 SWB Voltage Setting -> PMIC0_SWB_VOLT_SET + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_swb_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC0_SWB_VOLT_SET, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 SWB Voltage Setting -> PMIC0_SWB_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_range_swb_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC0_SWB_RANGE, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 SWB Voltage Offset -> PMIC0_SWB_VOLT_OFF + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_swb_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC0_SWB_VOLT_OFF, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 SWB Voltage Offset -> PMIC0_SWB_OFF_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_range_swb_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC0_SWB_OFF_RANGE, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 SWB Delay Sequence Order -> PMIC0_SWB_ORDER + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_order_swb_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC0_SWB_ORDER, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 SWC Voltage Setting -> PMIC0_SWC_VOLT_SET + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_swc_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC0_SWC_VOLT_SET, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 SWC Voltage Setting -> PMIC0_SWC_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_range_swc_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC0_SWC_RANGE, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 SWC Voltage Offset -> PMIC0_SWC_VOLT_OFF + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_swc_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC0_SWC_VOLT_OFF, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 SWC Voltage Offset -> PMIC0_SWC_OFF_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_range_swc_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC0_SWC_OFF_RANGE, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 SWC Delay Sequence Order -> PMIC0_SWC_ORDER + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_order_swc_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC0_SWC_ORDER, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 SWD Voltage Setting -> PMIC0_SWD_VOLT_SET + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_swd_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC0_SWD_VOLT_SET, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 SWD Voltage Setting -> PMIC0_SWD_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_range_swd_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC0_SWD_RANGE, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 SWD Voltage Offset -> PMIC0_SWD_VOLT_OFF + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_swd_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC0_SWD_VOLT_OFF, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 SWD Voltage Offset -> PMIC0_SWD_OFF_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_range_swd_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC0_SWD_OFF_RANGE, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 SWD Delay Sequence Order -> PMIC0_SWD_ORDER + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_order_swd_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC0_SWD_ORDER, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 Phase Combination -> PMIC0_PHASE_COMBIN + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode phase_combination_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC0_PHASE_COMBIN, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 SWA Voltage Setting -> PMIC1_SWA_VOLT_SET + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_swa_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC1_SWA_VOLT_SET, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 SWA Voltage Setting -> PMIC1_SWA_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_range_swa_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC1_SWA_RANGE, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 SWA Voltage Offset -> PMIC1_SWA_VOLT_OFF + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_swa_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC1_SWA_VOLT_OFF, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 SWA Voltage Offset -> PMIC1_SWA_OFF_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_range_swa_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC1_SWA_OFF_RANGE, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 SWA Delay Sequence Order -> PMIC1_SWA_ORDER + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_order_swa_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC1_SWA_ORDER, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 SWB Voltage Setting -> PMIC1_SWB_VOLT_SET + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_swb_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC1_SWB_VOLT_SET, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 SWB Voltage Setting -> PMIC1_SWB_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_range_swb_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC1_SWB_RANGE, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 SWB Voltage Offset -> PMIC1_SWB_VOLT_OFF + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_swb_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC1_SWB_VOLT_OFF, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 SWB Voltage Offset -> PMIC1_SWB_OFF_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_range_swb_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC1_SWB_OFF_RANGE, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 SWB Delay Sequence Order -> PMIC1_SWB_ORDER + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_order_swb_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC1_SWB_ORDER, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 SWC Voltage Setting -> PMIC1_SWC_VOLT_SET + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_swc_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC1_SWC_VOLT_SET, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 SWC Voltage Setting -> PMIC1_SWC_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_range_swc_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC1_SWC_RANGE, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 SWC Voltage Offset -> PMIC1_SWC_VOLT_OFF + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_swc_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC1_SWC_VOLT_OFF, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 SWC Voltage Offset -> PMIC1_SWC_OFF_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_range_swc_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC1_SWC_OFF_RANGE, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 SWC Delay Sequence Order -> PMIC1_SWC_ORDER + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_order_swc_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC1_SWC_ORDER, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 SWD Voltage Setting -> PMIC1_SWD_VOLT_SET + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_swd_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC1_SWD_VOLT_SET, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 SWD Voltage Setting -> PMIC1_SWD_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_range_swd_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC1_SWD_RANGE, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 SWD Voltage Offset -> PMIC1_SWD_VOLT_OFF + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_swd_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC1_SWD_VOLT_OFF, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 SWD Voltage Offset -> PMIC1_SWD_OFF_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_range_swd_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC1_SWD_OFF_RANGE, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 SWD Delay Sequence Order -> PMIC1_SWD_ORDER + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_order_swd_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC1_SWD_ORDER, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 Phase Combination -> PMIC1_PHASE_COMBIN + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode phase_combination_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader<fields_t::PMIC1_PHASE_COMBIN, R>(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + +};// decoder + +}// spd +}// mss + +#endif //_MSS_DDIMM_DECODER_DDR4_H_ diff --git a/src/import/generic/memory/lib/spd/rdimm/ddr4/rdimm_decoder_ddr4.H b/src/import/generic/memory/lib/spd/rdimm/ddr4/rdimm_decoder_ddr4.H index 08a73d712..e47348fef 100644 --- a/src/import/generic/memory/lib/spd/rdimm/ddr4/rdimm_decoder_ddr4.H +++ b/src/import/generic/memory/lib/spd/rdimm/ddr4/rdimm_decoder_ddr4.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016,2018 */ +/* Contributors Listed Below - COPYRIGHT 2016,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -435,7 +435,6 @@ class decoder<DDR4, RDIMM_MODULE, R > : public dimm_module_decoder return fapi2::current_err; } - };// decoder }// spd diff --git a/src/import/generic/memory/lib/spd/spd_checker.H b/src/import/generic/memory/lib/spd/spd_checker.H index d393a83e7..cb4eb371a 100644 --- a/src/import/generic/memory/lib/spd/spd_checker.H +++ b/src/import/generic/memory/lib/spd/spd_checker.H @@ -185,6 +185,7 @@ static inline bool is_dimm_type_valid(const uint8_t i_dimm_type) { case RDIMM: case LRDIMM: + case DDIMM: l_result = true; break; @@ -213,7 +214,7 @@ inline fapi2::ReturnCode dimm_type(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& .set_FUNCTION(i_func_code) .set_DIMM_TARGET(i_target), "Invalid DIMM type recieved (%d) for %s", - i_dimm_type, spd::c_str(i_target)); + i_dimm_type, DDIMM, spd::c_str(i_target)); return fapi2::FAPI2_RC_SUCCESS; diff --git a/src/import/generic/memory/lib/spd/spd_factory_pattern.C b/src/import/generic/memory/lib/spd/spd_factory_pattern.C index de873fe0d..cb934265d 100644 --- a/src/import/generic/memory/lib/spd/spd_factory_pattern.C +++ b/src/import/generic/memory/lib/spd/spd_factory_pattern.C @@ -302,6 +302,10 @@ fapi2::ReturnCode factories::dimm_module_select_param(parameters& o_param) const o_param = LRDIMM_MODULE; break; + case DDIMM: + o_param = DDIMM_MODULE; + break; + default: FAPI_ASSERT(false, fapi2::MSS_INVALID_DIMM_TYPE() diff --git a/src/import/generic/memory/lib/spd/spd_factory_pattern.H b/src/import/generic/memory/lib/spd/spd_factory_pattern.H index 9d36738d4..567ce2d82 100644 --- a/src/import/generic/memory/lib/spd/spd_factory_pattern.H +++ b/src/import/generic/memory/lib/spd/spd_factory_pattern.H @@ -42,6 +42,7 @@ #include <generic/memory/lib/spd/common/ddr4/spd_decoder_ddr4.H> #include <generic/memory/lib/spd/rdimm/ddr4/rdimm_decoder_ddr4.H> #include <generic/memory/lib/spd/lrdimm/ddr4/lrdimm_decoder_ddr4.H> +#include <generic/memory/lib/spd/ddimm/ddr4/ddimm_decoder_ddr4.H> #include <generic/memory/lib/spd/spd_checker.H> #include <generic/memory/lib/utils/shared/mss_generic_consts.H> @@ -211,13 +212,14 @@ class module_factory module_factory(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, const std::vector<uint8_t>& i_spd_data): iv_target(i_target), - LRDIMM_DDR4_REV_1_0{DDR4, LRDIMM_MODULE, rev::V1_0}, - LRDIMM_DDR4_REV_1_1{DDR4, LRDIMM_MODULE, rev::V1_1}, - LRDIMM_DDR4_REV_1_2{DDR4, LRDIMM_MODULE, rev::V1_2}, - RDIMM_DDR4_REV_1_0{DDR4, RDIMM_MODULE, rev::V1_0}, - RDIMM_DDR4_REV_1_1{DDR4, RDIMM_MODULE, rev::V1_1}, - NVDIMM_DDR4_REV_1_0{DDR4, NVDIMM_MODULE, rev::V1_0}, - NVDIMM_DDR4_REV_1_1{DDR4, NVDIMM_MODULE, rev::V1_1} + LRDIMM_DDR4_REV_1_0{ DDR4, LRDIMM_MODULE, rev::V1_0}, + LRDIMM_DDR4_REV_1_1{ DDR4, LRDIMM_MODULE, rev::V1_1}, + LRDIMM_DDR4_REV_1_2{ DDR4, LRDIMM_MODULE, rev::V1_2}, + RDIMM_DDR4_REV_1_0 { DDR4, RDIMM_MODULE, rev::V1_0}, + RDIMM_DDR4_REV_1_1 { DDR4, RDIMM_MODULE, rev::V1_1}, + NVDIMM_DDR4_REV_1_0{ DDR4, NVDIMM_MODULE, rev::V1_0}, + NVDIMM_DDR4_REV_1_1{ DDR4, NVDIMM_MODULE, rev::V1_1}, + DDIMM_DDR4_REV_0_0 { DDR4, DDIMM_MODULE, rev::V0_0} { // Setup pre-defined maps available to search through init_map_vars(i_spd_data, iv_decoder_map); @@ -267,6 +269,7 @@ class module_factory const module_key RDIMM_DDR4_REV_1_1; const module_key NVDIMM_DDR4_REV_1_0; const module_key NVDIMM_DDR4_REV_1_1; + const module_key DDIMM_DDR4_REV_0_0; std::map< module_key, std::shared_ptr<T> > iv_decoder_map; @@ -311,12 +314,21 @@ class module_factory // // Rev 1.0 - // NVDIMMs start out life w/the updated general section. + // NVDIMMs start out life w/the updated general section (not a base level). o_map[NVDIMM_DDR4_REV_1_0] = std::make_shared< decoder<DDR4, BASE_CNFG, rev::V1_1> >(iv_target, i_spd_data); // Rev 1.1 // Changes to the NVDIMM module occured, general section remains the same o_map[NVDIMM_DDR4_REV_1_1] = std::make_shared< decoder<DDR4, BASE_CNFG, rev::V1_1> >(iv_target, i_spd_data); + + // + // DDIMMs + // + + // Current emulation level + // Rev 0.0 + // DDIMMs start out life w/the updated general section + o_map[DDIMM_DDR4_REV_0_0] = std::make_shared< decoder<DDR4, BASE_CNFG, rev::V0_0> >(iv_target, i_spd_data); } /// @@ -354,6 +366,15 @@ class module_factory // Changes lrdimm section occured // General section remained the same o_map[LRDIMM_DDR4_REV_1_2] = std::make_shared< decoder<DDR4, LRDIMM_MODULE, rev::V1_2> >(iv_target, i_spd_data); + + // + // DDIMMs + // + + // Current emulation level + // Rev 0.0 + // Life starts out at base revision level + o_map[DDIMM_DDR4_REV_0_0] = std::make_shared< decoder<DDR4, DDIMM_MODULE, rev::V0_0> >(iv_target, i_spd_data); } /// diff --git a/src/import/generic/memory/lib/spd/spd_fields_ddr4.H b/src/import/generic/memory/lib/spd/spd_fields_ddr4.H index ccabc14ce..ac110cb9d 100644 --- a/src/import/generic/memory/lib/spd/spd_fields_ddr4.H +++ b/src/import/generic/memory/lib/spd/spd_fields_ddr4.H @@ -782,6 +782,610 @@ class fields<DDR4, LRDIMM_MODULE> static constexpr mss::field_t<mss::endian::LITTLE> DATA_BUFFER_DFE{156, DB_DFE_START, DB_DFE_LEN}; }; +/// +/// @class fields +/// @brief DDR4 DDIMM module SPD parameters +/// @note DDR4, DDIMM_MODULE specialization +/// +template <> +class fields<DDR4, DDIMM_MODULE> +{ + private: + + enum + { + + // Byte 192: SPD Revision for bytes 192->447 + SPD_REV_BYTE = 192, + SPD_REVISION_START = 0, + SPD_REVISION_LEN = 8, + + // Byte 193: Module Height + MODULE_HEIGHT_BYTE = 193, + MODULE_BASE_HEIGHT_START = 0, + MODULE_BASE_HEIGHT_LEN = 3, + MODULE_HEIGHT_MAX_START = 3, + MODULE_HEIGHT_MAX_LEN = 5, + + // Byte 194: Module Maximum Thickness + MODULE_THICKNESS_BYTE = 194, + MAX_THICKNESS_BACK_START = 0, + MAX_THICKNESS_BACK_LEN = 4, + MAX_THICKNESS_FRONT_START = 4, + MAX_THICKNESS_FRONT_LEN = 4, + + // Byte 195: Reference Raw Card used + REF_RAW_CARD_BYTE = 195, + DESIGN_REV_START = 0, + DESIGN_REV_LEN = 8, + + // Byte 196: DIMM attributes + DIMM_ATTR_BYTE = 196, + NUM_ROWS_START = 4, + NUM_ROWS_LEN = 2, + NUM_BUFFERS_START = 6, + NUM_BUFFERS_LEN = 2, + + // Byte 197: Thermal Heat Spreader Solution + THERMAL_BYTE = 197, + HEAT_SPREADER_SOL_START = 0, + HEAT_SPREADER_SOL_LEN = 1, + HEAT_SPREADER_CHAR_START = 1, + HEAT_SPREADER_CHAR_LEN = 7, + + // Byte 198: DMB Manfacture ID code 1st byte + DMB_MFG_CODE1_BYTE = 198, + CONTINUATION_CODE_START = 0, + CONTINUATION_CODE_LEN = 8, + + // Byte 199: DMB Manfacture ID code 2nd byte + DMB_MFG_CODE2_BYTE = 199, + LAST_NON_ZERO_START = 0, + LAST_NON_ZERO_LEN = 8, + + // Byte 200: DMB Revision Number + DMB_REV_BYTE = 200, + DMB_REV_START = 0, + DMB_REV_LEN = 8, + + // Byte 201: DIMM Module Oranization + DIMM_ORG_BYTE_BYTE = 201, + RANK_MIX_START = 1, + RANK_MIX_LEN = 1, + PACKAGE_RANK_START = 2, + PACKAGE_RANK_LEN = 3, + DATA_WIDTH_START = 5, + DATA_WIDTH_LEN = 3, + + // Byte 202: Memory Channel Bus Width + BUS_WIDTH_BYTE = 202, + NUM_DIMM_CHANNELS_START = 0, + NUM_DIMM_CHANNELS_LEN = 2, + BUS_WIDTH_EXT_START = 2, + BUS_WIDTH_EXT_LEN = 3, + DEVICE_WIDTH_START = 5, + DEVICE_WIDTH_LEN = 3, + + // Byte 203: Module Thermal Sensors + THERMAL_SENSORS_BYTE = 203, + MOD_THERMAL_SENSOR_START = 0, + MOD_THERMAL_SENSOR_LEN = 3, + + // Byte 204: Host Interface Protocols + PROTOCOL_SUPPORT_BYTE = 204, + PROTOCOL_SUPPORT_START = 4, + PROTOCOL_SUPPORT_LEN = 4, + + // Byte 205: Host Interface Speed Supported + SPEED_SUPPORTED_LSB_BYTE = 205, + SPEED_SUPPORTED_LSB_START = 1, + SPEED_SUPPORTED_LSB_LEN = 7, + + // Byte 207: Address Mirroring + ADDRESS_MIRROR_BYTE = 207, + ADDRESS_MIRROR_START = 4, + ADDRESS_MIRROR_LEN = 4, + + // Byte 208: Byte enables LSB + BYTE_ENABLES_LSB_BYTE = 208, + BYTE_ENABLES_LSB_START = 0, + BYTE_ENABLES_LSB_LEN = 8, + + // Byte 209: Byte enables MSB + BYTE_ENABLES_MSB_BYTE = 209, + BYTE_ENABLES_MSB_START = 6, + BYTE_ENABLES_MSB_LEN = 2, + + // Byte 210: Nibble enables LSB0 + NIBBLE_ENABLES_LSB0_BYTE = 210, + NIBBLE_ENABLES_LSB0_START = 0, + NIBBLE_ENABLES_LSB0_LEN = 8, + + // Byte 211: Nibble enables MSB0 + NIBBLE_ENABLES_MSB0_BYTE = 211, + NIBBLE_ENABLES_MSB0_START = 0, + NIBBLE_ENABLES_MSB0_LEN = 8, + + // Byte 212: Nibble enables LSB1 + NIBBLE_ENABLES_LSB1_BYTE = 212, + NIBBLE_ENABLES_LSB1_START = 4, + NIBBLE_ENABLES_LSB1_LEN = 4, + + // Byte 214: Four Rank Mode - DDP Compatibility - TSV 8 High Support - MRAM Support + DDIMM_COMPAT_BYTE = 214, + DDIMM_COMPAT_START = 4, + DDIMM_COMPAT_LEN = 4, + + // Byte 215: Number of P-States + NUM_P_STATES_BYTE = 215, + NUM_P_STATES_START = 4, + NUM_P_STATES_LEN = 4, + + // Byte 216: Spare Device Mapping LSB0 + SPARE_DEVICE_LSB0_BYTE = 216, + SPARE_DEVICE_LSB0_START = 0, + SPARE_DEVICE_LSB0_LEN = 8, + + // Byte 217: Spare Device Mapping MSB0 + SPARE_DEVICE_MSB0_BYTE = 217, + SPARE_DEVICE_MSB0_START = 0, + SPARE_DEVICE_MSB0_LEN = 8, + + // Byte 218: Spare Device Mapping LSB1 + SPARE_DEVICE_LSB1_BYTE = 218, + SPARE_DEVICE_LSB1_START = 4, + SPARE_DEVICE_LSB1_LEN = 4, + + // Byte 220: Host Interface Speed to DDR Interface Speed Ratio + HI_DDR_SPEED_RATIO_BYTE = 220, + HI_DDR_SPEED_RATIO_START = 4, + HI_DDR_SPEED_RATIO_LEN = 4, + + // Byte 224: Voltage VIN_MTG Edge connector + VIN_MGMT_BYTE = 224, + VIN_MGMT_NOMINAL_START = 0, + VIN_MGMT_NOMINAL_LEN = 4, + VIN_MGMT_OPERABLE_START = 4, + VIN_MGMT_OPERABLE_LEN = 2, + VIN_MGMT_ENDURANT_START = 6, + VIN_MGMT_ENDURANT_LEN = 2, + + // Byte 225: Voltage VIN_BULK Edge Connecto + VIN_BULK_BYTE = 225, + VIN_BULK_NOMINAL_START = 0, + VIN_BULK_NOMINAL_LEN = 4, + VIN_BULK_OPERABLE_START = 4, + VIN_BULK_OPERABLE_LEN = 2, + VIN_BULK_ENDURANT_START = 6, + VIN_BULK_ENDURANT_LEN = 2, + + // Byte 226: VDD_Core PMIC0 + VDD_CORE_PMIC0_BYTE = 226, + VDD_CORE_PMIC0_START = 0, + VDD_CORE_PMIC0_LEN = 8, + + // Byte 227: PMIC0 Manfacture ID code 1st byte + PMIC0_MFG_CODE1_BYTE = 227, + PMIC0_CONT_CODE_START = 0, + PMIC0_CONT_CODE_LEN = 8, + + // Byte 228: PMIC0 Manfacture ID code 2nd byte + PMIC0_MFG_CODE2_BYTE = 228, + PMIC0_LAST_NON_ZERO_START = 0, + PMIC0_LAST_NON_ZERO_LEN = 8, + + // Byte 229: PMIC0 Revision Number + PMIC0_REV_BYTE = 229, + PMIC0_REV_START = 0, + PMIC0_REV_LEN = 8, + + // Byte 230: VDD_Core PMIC1 + VDD_CORE_PMIC1_BYTE = 230, + VDD_CORE_PMIC1_START = 0, + VDD_CORE_PMIC1_LEN = 8, + + // Byte 231: PMIC1 Manfacture ID code 1st byte + PMIC1_MFG_CODE1_BYTE = 231, + PMIC1_CONT_CODE_START = 0, + PMIC1_CONT_CODE_LEN = 8, + + // Byte 232: PMIC1 Manfacture ID code 2nd byte + PMIC1_MFG_CODE2_BYTE = 232, + PMIC1_LAST_NON_ZERO_START = 0, + PMIC1_LAST_NON_ZERO_LEN = 8, + + // Byte 233: PMIC1 Revision Number + PMIC1_REV_BYTE = 233, + PMIC1_REV_START = 0, + PMIC1_REV_LEN = 8, + + // Byte 234: PMIC0 SWA Voltage Setting + PMIC0_SWA_VOLT_SET_BYTE = 234, + PMIC0_SWA_VOLT_SET_START = 0, + PMIC0_SWA_VOLT_SET_LEN = 7, + PMIC0_SWA_RANGE_START = 7, + PMIC0_SWA_RANGE_LEN = 1, + + // Byte 235: PMIC0 SWA Voltage Offset + PMIC0_SWA_VOLT_OFF_BYTE = 235, + PMIC0_SWA_VOLT_OFF_START = 0, + PMIC0_SWA_VOLT_OFF_LEN = 7, + PMIC0_SWA_OFF_RANGE_START = 7, + PMIC0_SWA_OFF_RANGE_LEN = 1, + + // Byte 236: PMIC0 SWA Delay Sequence Order + PMIC0_SWA_DELAY_BYTE = 236, + PMIC0_SWA_ORDER_START = 0, + PMIC0_SWA_ORDER_LEN = 4, + + // Byte 237: PMIC0 SWB Voltage Setting + PMIC0_SWB_VOLT_SET_BYTE = 237, + PMIC0_SWB_VOLT_SET_START = 0, + PMIC0_SWB_VOLT_SET_LEN = 7, + PMIC0_SWB_RANGE_START = 7, + PMIC0_SWB_RANGE_LEN = 1, + + // Byte 238: PMIC0 SWB Voltage Offset + PMIC0_SWB_VOLT_OFF_BYTE = 238, + PMIC0_SWB_VOLT_OFF_START = 0, + PMIC0_SWB_VOLT_OFF_LEN = 7, + PMIC0_SWB_OFF_RANGE_START = 7, + PMIC0_SWB_OFF_RANGE_LEN = 1, + + // Byte 239: PMIC0 SWB Delay Sequence Order + PMIC0_SWB_DELAY_BYTE = 239, + PMIC0_SWB_ORDER_START = 0, + PMIC0_SWB_ORDER_LEN = 4, + + // Byte 240: PMIC0 SWC Voltage Setting + PMIC0_SWC_VOLT_SET_BYTE = 240, + PMIC0_SWC_VOLT_SET_START = 0, + PMIC0_SWC_VOLT_SET_LEN = 7, + PMIC0_SWC_RANGE_START = 7, + PMIC0_SWC_RANGE_LEN = 1, + + // Byte 241: PMIC0 SWC Voltage Offset + PMIC0_SWC_VOLT_OFF_BYTE = 241, + PMIC0_SWC_VOLT_OFF_START = 0, + PMIC0_SWC_VOLT_OFF_LEN = 7, + PMIC0_SWC_OFF_RANGE_START = 7, + PMIC0_SWC_OFF_RANGE_LEN = 1, + + // Byte 242: PMIC0 SWC Delay Sequence Order + PMIC0_SWC_DELAY_BYTE = 242, + PMIC0_SWC_ORDER_START = 0, + PMIC0_SWC_ORDER_LEN = 4, + + // Byte 243: PMIC0 SWD Voltage Setting + PMIC0_SWD_VOLT_SET_BYTE = 243, + PMIC0_SWD_VOLT_SET_START = 0, + PMIC0_SWD_VOLT_SET_LEN = 7, + PMIC0_SWD_RANGE_START = 7, + PMIC0_SWD_RANGE_LEN = 1, + + // Byte 244: PMIC0 SWD Voltage Offset + PMIC0_SWD_VOLT_OFF_BYTE = 244, + PMIC0_SWD_VOLT_OFF_START = 0, + PMIC0_SWD_VOLT_OFF_LEN = 7, + PMIC0_SWD_OFF_RANGE_START = 7, + PMIC0_SWD_OFF_RANGE_LEN = 1, + + // Byte 245: PMIC0 SWD Delay Sequence Order + PMIC0_SWD_DELAY_BYTE = 245, + PMIC0_SWD_ORDER_START = 0, + PMIC0_SWD_ORDER_LEN = 4, + + // Byte 246: PMIC0 Phase Combination + PMIC0_PHASE_COMBIN_BYTE = 246, + PMIC0_PHASE_COMBIN_START = 4, + PMIC0_PHASE_COMBIN_LEN = 4, + + // Byte 247: PMIC1 SWA Voltage Setting + PMIC1_SWA_VOLT_SET_BYTE = 247, + PMIC1_SWA_VOLT_SET_START = 0, + PMIC1_SWA_VOLT_SET_LEN = 7, + PMIC1_SWA_RANGE_START = 7, + PMIC1_SWA_RANGE_LEN = 1, + + // Byte 248: PMIC1 SWA Voltage Offset + PMIC1_SWA_VOLT_OFF_BYTE = 248, + PMIC1_SWA_VOLT_OFF_START = 0, + PMIC1_SWA_VOLT_OFF_LEN = 7, + PMIC1_SWA_OFF_RANGE_START = 7, + PMIC1_SWA_OFF_RANGE_LEN = 1, + + // Byte 249: PMIC1 SWA Delay Sequence Order + PMIC1_SWA_DELAY_BYTE = 249, + PMIC1_SWA_ORDER_START = 0, + PMIC1_SWA_ORDER_LEN = 4, + + // Byte 250: PMIC1 SWB Voltage Setting + PMIC1_SWB_VOLT_SET_BYTE = 250, + PMIC1_SWB_VOLT_SET_START = 0, + PMIC1_SWB_VOLT_SET_LEN = 7, + PMIC1_SWB_RANGE_START = 7, + PMIC1_SWB_RANGE_LEN = 1, + + // Byte 251: PMIC1 SWB Voltage Offset + PMIC1_SWB_VOLT_OFF_BYTE = 251, + PMIC1_SWB_VOLT_OFF_START = 0, + PMIC1_SWB_VOLT_OFF_LEN = 7, + PMIC1_SWB_OFF_RANGE_START = 7, + PMIC1_SWB_OFF_RANGE_LEN = 1, + + // Byte 252: PMIC1 SWB Delay Sequence Order + PMIC1_SWB_DELAY_BYTE = 252, + PMIC1_SWB_ORDER_START = 0, + PMIC1_SWB_ORDER_LEN = 4, + + // Byte 253: PMIC1 SWC Voltage Setting + PMIC1_SWC_VOLT_SET_BYTE = 253, + PMIC1_SWC_VOLT_SET_START = 0, + PMIC1_SWC_VOLT_SET_LEN = 7, + PMIC1_SWC_RANGE_START = 7, + PMIC1_SWC_RANGE_LEN = 1, + + // Byte 254: PMIC1 SWC Voltage Offset + PMIC1_SWC_VOLT_OFF_BYTE = 254, + PMIC1_SWC_VOLT_OFF_START = 0, + PMIC1_SWC_VOLT_OFF_LEN = 7, + PMIC1_SWC_OFF_RANGE_START = 7, + PMIC1_SWC_OFF_RANGE_LEN = 1, + + // Byte 255: PMIC1 SWC Delay Sequence Order + PMIC1_SWC_DELAY_BYTE = 255, + PMIC1_SWC_ORDER_START = 0, + PMIC1_SWC_ORDER_LEN = 4, + + // Byte 256: PMIC1 SWD Voltage Setting + PMIC1_SWD_VOLT_SET_BYTE = 256, + PMIC1_SWD_VOLT_SET_START = 0, + PMIC1_SWD_VOLT_SET_LEN = 7, + PMIC1_SWD_RANGE_START = 7, + PMIC1_SWD_RANGE_LEN = 1, + + // Byte 257: PMIC1 SWD Voltage Offset + PMIC1_SWD_VOLT_OFF_BYTE = 257, + PMIC1_SWD_VOLT_OFF_START = 0, + PMIC1_SWD_VOLT_OFF_LEN = 7, + PMIC1_SWD_OFF_RANGE_START = 7, + PMIC1_SWD_OFF_RANGE_LEN = 1, + + // Byte 258: PMIC1 SWD Delay Sequence Order + PMIC1_SWD_DELAY_BYTE = 258, + PMIC1_SWD_ORDER_START = 0, + PMIC1_SWD_ORDER_LEN = 4, + + // Byte 259: PMIC1 Phase Combination + PMIC1_PHASE_COMBIN_BYTE = 259, + PMIC1_PHASE_COMBIN_START = 4, + PMIC1_PHASE_COMBIN_LEN = 4, + }; + + public: + // Syntatic sugar to make member variable declaration easier + using field_t = mss::field_t<mss::endian::LITTLE>; + + // First field - SPD byte + // Second field - start bit + // Third field - bit length + + // Byte 192: SPD Revision for bytes 192->447 + static constexpr field_t SPD_REVISION{SPD_REV_BYTE, SPD_REVISION_START, SPD_REVISION_LEN}; + + // Byte 193: Module Height + static constexpr field_t MODULE_BASE_HEIGHT{MODULE_HEIGHT_BYTE, MODULE_BASE_HEIGHT_START, MODULE_BASE_HEIGHT_LEN}; + static constexpr field_t MODULE_HEIGHT_MAX{MODULE_HEIGHT_BYTE, MODULE_HEIGHT_MAX_START, MODULE_HEIGHT_MAX_LEN}; + + // Byte 194: Module Maximum Thickness + static constexpr field_t MAX_THICKNESS_BACK{MODULE_THICKNESS_BYTE, MAX_THICKNESS_BACK_START, MAX_THICKNESS_BACK_LEN}; + static constexpr field_t MAX_THICKNESS_FRONT{MODULE_THICKNESS_BYTE, MAX_THICKNESS_FRONT_START, MAX_THICKNESS_FRONT_LEN}; + + // Byte 195: Reference Raw Card used + static constexpr field_t DESIGN_REV{REF_RAW_CARD_BYTE, DESIGN_REV_START, DESIGN_REV_LEN}; + + // Byte 196: DIMM attributes + static constexpr field_t NUM_ROWS{DIMM_ATTR_BYTE, NUM_ROWS_START, NUM_ROWS_LEN}; + static constexpr field_t NUM_BUFFERS{DIMM_ATTR_BYTE, NUM_BUFFERS_START, NUM_BUFFERS_LEN}; + + // Byte 197: Thermal Heat Spreader Solution + static constexpr field_t HEAT_SPREADER_SOL{THERMAL_BYTE, HEAT_SPREADER_SOL_START, HEAT_SPREADER_SOL_LEN}; + static constexpr field_t HEAT_SPREADER_CHAR{THERMAL_BYTE, HEAT_SPREADER_CHAR_START, HEAT_SPREADER_CHAR_LEN}; + + // Byte 198: DMB Manfacture ID code 1st byte + static constexpr field_t CONTINUATION_CODE{DMB_MFG_CODE1_BYTE, CONTINUATION_CODE_START, CONTINUATION_CODE_LEN}; + + // Byte 199: DMB Manfacture ID code 2nd byte + static constexpr field_t LAST_NON_ZERO{DMB_MFG_CODE2_BYTE, LAST_NON_ZERO_START, LAST_NON_ZERO_LEN}; + + // Byte 200: DMB Revision Number + static constexpr field_t DMB_REV{DMB_REV_BYTE, DMB_REV_START, DMB_REV_LEN}; + + // Byte 201: DIMM Module Oranization + static constexpr field_t RANK_MIX{DIMM_ORG_BYTE_BYTE, RANK_MIX_START, RANK_MIX_LEN}; + static constexpr field_t PACKAGE_RANK{DIMM_ORG_BYTE_BYTE, PACKAGE_RANK_START, PACKAGE_RANK_LEN}; + static constexpr field_t DATA_WIDTH{DIMM_ORG_BYTE_BYTE, DATA_WIDTH_START, DATA_WIDTH_LEN}; + + // Byte 202: Memory Channel Bus Width + static constexpr field_t NUM_DIMM_CHANNELS{BUS_WIDTH_BYTE, NUM_DIMM_CHANNELS_START, NUM_DIMM_CHANNELS_LEN}; + static constexpr field_t BUS_WIDTH_EXT{BUS_WIDTH_BYTE, BUS_WIDTH_EXT_START, BUS_WIDTH_EXT_LEN}; + static constexpr field_t DEVICE_WIDTH{BUS_WIDTH_BYTE, DEVICE_WIDTH_START, DEVICE_WIDTH_LEN}; + + // Byte 203: Module Thermal Sensors + static constexpr field_t MOD_THERMAL_SENSOR{THERMAL_SENSORS_BYTE, MOD_THERMAL_SENSOR_START, MOD_THERMAL_SENSOR_LEN}; + + // Byte 204: Host Interface Protocols + static constexpr field_t PROTOCOL_SUPPORT{PROTOCOL_SUPPORT_BYTE, PROTOCOL_SUPPORT_START, PROTOCOL_SUPPORT_LEN}; + + // Byte 205: Host Interface Speed Supported + static constexpr field_t SPEED_SUPPORTED_LSB{SPEED_SUPPORTED_LSB_BYTE, SPEED_SUPPORTED_LSB_START, SPEED_SUPPORTED_LSB_LEN}; + + // Byte 207: Address Mirroring + static constexpr field_t ADDRESS_MIRROR{ADDRESS_MIRROR_BYTE, ADDRESS_MIRROR_START, ADDRESS_MIRROR_LEN}; + + // Byte 208: Byte enables LSB + static constexpr field_t BYTE_ENABLES_LSB{BYTE_ENABLES_LSB_BYTE, BYTE_ENABLES_LSB_START, BYTE_ENABLES_LSB_LEN}; + + // Byte 209: Byte enables MSB + static constexpr field_t BYTE_ENABLES_MSB{BYTE_ENABLES_MSB_BYTE, BYTE_ENABLES_MSB_START, BYTE_ENABLES_MSB_LEN}; + + // Byte 210: Nibble enables LSB0 + static constexpr field_t NIBBLE_ENABLES_LSB0{NIBBLE_ENABLES_LSB0_BYTE, NIBBLE_ENABLES_LSB0_START, NIBBLE_ENABLES_LSB0_LEN}; + + // Byte 211: Nibble enables MSB0 + static constexpr field_t NIBBLE_ENABLES_MSB0{NIBBLE_ENABLES_MSB0_BYTE, NIBBLE_ENABLES_MSB0_START, NIBBLE_ENABLES_MSB0_LEN}; + + // Byte 212: Nibble enables LSB1 + static constexpr field_t NIBBLE_ENABLES_LSB1{NIBBLE_ENABLES_LSB1_BYTE, NIBBLE_ENABLES_LSB1_START, NIBBLE_ENABLES_LSB1_LEN}; + + // Byte 214: Four Rank Mode - DDP Compatibility - TSV 8 High Support - MRAM Support + static constexpr field_t DDIMM_COMPAT{DDIMM_COMPAT_BYTE, DDIMM_COMPAT_START, DDIMM_COMPAT_LEN}; + + // Byte 215: Number of P-States + static constexpr field_t NUM_P_STATES{NUM_P_STATES_BYTE, NUM_P_STATES_START, NUM_P_STATES_LEN}; + + // Byte 216: Spare Device Mapping LSB0 + static constexpr field_t SPARE_DEVICE_LSB0{SPARE_DEVICE_LSB0_BYTE, SPARE_DEVICE_LSB0_START, SPARE_DEVICE_LSB0_LEN}; + + // Byte 217: Spare Device Mapping MSB0 + static constexpr field_t SPARE_DEVICE_MSB0{SPARE_DEVICE_MSB0_BYTE, SPARE_DEVICE_MSB0_START, SPARE_DEVICE_MSB0_LEN}; + + // Byte 218: Spare Device Mapping LSB1 + static constexpr field_t SPARE_DEVICE_LSB1{SPARE_DEVICE_LSB1_BYTE, SPARE_DEVICE_LSB1_START, SPARE_DEVICE_LSB1_LEN}; + + // Byte 220: Host Interface Speed to DDR Interface Speed Ratio + static constexpr field_t HI_DDR_SPEED_RATIO{HI_DDR_SPEED_RATIO_BYTE, HI_DDR_SPEED_RATIO_START, HI_DDR_SPEED_RATIO_LEN}; + + // Byte 224: Voltage VIN_MTG Edge connector + static constexpr field_t VIN_MGMT_NOMINAL{VIN_MGMT_BYTE, VIN_MGMT_NOMINAL_START, VIN_MGMT_NOMINAL_LEN}; + static constexpr field_t VIN_MGMT_OPERABLE{VIN_MGMT_BYTE, VIN_MGMT_OPERABLE_START, VIN_MGMT_OPERABLE_LEN}; + static constexpr field_t VIN_MGMT_ENDURANT{VIN_MGMT_BYTE, VIN_MGMT_ENDURANT_START, VIN_MGMT_ENDURANT_LEN}; + + // Byte 225: Voltage VIN_BULK Edge Connecto + static constexpr field_t VIN_BULK_NOMINAL{VIN_BULK_BYTE, VIN_BULK_NOMINAL_START, VIN_BULK_NOMINAL_LEN}; + static constexpr field_t VIN_BULK_OPERABLE{VIN_BULK_BYTE, VIN_BULK_OPERABLE_START, VIN_BULK_OPERABLE_LEN}; + static constexpr field_t VIN_BULK_ENDURANT{VIN_BULK_BYTE, VIN_BULK_ENDURANT_START, VIN_BULK_ENDURANT_LEN}; + + // Byte 226: VDD_Core PMIC0 + static constexpr field_t VDD_CORE_PMIC0{VDD_CORE_PMIC0_BYTE, VDD_CORE_PMIC0_START, VDD_CORE_PMIC0_LEN}; + + // Byte 227: PMIC0 Manfacture ID code 1st byte + static constexpr field_t PMIC0_CONT_CODE{PMIC0_MFG_CODE1_BYTE, PMIC0_CONT_CODE_START, PMIC0_CONT_CODE_LEN}; + + // Byte 228: PMIC0 Manfacture ID code 2nd byte + static constexpr field_t PMIC0_LAST_NON_ZERO{PMIC0_MFG_CODE2_BYTE, PMIC0_LAST_NON_ZERO_START, PMIC0_LAST_NON_ZERO_LEN}; + + // Byte 229: PMIC0 Revision Number + static constexpr field_t PMIC0_REV{PMIC0_REV_BYTE, PMIC0_REV_START, PMIC0_REV_LEN}; + + // Byte 230: VDD_Core PMIC1 + static constexpr field_t VDD_CORE_PMIC1{VDD_CORE_PMIC1_BYTE, VDD_CORE_PMIC1_START, VDD_CORE_PMIC1_LEN}; + + // Byte 231: PMIC1 Manfacture ID code 1st byte + static constexpr field_t PMIC1_CONT_CODE{PMIC1_MFG_CODE1_BYTE, PMIC1_CONT_CODE_START, PMIC1_CONT_CODE_LEN}; + + // Byte 232: PMIC1 Manfacture ID code 2nd byte + static constexpr field_t PMIC1_LAST_NON_ZERO{PMIC1_MFG_CODE2_BYTE, PMIC1_LAST_NON_ZERO_START, PMIC1_LAST_NON_ZERO_LEN}; + + // Byte 233: PMIC1 Revision Number + static constexpr field_t PMIC1_REV{PMIC1_REV_BYTE, PMIC1_REV_START, PMIC1_REV_LEN}; + + // Byte 234: PMIC0 SWA Voltage Setting + static constexpr field_t PMIC0_SWA_VOLT_SET{PMIC0_SWA_VOLT_SET_BYTE, PMIC0_SWA_VOLT_SET_START, PMIC0_SWA_VOLT_SET_LEN}; + static constexpr field_t PMIC0_SWA_RANGE{PMIC0_SWA_VOLT_SET_BYTE, PMIC0_SWA_RANGE_START, PMIC0_SWA_RANGE_LEN}; + + // Byte 235: PMIC0 SWA Voltage Offset + static constexpr field_t PMIC0_SWA_VOLT_OFF{PMIC0_SWA_VOLT_OFF_BYTE, PMIC0_SWA_VOLT_OFF_START, PMIC0_SWA_VOLT_OFF_LEN}; + static constexpr field_t PMIC0_SWA_OFF_RANGE{PMIC0_SWA_VOLT_OFF_BYTE, PMIC0_SWA_OFF_RANGE_START, PMIC0_SWA_OFF_RANGE_LEN}; + + // Byte 236: PMIC0 SWA Delay Sequence Order + static constexpr field_t PMIC0_SWA_ORDER{PMIC0_SWA_DELAY_BYTE, PMIC0_SWA_ORDER_START, PMIC0_SWA_ORDER_LEN}; + + // Byte 237: PMIC0 SWB Voltage Setting + static constexpr field_t PMIC0_SWB_VOLT_SET{PMIC0_SWB_VOLT_SET_BYTE, PMIC0_SWB_VOLT_SET_START, PMIC0_SWB_VOLT_SET_LEN}; + static constexpr field_t PMIC0_SWB_RANGE{PMIC0_SWB_VOLT_SET_BYTE, PMIC0_SWB_RANGE_START, PMIC0_SWB_RANGE_LEN}; + + // Byte 238: PMIC0 SWB Voltage Offset + static constexpr field_t PMIC0_SWB_VOLT_OFF{PMIC0_SWB_VOLT_OFF_BYTE, PMIC0_SWB_VOLT_OFF_START, PMIC0_SWB_VOLT_OFF_LEN}; + static constexpr field_t PMIC0_SWB_OFF_RANGE{PMIC0_SWB_VOLT_OFF_BYTE, PMIC0_SWB_OFF_RANGE_START, PMIC0_SWB_OFF_RANGE_LEN}; + + // Byte 239: PMIC0 SWB Delay Sequence Order + static constexpr field_t PMIC0_SWB_ORDER{PMIC0_SWB_DELAY_BYTE, PMIC0_SWB_ORDER_START, PMIC0_SWB_ORDER_LEN}; + + // Byte 240: PMIC0 SWC Voltage Setting + static constexpr field_t PMIC0_SWC_VOLT_SET{PMIC0_SWC_VOLT_SET_BYTE, PMIC0_SWC_VOLT_SET_START, PMIC0_SWC_VOLT_SET_LEN}; + static constexpr field_t PMIC0_SWC_RANGE{PMIC0_SWC_VOLT_SET_BYTE, PMIC0_SWC_RANGE_START, PMIC0_SWC_RANGE_LEN}; + + // Byte 241: PMIC0 SWC Voltage Offset + static constexpr field_t PMIC0_SWC_VOLT_OFF{PMIC0_SWC_VOLT_OFF_BYTE, PMIC0_SWC_VOLT_OFF_START, PMIC0_SWC_VOLT_OFF_LEN}; + static constexpr field_t PMIC0_SWC_OFF_RANGE{PMIC0_SWC_VOLT_OFF_BYTE, PMIC0_SWC_OFF_RANGE_START, PMIC0_SWC_OFF_RANGE_LEN}; + + // Byte 242: PMIC0 SWC Delay Sequence Order + static constexpr field_t PMIC0_SWC_ORDER{PMIC0_SWC_DELAY_BYTE, PMIC0_SWC_ORDER_START, PMIC0_SWC_ORDER_LEN}; + + // Byte 243: PMIC0 SWD Voltage Setting + static constexpr field_t PMIC0_SWD_VOLT_SET{PMIC0_SWD_VOLT_SET_BYTE, PMIC0_SWD_VOLT_SET_START, PMIC0_SWD_VOLT_SET_LEN}; + static constexpr field_t PMIC0_SWD_RANGE{PMIC0_SWD_VOLT_SET_BYTE, PMIC0_SWD_RANGE_START, PMIC0_SWD_RANGE_LEN}; + + // Byte 244: PMIC0 SWD Voltage Offset + static constexpr field_t PMIC0_SWD_VOLT_OFF{PMIC0_SWD_VOLT_OFF_BYTE, PMIC0_SWD_VOLT_OFF_START, PMIC0_SWD_VOLT_OFF_LEN}; + static constexpr field_t PMIC0_SWD_OFF_RANGE{PMIC0_SWD_VOLT_OFF_BYTE, PMIC0_SWD_OFF_RANGE_START, PMIC0_SWD_OFF_RANGE_LEN}; + + // Byte 245: PMIC0 SWD Delay Sequence Order + static constexpr field_t PMIC0_SWD_ORDER{PMIC0_SWD_DELAY_BYTE, PMIC0_SWD_ORDER_START, PMIC0_SWD_ORDER_LEN}; + + // Byte 246: PMIC0 Phase Combination + static constexpr field_t PMIC0_PHASE_COMBIN{PMIC0_PHASE_COMBIN_BYTE, PMIC0_PHASE_COMBIN_START, PMIC0_PHASE_COMBIN_LEN}; + + // Byte 247: PMIC1 SWA Voltage Setting + static constexpr field_t PMIC1_SWA_VOLT_SET{PMIC1_SWA_VOLT_SET_BYTE, PMIC1_SWA_VOLT_SET_START, PMIC1_SWA_VOLT_SET_LEN}; + static constexpr field_t PMIC1_SWA_RANGE{PMIC1_SWA_VOLT_SET_BYTE, PMIC1_SWA_RANGE_START, PMIC1_SWA_RANGE_LEN}; + + // Byte 248: PMIC1 SWA Voltage Offset + static constexpr field_t PMIC1_SWA_VOLT_OFF{PMIC1_SWA_VOLT_OFF_BYTE, PMIC1_SWA_VOLT_OFF_START, PMIC1_SWA_VOLT_OFF_LEN}; + static constexpr field_t PMIC1_SWA_OFF_RANGE{PMIC1_SWA_VOLT_OFF_BYTE, PMIC1_SWA_OFF_RANGE_START, PMIC1_SWA_OFF_RANGE_LEN}; + + // Byte 249: PMIC1 SWA Delay Sequence Order + static constexpr field_t PMIC1_SWA_ORDER{PMIC1_SWA_DELAY_BYTE, PMIC1_SWA_ORDER_START, PMIC1_SWA_ORDER_LEN}; + + // Byte 250: PMIC1 SWB Voltage Setting + static constexpr field_t PMIC1_SWB_VOLT_SET{PMIC1_SWB_VOLT_SET_BYTE, PMIC1_SWB_VOLT_SET_START, PMIC1_SWB_VOLT_SET_LEN}; + static constexpr field_t PMIC1_SWB_RANGE{PMIC1_SWB_VOLT_SET_BYTE, PMIC1_SWB_RANGE_START, PMIC1_SWB_RANGE_LEN}; + + // Byte 251: PMIC1 SWB Voltage Offset + static constexpr field_t PMIC1_SWB_VOLT_OFF{PMIC1_SWB_VOLT_OFF_BYTE, PMIC1_SWB_VOLT_OFF_START, PMIC1_SWB_VOLT_OFF_LEN}; + static constexpr field_t PMIC1_SWB_OFF_RANGE{PMIC1_SWB_VOLT_OFF_BYTE, PMIC1_SWB_OFF_RANGE_START, PMIC1_SWB_OFF_RANGE_LEN}; + + // Byte 252: PMIC1 SWB Delay Sequence Order + static constexpr field_t PMIC1_SWB_ORDER{PMIC1_SWB_DELAY_BYTE, PMIC1_SWB_ORDER_START, PMIC1_SWB_ORDER_LEN}; + + // Byte 253: PMIC1 SWC Voltage Setting + static constexpr field_t PMIC1_SWC_VOLT_SET{PMIC1_SWC_VOLT_SET_BYTE, PMIC1_SWC_VOLT_SET_START, PMIC1_SWC_VOLT_SET_LEN}; + static constexpr field_t PMIC1_SWC_RANGE{PMIC1_SWC_VOLT_SET_BYTE, PMIC1_SWC_RANGE_START, PMIC1_SWC_RANGE_LEN}; + + // Byte 254: PMIC1 SWC Voltage Offset + static constexpr field_t PMIC1_SWC_VOLT_OFF{PMIC1_SWC_VOLT_OFF_BYTE, PMIC1_SWC_VOLT_OFF_START, PMIC1_SWC_VOLT_OFF_LEN}; + static constexpr field_t PMIC1_SWC_OFF_RANGE{PMIC1_SWC_VOLT_OFF_BYTE, PMIC1_SWC_OFF_RANGE_START, PMIC1_SWC_OFF_RANGE_LEN}; + + // Byte 255: PMIC1 SWC Delay Sequence Order + static constexpr field_t PMIC1_SWC_ORDER{PMIC1_SWC_DELAY_BYTE, PMIC1_SWC_ORDER_START, PMIC1_SWC_ORDER_LEN}; + + // Byte 256: PMIC1 SWD Voltage Setting + static constexpr field_t PMIC1_SWD_VOLT_SET{PMIC1_SWD_VOLT_SET_BYTE, PMIC1_SWD_VOLT_SET_START, PMIC1_SWD_VOLT_SET_LEN}; + static constexpr field_t PMIC1_SWD_RANGE{PMIC1_SWD_VOLT_SET_BYTE, PMIC1_SWD_RANGE_START, PMIC1_SWD_RANGE_LEN}; + + // Byte 257: PMIC1 SWD Voltage Offset + static constexpr field_t PMIC1_SWD_VOLT_OFF{PMIC1_SWD_VOLT_OFF_BYTE, PMIC1_SWD_VOLT_OFF_START, PMIC1_SWD_VOLT_OFF_LEN}; + static constexpr field_t PMIC1_SWD_OFF_RANGE{PMIC1_SWD_VOLT_OFF_BYTE, PMIC1_SWD_OFF_RANGE_START, PMIC1_SWD_OFF_RANGE_LEN}; + + // Byte 258: PMIC1 SWD Delay Sequence Order + static constexpr field_t PMIC1_SWD_ORDER{PMIC1_SWD_DELAY_BYTE, PMIC1_SWD_ORDER_START, PMIC1_SWD_ORDER_LEN}; + + // Byte 259: PMIC1 Phase Combination + static constexpr field_t PMIC1_PHASE_COMBIN{PMIC1_PHASE_COMBIN_BYTE, PMIC1_PHASE_COMBIN_START, PMIC1_PHASE_COMBIN_LEN}; + +}; + }// spd }// mss diff --git a/src/import/generic/memory/lib/spd/spd_traits_ddr4.H b/src/import/generic/memory/lib/spd/spd_traits_ddr4.H index 59ea61fab..c26ca2082 100644 --- a/src/import/generic/memory/lib/spd/spd_traits_ddr4.H +++ b/src/import/generic/memory/lib/spd/spd_traits_ddr4.H @@ -3686,6 +3686,1716 @@ class readerTraits< fields<DDR4, LRDIMM_MODULE>::DATA_BUFFER_GAIN_ADJUST, R > using COMPARISON_OP = std::less_equal<T>; }; +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note SPD_REVISION field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::SPD_REVISION, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0xff; + static constexpr const char* FIELD_STR = "SPD revision DDIMM"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note MODULE_BASE_HEIGHT field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::MODULE_BASE_HEIGHT, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x04; + static constexpr const char* FIELD_STR = "Module Base Height"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note MODULE_HEIGHT_MAX field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::MODULE_HEIGHT_MAX, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x1f; + static constexpr const char* FIELD_STR = "Module Maximum Height"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note MAX_THICKNESS_BACK field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::MAX_THICKNESS_BACK, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x0f; + static constexpr const char* FIELD_STR = "Module thickness back"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note MAX_THICKNESS_FRONT field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::MAX_THICKNESS_FRONT, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x0f; + static constexpr const char* FIELD_STR = "Module thickness front"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note DESIGN_REV field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::DESIGN_REV, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0xbf; + static constexpr const char* FIELD_STR = "Design Revision"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note NUM_ROWS field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::NUM_ROWS, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x03; + static constexpr const char* FIELD_STR = "Num DRAM rows on DIMM"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note NUM_BUFFERS field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::NUM_BUFFERS, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x03; + static constexpr const char* FIELD_STR = "Num buffers on DIMM"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note HEAT_SPREADER_SOL field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::HEAT_SPREADER_SOL, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x01; + static constexpr const char* FIELD_STR = "Heat Spreader Solution"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note HEAT_SPREADER_CHAR field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::HEAT_SPREADER_CHAR, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x7f; + static constexpr const char* FIELD_STR = "Heat speader thermal characteristics"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note CONTINUATION_CODE field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::CONTINUATION_CODE, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0xff; + static constexpr const char* FIELD_STR = "DMB Mfg ID code - byte 1"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note LAST_NON_ZERO field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::LAST_NON_ZERO, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0xff; + static constexpr const char* FIELD_STR = "DMB Mfg ID code - byte 2"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note DMB_REV field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::DMB_REV, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0xff; + static constexpr const char* FIELD_STR = "DMB Revision Number"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note RANK_MIX field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::RANK_MIX, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x01; + static constexpr const char* FIELD_STR = "Rank Mix"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PACKAGE_RANK field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PACKAGE_RANK, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x07; + static constexpr const char* FIELD_STR = "Package ranks per channel"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note DATA_WIDTH field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::DATA_WIDTH, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x03; + static constexpr const char* FIELD_STR = "DRAM device width per channel"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note NUM_DIMM_CHANNELS field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::NUM_DIMM_CHANNELS, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x01; + static constexpr const char* FIELD_STR = "Channels per DIMM"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note BUS_WIDTH_EXT field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::BUS_WIDTH_EXT, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x03; + static constexpr const char* FIELD_STR = "Bus width extension"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note DEVICE_WIDTH field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::DEVICE_WIDTH, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x04; + static constexpr const char* FIELD_STR = "DRAM device width per channel"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note MOD_THERMAL_SENSOR field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::MOD_THERMAL_SENSOR, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x03; + static constexpr const char* FIELD_STR = "Thermal Sensors"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PROTOCOL_SUPPORT field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PROTOCOL_SUPPORT, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x0f; + static constexpr const char* FIELD_STR = "Host Interface Protocols"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note SPEED_SUPPORTED_LSB field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::SPEED_SUPPORTED_LSB, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x7f; + static constexpr const char* FIELD_STR = "Host interface speed supported LSB"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note ADDRESS_MIRROR field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::ADDRESS_MIRROR, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x0f; + static constexpr const char* FIELD_STR = "address mirror"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note BYTE_ENABLES_LSB field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::BYTE_ENABLES_LSB, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0xff; + static constexpr const char* FIELD_STR = "Byte enables LSB"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note BYTE_ENABLES_MSB field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::BYTE_ENABLES_MSB, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x03; + static constexpr const char* FIELD_STR = "Byte enables MSB"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note NIBBLE_ENABLES_LSB0 field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::NIBBLE_ENABLES_LSB0, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0xff; + static constexpr const char* FIELD_STR = "Nibble enables LSB0"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note NIBBLE_ENABLES_MSB0 field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::NIBBLE_ENABLES_MSB0, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0xff; + static constexpr const char* FIELD_STR = "Nibble enables MSB0"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note NIBBLE_ENABLES_LSB1 field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::NIBBLE_ENABLES_LSB1, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x0f; + static constexpr const char* FIELD_STR = "Nibble enables LSB1"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note DDIMM_COMPAT field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::DDIMM_COMPAT, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x0f; + static constexpr const char* FIELD_STR = "DDIMM compatability"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note NUM_P_STATES field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::NUM_P_STATES, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x04; + static constexpr const char* FIELD_STR = "Number of P-States"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note SPARE_DEVICE_LSB0 field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::SPARE_DEVICE_LSB0, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0xff; + static constexpr const char* FIELD_STR = "Spare device LSB0"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note SPARE_DEVICE_MSB0 field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::SPARE_DEVICE_MSB0, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0xff; + static constexpr const char* FIELD_STR = "Spare device MSB0"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note SPARE_DEVICE_LSB1 field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::SPARE_DEVICE_LSB1, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x0f; + static constexpr const char* FIELD_STR = "Spare device LSB1"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note HI_DDR_SPEED_RATIO field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::HI_DDR_SPEED_RATIO, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x07; + static constexpr const char* FIELD_STR = "Host to DDR speed ratio"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note VIN_MGMT_NOMINAL field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::VIN_MGMT_NOMINAL, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x00; + static constexpr const char* FIELD_STR = "VIN_MGMT Nominal"; + + template <typename T> + using COMPARISON_OP = std::equal_to<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note VIN_MGMT_OPERABLE field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::VIN_MGMT_OPERABLE, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x00; + static constexpr const char* FIELD_STR = "VIN_MGMT Operable"; + + template <typename T> + using COMPARISON_OP = std::equal_to<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note VIN_MGMT_ENDURANT field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::VIN_MGMT_ENDURANT, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x00; + static constexpr const char* FIELD_STR = "VIN_MGMT Endurant"; + + template <typename T> + using COMPARISON_OP = std::equal_to<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note VIN_BULK_NOMINAL field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::VIN_BULK_NOMINAL, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x00; + static constexpr const char* FIELD_STR = "VIN_BULK Nominal"; + + template <typename T> + using COMPARISON_OP = std::equal_to<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note VIN_BULK_OPERABLE field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::VIN_BULK_OPERABLE, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x00; + static constexpr const char* FIELD_STR = "VIN_BULK Operable"; + + template <typename T> + using COMPARISON_OP = std::equal_to<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note VIN_BULK_ENDURANT field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::VIN_BULK_ENDURANT, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x00; + static constexpr const char* FIELD_STR = "VIN_BULK Endurant"; + + template <typename T> + using COMPARISON_OP = std::equal_to<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note VDD_CORE_PMIC0 field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::VDD_CORE_PMIC0, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0xff; + static constexpr const char* FIELD_STR = "VDD_Core PMIC0"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC0_CONT_CODE field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC0_CONT_CODE, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0xff; + static constexpr const char* FIELD_STR = "PMIC0 Mfg ID code - byte 1"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC0_LAST_NON_ZERO field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC0_LAST_NON_ZERO, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0xff; + static constexpr const char* FIELD_STR = "PMIC0 Mfg ID code - byte 2"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC0_REV field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC0_REV, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0xff; + static constexpr const char* FIELD_STR = "PMIC0 Revision Number"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note VDD_CORE_PMIC1 field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::VDD_CORE_PMIC1, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0xff; + static constexpr const char* FIELD_STR = "VDD_Core PMIC1"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC1_CONT_CODE field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC1_CONT_CODE, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0xff; + static constexpr const char* FIELD_STR = "PMIC1 Mfg ID code - byte 1"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC1_LAST_NON_ZERO field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC1_LAST_NON_ZERO, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0xff; + static constexpr const char* FIELD_STR = "PMIC1 Mfg ID code - byte 2"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC1_REV field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC1_REV, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0xff; + static constexpr const char* FIELD_STR = "PMIC1 Revision Number"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC0_SWA_VOLT_SET field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC0_SWA_VOLT_SET, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x7f; + static constexpr const char* FIELD_STR = "PMIC0 SWA voltage settting"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC0_SWA_RANGE field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC0_SWA_RANGE, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x01; + static constexpr const char* FIELD_STR = "PMIC0 SWA Voltage Range"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC0_SWA_VOLT_OFF field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC0_SWA_VOLT_OFF, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x3f; + static constexpr const char* FIELD_STR = "PMIC0 SWA voltage offset"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC0_SWA_OFF_RANGE field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC0_SWA_OFF_RANGE, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x01; + static constexpr const char* FIELD_STR = "PMIC0 SWA Voltage Offset Range"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC0_SWA_ORDER field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC0_SWA_ORDER, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x08; + static constexpr const char* FIELD_STR = "PMIC0 SWA Sequence Order"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC0_SWB_VOLT_SET field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC0_SWB_VOLT_SET, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x7f; + static constexpr const char* FIELD_STR = "PMIC0 SWB voltage settting"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC0_SWB_RANGE field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC0_SWB_RANGE, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x01; + static constexpr const char* FIELD_STR = "PMIC0 SWB Voltage Range"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC0_SWB_VOLT_OFF field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC0_SWB_VOLT_OFF, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x3f; + static constexpr const char* FIELD_STR = "PMIC0 SWB voltage offset"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC0_SWB_OFF_RANGE field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC0_SWB_OFF_RANGE, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x01; + static constexpr const char* FIELD_STR = "PMIC0 SWB Voltage Offset Range"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC0_SWB_ORDER field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC0_SWB_ORDER, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x08; + static constexpr const char* FIELD_STR = "PMIC0 SWB Sequence Order"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC0_SWC_VOLT_SET field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC0_SWC_VOLT_SET, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x7f; + static constexpr const char* FIELD_STR = "PMIC0 SWC voltage settting"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC0_SWC_RANGE field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC0_SWC_RANGE, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x01; + static constexpr const char* FIELD_STR = "PMIC0 SWC Voltage Range"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC0_SWC_VOLT_OFF field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC0_SWC_VOLT_OFF, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x3f; + static constexpr const char* FIELD_STR = "PMIC0 SWC voltage offset"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC0_SWC_OFF_RANGE field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC0_SWC_OFF_RANGE, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x01; + static constexpr const char* FIELD_STR = "PMIC0 SWC Voltage Offset Range"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC0_SWC_ORDER field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC0_SWC_ORDER, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x08; + static constexpr const char* FIELD_STR = "PMIC0 SWC Sequence Order"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC0_SWD_VOLT_SET field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC0_SWD_VOLT_SET, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x7f; + static constexpr const char* FIELD_STR = "PMIC0 SWD voltage settting"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC0_SWD_RANGE field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC0_SWD_RANGE, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x01; + static constexpr const char* FIELD_STR = "PMIC0 SWD Voltage Range"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC0_SWD_VOLT_OFF field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC0_SWD_VOLT_OFF, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x3f; + static constexpr const char* FIELD_STR = "PMIC0 SWD voltage offset"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC0_SWD_OFF_RANGE field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC0_SWD_OFF_RANGE, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x01; + static constexpr const char* FIELD_STR = "PMIC0 SWD Voltage Offset Range"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC0_SWD_ORDER field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC0_SWD_ORDER, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x08; + static constexpr const char* FIELD_STR = "PMIC0 SWD Sequence Order"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC0_PHASE_COMBIN field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC0_PHASE_COMBIN, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x01; + static constexpr const char* FIELD_STR = "PMIC0 phase combin"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC1_SWA_VOLT_SET field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC1_SWA_VOLT_SET, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x7f; + static constexpr const char* FIELD_STR = "PMIC1 SWA voltage settting"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC1_SWA_RANGE field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC1_SWA_RANGE, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x01; + static constexpr const char* FIELD_STR = "PMIC1 SWA Voltage Range"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC1_SWA_VOLT_OFF field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC1_SWA_VOLT_OFF, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x3f; + static constexpr const char* FIELD_STR = "PMIC1 SWA voltage offset"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC1_SWA_OFF_RANGE field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC1_SWA_OFF_RANGE, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x01; + static constexpr const char* FIELD_STR = "PMIC1 SWA Voltage Offset Range"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC1_SWA_ORDER field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC1_SWA_ORDER, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x08; + static constexpr const char* FIELD_STR = "PMIC1 SWA Sequence Order"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC1_SWB_VOLT_SET field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC1_SWB_VOLT_SET, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x7f; + static constexpr const char* FIELD_STR = "PMIC1 SWB voltage settting"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC1_SWB_RANGE field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC1_SWB_RANGE, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x01; + static constexpr const char* FIELD_STR = "PMIC1 SWB Voltage Range"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC1_SWB_VOLT_OFF field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC1_SWB_VOLT_OFF, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x3f; + static constexpr const char* FIELD_STR = "PMIC1 SWB voltage offset"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC1_SWB_OFF_RANGE field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC1_SWB_OFF_RANGE, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x01; + static constexpr const char* FIELD_STR = "PMIC1 SWB Voltage Offset Range"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC1_SWB_ORDER field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC1_SWB_ORDER, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x08; + static constexpr const char* FIELD_STR = "PMIC1 SWB Sequence Order"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC1_SWC_VOLT_SET field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC1_SWC_VOLT_SET, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x7f; + static constexpr const char* FIELD_STR = "PMIC1 SWC voltage settting"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC1_SWC_RANGE field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC1_SWC_RANGE, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x01; + static constexpr const char* FIELD_STR = "PMIC1 SWC Voltage Range"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC1_SWC_VOLT_OFF field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC1_SWC_VOLT_OFF, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x3f; + static constexpr const char* FIELD_STR = "PMIC1 SWC voltage offset"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC1_SWC_OFF_RANGE field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC1_SWC_OFF_RANGE, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x01; + static constexpr const char* FIELD_STR = "PMIC1 SWC Voltage Offset Range"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC1_SWC_ORDER field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC1_SWC_ORDER, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x08; + static constexpr const char* FIELD_STR = "PMIC1 SWC Sequence Order"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC1_SWD_VOLT_SET field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC1_SWD_VOLT_SET, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x7f; + static constexpr const char* FIELD_STR = "PMIC1 SWD voltage settting"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC1_SWD_RANGE field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC1_SWD_RANGE, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x01; + static constexpr const char* FIELD_STR = "PMIC1 SWD Voltage Range"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC1_SWD_VOLT_OFF field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC1_SWD_VOLT_OFF, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x3f; + static constexpr const char* FIELD_STR = "PMIC1 SWD voltage offset"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC1_SWD_OFF_RANGE field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC1_SWD_OFF_RANGE, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x01; + static constexpr const char* FIELD_STR = "PMIC1 SWD Voltage Offset Range"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC1_SWD_ORDER field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC1_SWD_ORDER, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x08; + static constexpr const char* FIELD_STR = "PMIC1 SWD Sequence Order"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + +/// +/// @class readerTraits +/// @brief trait structure to hold static SPD information +/// @tparam R the revision of the SPD field +/// @note PMIC1_PHASE_COMBIN field specialization +/// @note valid for all revs +/// +template< rev R > +class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC1_PHASE_COMBIN, R > +{ + public: + + static constexpr size_t COMPARISON_VAL = 0x01; + static constexpr const char* FIELD_STR = "PMIC1 phase combin"; + + template <typename T> + using COMPARISON_OP = std::less_equal<T>; +}; + }// spd }// mss diff --git a/src/import/generic/memory/lib/utils/mss_field.H b/src/import/generic/memory/lib/utils/mss_field.H index 44afb1e59..e22b2fa47 100644 --- a/src/import/generic/memory/lib/utils/mss_field.H +++ b/src/import/generic/memory/lib/utils/mss_field.H @@ -179,6 +179,9 @@ inline fapi2::ReturnCode get_field(const fapi2::Target<T>& i_target, const FFDC i_ffdc_codes, OT& o_value) { + // Initializes the output value to 0, that way, we won't have any stale data in o_value + o_value = 0; + const size_t BYTE = F.get_byte(i_data); FAPI_ASSERT( BYTE < i_data.size(), diff --git a/src/import/generic/memory/lib/utils/shared/mss_generic_consts.H b/src/import/generic/memory/lib/utils/shared/mss_generic_consts.H index c9049b7f6..d017933bb 100644 --- a/src/import/generic/memory/lib/utils/shared/mss_generic_consts.H +++ b/src/import/generic/memory/lib/utils/shared/mss_generic_consts.H @@ -136,6 +136,9 @@ enum generic_ffdc_codes SET_HYBRID_MEDIA = 0x1028, SET_MRANKS = 0x1029, SET_DIMM_RANKS_CNFG = 0x1039, + + // SPD fields function codes + DDIMM_RAWCARD_DECODE = 0x103a, }; /// @@ -193,6 +196,7 @@ namespace spd /// enum rev : uint8_t { + V0_0 = 0x00, ///< represents Rev 0.0 V1_0 = 0x10, ///< represents Rev 1.0 V1_1 = 0x11, ///< represents Rev 1.1 V1_2 = 0x12, ///< represents Rev 1.2 @@ -202,6 +206,7 @@ enum rev : uint8_t GEN_SEC_MAX = V1_1, RDIMM_MAX = V1_1, LRDIMM_MAX = V1_2, + DDIMM_MAX = V1_0, }; /// @@ -215,6 +220,7 @@ enum parameters RDIMM_MODULE, LRDIMM_MODULE, NVDIMM_MODULE, + DDIMM_MODULE, }; /// @@ -234,6 +240,7 @@ enum dimm_type { RDIMM = 0b0001, LRDIMM = 0b0100, + DDIMM = 0b1010, }; enum guard_band : uint16_t |
