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authorMark Pizzutillo <Mark.Pizzutillo@ibm.com>2019-08-02 15:13:43 -0500
committerChristian R Geddes <crgeddes@us.ibm.com>2019-08-11 19:09:42 -0500
commitbca5cf6af8c609a93816e5a8f2fb08b6ab62bbe8 (patch)
tree0fdab4847e7aabefc93673d528ed1f9fc6ee468a /src/import
parent2870f766e37b2c07ef7c993c7588d716af165723 (diff)
downloadtalos-hostboot-bca5cf6af8c609a93816e5a8f2fb08b6ab62bbe8.tar.gz
talos-hostboot-bca5cf6af8c609a93816e5a8f2fb08b6ab62bbe8.zip
Create workaround for gemini MENTERP register bug
Bypass writes and reads to the menterp register to avoid FW bug Change-Id: I2dfc96d0408b16a22280d16e3edea3900468cfc0 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/81615 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: Christian R Geddes <crgeddes@us.ibm.com> Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/81632 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Diffstat (limited to 'src/import')
-rw-r--r--src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_omi_setup.C57
-rw-r--r--src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/workarounds/exp_omi_workarounds.C18
-rw-r--r--src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/workarounds/exp_omi_workarounds.H10
-rw-r--r--src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml17
4 files changed, 77 insertions, 25 deletions
diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_omi_setup.C b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_omi_setup.C
index 6aabffd9b..0581cb8cf 100644
--- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_omi_setup.C
+++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_omi_setup.C
@@ -64,7 +64,7 @@ extern "C"
bool l_workaround_required = false;
std::vector<uint8_t> l_boot_config_data;
uint8_t l_dl_layer_boot_mode = fapi2::ENUM_ATTR_MSS_OCMB_EXP_BOOT_CONFIG_DL_LAYER_BOOT_MODE_NON_DL_TRAINING;
-
+ uint8_t l_gem_menterp_workaround = 0;
// Gets the data setup
FAPI_TRY(mss::exp::omi::train::setup_fw_boot_config(i_target, l_boot_config_data));
@@ -75,31 +75,38 @@ extern "C"
// Note: This does not kick off OMI training
FAPI_TRY(mss::exp::i2c::boot_config(i_target, l_boot_config_data));
- // Gets the configuration information from attributes
- FAPI_TRY(mss::enterprise_mode(i_target, l_is_enterprise));
- FAPI_TRY(mss::half_dimm_mode(i_target, l_is_half_dimm));
- FAPI_TRY(mss::attr::get_mss_omi_edpl_disable(l_edpl_disable));
-
- // Prints out the data
- FAPI_INF("%s is %s enterprise mode, and %s-DIMM mode", mss::c_str(i_target), l_is_enterprise ? "" : "non",
- l_is_half_dimm ? "half" : "full");
-
- // Sets up the register
- mss::exp::omi::set_enterprise_set_bit(l_data, l_is_enterprise);
- mss::exp::omi::set_half_dimm_mode(l_data, l_is_half_dimm);
-
- // Writes the data to the register
- FAPI_TRY(mss::exp::omi::write_enterprise_config(i_target, l_data));
+ FAPI_TRY(mss::exp::workarounds::omi::gem_menterp(i_target, l_gem_menterp_workaround));
- // Checks that the chip is configured correctly
- FAPI_TRY(mss::exp::omi::read_enterprise_config(i_target, l_data));
- FAPI_TRY(mss::exp::omi::check_enterprise_mode(i_target, l_is_enterprise, l_data));
-
- // Set the EDPL according the attribute
- FAPI_TRY(mss::exp::omi::read_dlx_config1(i_target, dlx_config1_data));
- mss::exp::omi::set_edpl_enable_bit(dlx_config1_data, l_edpl_disable);
- FAPI_TRY(mss::exp::omi::write_dlx_config1(i_target, dlx_config1_data));
- FAPI_INF("%s EDPL enable: %s", mss::c_str(i_target), (l_edpl_disable ? "false" : "true"));
+ // If no workaround, we can perform menterp reads/writes (explorer)
+ // If workaround (gem). we need to bypass menterp. Can also bypass dlx_config1 since it's a noop
+ if (!l_gem_menterp_workaround)
+ {
+ // Gets the configuration information from attributes
+ FAPI_TRY(mss::enterprise_mode(i_target, l_is_enterprise));
+ FAPI_TRY(mss::half_dimm_mode(i_target, l_is_half_dimm));
+ FAPI_TRY(mss::attr::get_mss_omi_edpl_disable(l_edpl_disable));
+
+ // Prints out the data
+ FAPI_INF("%s is %s enterprise mode, and %s-DIMM mode", mss::c_str(i_target), l_is_enterprise ? "" : "non",
+ l_is_half_dimm ? "half" : "full");
+
+ // Sets up the register
+ mss::exp::omi::set_enterprise_set_bit(l_data, l_is_enterprise);
+ mss::exp::omi::set_half_dimm_mode(l_data, l_is_half_dimm);
+
+ // Writes the data to the register
+ FAPI_TRY(mss::exp::omi::write_enterprise_config(i_target, l_data));
+
+ // Checks that the chip is configured correctly
+ FAPI_TRY(mss::exp::omi::read_enterprise_config(i_target, l_data));
+ FAPI_TRY(mss::exp::omi::check_enterprise_mode(i_target, l_is_enterprise, l_data));
+
+ // Set the EDPL according the attribute
+ FAPI_TRY(mss::exp::omi::read_dlx_config1(i_target, dlx_config1_data));
+ mss::exp::omi::set_edpl_enable_bit(dlx_config1_data, l_edpl_disable);
+ FAPI_TRY(mss::exp::omi::write_dlx_config1(i_target, dlx_config1_data));
+ FAPI_INF("%s EDPL enable: %s", mss::c_str(i_target), l_edpl_disable ? "false" : "true");
+ }
// Run the workaround if it's needed
FAPI_TRY(mss::exp::workarounds::omi::is_prbs_ocmb_required(i_target, l_workaround_required));
diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/workarounds/exp_omi_workarounds.C b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/workarounds/exp_omi_workarounds.C
index 8c1225f0f..e12d3381c 100644
--- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/workarounds/exp_omi_workarounds.C
+++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/workarounds/exp_omi_workarounds.C
@@ -119,6 +119,24 @@ fapi_try_exit:
return fapi2::current_err;
}
+///
+/// @brief Determine if we need to bypass MENTERP register reads/writes
+///
+/// @param[in] i_target OCMB chip
+/// @param[out] o_workaround true (1) for gemini, else false (0)
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff success, else error code
+///
+fapi2::ReturnCode gem_menterp(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP> i_target,
+ uint8_t& o_workaround)
+{
+ o_workaround = 0;
+ FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_GEMINI_MENTERP_WORKAROUND, i_target, o_workaround),
+ "Error getting ATTR_CHIP_EC_FEATURE_GEMINI_MENTERP_WORKAROUND");
+
+fapi_try_exit:
+ return fapi2::current_err;
+}
+
} // omi
} // workarounds
} // exp
diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/workarounds/exp_omi_workarounds.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/workarounds/exp_omi_workarounds.H
index 7a41c76e1..39a77497c 100644
--- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/workarounds/exp_omi_workarounds.H
+++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/workarounds/exp_omi_workarounds.H
@@ -69,6 +69,16 @@ fapi2::ReturnCode prbs_ocmb(
const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP> i_ocmb_chip,
const uint8_t i_dl_x4_backoff_en);
+///
+/// @brief Determine if we need to bypass MENTERP register reads/writes
+///
+/// @param[in] i_target OCMB chip
+/// @param[out] o_workaround true (1) for gemini, else false (0)
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff success, else error code
+///
+fapi2::ReturnCode gem_menterp(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP> i_target,
+ uint8_t& o_workaround);
+
} // omi
} // workarounds
} // exp
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
index 827388bd0..e2ae5c55b 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
@@ -9025,4 +9025,21 @@
</chipEcFeature>
</attribute>
+ <attribute>
+ <id>ATTR_CHIP_EC_FEATURE_GEMINI_MENTERP_WORKAROUND</id>
+ <targetType>TARGET_TYPE_OCMB_CHIP</targetType>
+ <description>
+ Bypass MENTERP register read/writes on gemini due to FW bug
+ </description>
+ <chipEcFeature>
+ <chip>
+ <name>ENUM_ATTR_NAME_GEMINI</name>
+ <ec>
+ <value>0x10</value>
+ <test>GREATER_THAN_OR_EQUAL</test>
+ </ec>
+ </chip>
+ </chipEcFeature>
+ </attribute>
+
</attributes>
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