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authorcrgeddes <crgeddes@us.ibm.com>2017-05-24 13:24:59 -0500
committerChristian R. Geddes <crgeddes@us.ibm.com>2017-05-25 10:22:15 -0400
commitb0ebbd785a2357f2be093178c92bc9b59cd3530b (patch)
treeb354309edfced5859e03dcd3f90cdd11efa7b728 /src/import
parente0a1b4a4f6d9bd7927fddcc508d24f9218dfbb13 (diff)
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Reapply "Use query_cache_access_state to verify EQ scomable in.."
In corequad_init we cannot rely on hwas states because targets are not always scommable even though they are functional. This adds a check to ensure a ex is scommable before we attempt to scom it. This had to be removed because we were incorrectly querying the core EQ state. That issue is now resolved Change-Id: I4a3c516b5063e1a898f2ebe7f0da68cfb965b737 CQ: SW388687 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40927 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40934 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import')
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_pm_corequad_init.C21
1 files changed, 21 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_corequad_init.C b/src/import/chips/p9/procedures/hwp/pm/p9_pm_corequad_init.C
index d80ed81ea..afe7e3544 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_corequad_init.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_corequad_init.C
@@ -74,6 +74,7 @@
// Includes
// -----------------------------------------------------------------------------
#include <p9_pm_corequad_init.H>
+#include <p9_query_cache_access_state.H>
// -----------------------------------------------------------------------------
// Constant definitions
@@ -339,11 +340,16 @@ fapi2::ReturnCode pm_corequad_reset(
FAPI_IMP("Entering pm_corequad_reset...");
fapi2::buffer<uint64_t> l_data64;
+ fapi2::ReturnCode l_rc;
uint8_t l_chpltNumber = 0;
uint64_t l_address = 0;
uint32_t l_errMask = 0;
uint32_t l_firMask = 0;
uint32_t l_pollCount = 20;
+ bool l_l2_is_scanable = false;
+ bool l_l3_is_scanable = false;
+ bool l_l2_is_scomable = false;
+ bool l_l3_is_scomable = false;
auto l_eqChiplets = i_target.getChildren<fapi2::TARGET_TYPE_EQ>
(fapi2::TARGET_STATE_FUNCTIONAL);
@@ -392,6 +398,21 @@ fapi2::ReturnCode pm_corequad_reset(
FAPI_TRY(fapi2::putScom(l_quad_chplt, l_address, l_data64),
"ERROR: Failed to clear QUAD PPM ERROR");
+ //Cannot always rely on HWAS state, during MPIPL attr are not
+ //accurate, must use query_cache_access state prior to scomming
+ //ex targets
+ FAPI_EXEC_HWP(l_rc, p9_query_cache_access_state, l_quad_chplt,
+ l_l2_is_scomable, l_l2_is_scanable,
+ l_l3_is_scomable, l_l3_is_scanable);
+ FAPI_TRY(l_rc, "ERROR: failed to query cache access state for EQ %d",
+ l_chpltNumber);
+
+ if(!l_l3_is_scomable)
+ {
+ //Skip all of the scoms for this EQ if its not scommable
+ continue;
+ }
+
auto l_exChiplets = l_quad_chplt.getChildren<fapi2::TARGET_TYPE_EX>
(fapi2::TARGET_STATE_FUNCTIONAL);
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