Changes related to RTT VPD settings

  Incorporate RTT_NOM
  Incorporate RTT_PARK
  Incorporate RTT_WR

Change-Id: I84c852601a885998bf35a3ad5286d8e63c1b764a
Depends-On: Ibdc07d3cbf517d8bd3f5192218205e3680f7eeb6
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28021
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com>
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28022
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

8 files changed, 12 insertions, 471 deletions

diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs01.C b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs01.C
index b780aa898..8e32f68c0 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs01.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs01.C
@@ -66,7 +66,7 @@ mrs01_data::mrs01_data( const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
     FAPI_TRY( mss::eff_dram_ron(i_target, iv_odic) );
     FAPI_TRY( mss::eff_dram_al(i_target, iv_additive_latency) );
     FAPI_TRY( mss::eff_dram_wr_lvl_enable(i_target, iv_wl_enable) );
-    FAPI_TRY( mss::eff_dram_rtt_nom(i_target, &(iv_rtt_nom[0])) );
+    FAPI_TRY( mss::vpd_mt_dram_rtt_nom(i_target, &(iv_rtt_nom[0])) );
     FAPI_TRY( mss::eff_dram_tdqs(i_target, iv_tdqs) );
     FAPI_TRY( mss::eff_dram_output_buffer(i_target, iv_qoff) );
 
@@ -120,7 +120,7 @@ fapi2::ReturnCode mrs01(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
     // Indexed by denominator. So, if RQZ is 240, and you have OHM240, then you're looking
     // for index 1. So this doesn't correspond directly with the table in the JEDEC spec,
     // as that's not in "denominator order."
-    //                                      0  RQZ/1  RQZ/2  RQZ/3  RQZ/4  RQZ/5  RQZ/6  RQZ/7
+    //                                   0  RQZ/1  RQZ/2  RQZ/3  RQZ/4  RQZ/5  RQZ/6  RQZ/7
     constexpr uint8_t rtt_nom_map[8] = { 0, 0b100, 0b010, 0b110, 0b001, 0b101, 0b011, 0b111 };
 
     size_t l_rtt_nom_index = 0;
@@ -143,7 +143,7 @@ fapi2::ReturnCode mrs01(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
 
     // We have to be careful about 0
     l_rtt_nom_index = (i_data.iv_rtt_nom[mss::index(i_rank)] == 0) ?
-                      0 : fapi2::ENUM_ATTR_EFF_DRAM_RTT_NOM_OHM240 / i_data.iv_rtt_nom[mss::index(i_rank)];
+                      0 : fapi2::ENUM_ATTR_MSS_VPD_MT_DRAM_RTT_NOM_OHM240 / i_data.iv_rtt_nom[mss::index(i_rank)];
 
     // Map from RTT_NOM array to the value in the map
     l_rtt_nom_buffer = rtt_nom_map[l_rtt_nom_index];
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs02.C b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs02.C
index af2c2a361..ff88068ca 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs02.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs02.C
@@ -61,7 +61,7 @@ mrs02_data::mrs02_data( const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
 {
     FAPI_TRY( mss::eff_dram_lpasr(i_target, iv_lpasr) );
     FAPI_TRY( mss::eff_dram_cwl(i_target, iv_cwl) );
-    FAPI_TRY( mss::eff_dram_rtt_wr(i_target, &(iv_dram_rtt_wr[0])) );
+    FAPI_TRY( mss::vpd_mt_dram_rtt_wr(i_target, &(iv_dram_rtt_wr[0])) );
     FAPI_TRY( mss::eff_write_crc(i_target, iv_write_crc) );
 
     o_rc = fapi2::FAPI2_RC_SUCCESS;
@@ -128,26 +128,22 @@ fapi2::ReturnCode mrs02(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
 
     switch (i_data.iv_dram_rtt_wr[i_rank])
     {
-        case fapi2::ENUM_ATTR_EFF_DRAM_RTT_WR_DISABLE:
+        case fapi2::ENUM_ATTR_MSS_VPD_MT_DRAM_RTT_WR_DISABLE:
             l_rtt_wr_buffer = 0b000;
             break;
 
-        case fapi2::ENUM_ATTR_EFF_DRAM_RTT_WR_HIGHZ:
+        case fapi2::ENUM_ATTR_MSS_VPD_MT_DRAM_RTT_WR_HIGHZ:
             l_rtt_wr_buffer = 0b011;
             break;
 
-        case fapi2::ENUM_ATTR_EFF_DRAM_RTT_WR_OHM240:
+        case fapi2::ENUM_ATTR_MSS_VPD_MT_DRAM_RTT_WR_OHM240:
             l_rtt_wr_buffer = 0b010;
             break;
 
-        case fapi2::ENUM_ATTR_EFF_DRAM_RTT_WR_OHM120:
+        case fapi2::ENUM_ATTR_MSS_VPD_MT_DRAM_RTT_WR_OHM120:
             l_rtt_wr_buffer = 0b001;
             break;
 
-        case fapi2::ENUM_ATTR_EFF_DRAM_RTT_WR_OHM60:
-            l_rtt_wr_buffer = 0b100;
-            break;
-
         default:
             FAPI_ERR("unknown RTT_WR 0x%x (%s rank %d), dynamic odt off",
                      i_data.iv_dram_rtt_wr[i_rank], mss::c_str(i_target), i_rank);
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs05.C b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs05.C
index 4f0aa32e4..5a6f963d6 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs05.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs05.C
@@ -68,7 +68,7 @@ mrs05_data::mrs05_data( const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
     FAPI_TRY( mss::eff_crc_error_clear(i_target, iv_crc_error_clear) );
     FAPI_TRY( mss::eff_ca_parity_error_status(i_target, iv_ca_parity_error_status) );
     FAPI_TRY( mss::eff_odt_input_buff(i_target, iv_odt_input_buffer) );
-    FAPI_TRY( mss::eff_rtt_park(i_target, &(iv_rtt_park[0])) );
+    FAPI_TRY( mss::vpd_mt_dram_rtt_park(i_target, &(iv_rtt_park[0])) );
     FAPI_TRY( mss::eff_ca_parity(i_target, iv_ca_parity) );
     FAPI_TRY( mss::eff_data_mask(i_target, iv_data_mask) );
     FAPI_TRY( mss::eff_write_dbi(i_target, iv_write_dbi) );
@@ -152,9 +152,9 @@ fapi2::ReturnCode mrs05(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
 
     // We have to be careful about 0
     l_rtt_park_index = (i_data.iv_rtt_park[mss::index(i_rank)] == 0) ?
-                       0 : fapi2::ENUM_ATTR_EFF_RTT_PARK_240OHM / i_data.iv_rtt_park[mss::index(i_rank)];
+                       0 : fapi2::ENUM_ATTR_MSS_VPD_MT_DRAM_RTT_PARK_240OHM / i_data.iv_rtt_park[mss::index(i_rank)];
 
-    // Map from RTT_NOM array to the value in the map
+    // Map from RTT_PARK array to the value in the map
     l_rtt_park_buffer = rtt_park_map[l_rtt_park_index];
 
     FAPI_INF("MR5 rank %d attributes: CAPL: 0x%x(0x%x), CRC_EC: 0x%x, CA_PES: 0x%x, ODT_IB: 0x%x "
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.C b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.C
index f04d6c98c..adc3427e9 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.C
@@ -853,38 +853,6 @@ fapi_try_exit:
 }
 
 ///
-/// @brief Determines & sets effective config for RTT Park
-/// @param[in] i_target FAPI2 target
-/// @return fapi2::FAPI2_RC_SUCCESS if okay
-///
-fapi2::ReturnCode eff_config::rtt_park(const fapi2::Target<TARGET_TYPE_DIMM>& i_target)
-{
-    // TK - RIT skeleton. Need to finish - AAM
-    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
-
-    // Attribute to set num dimm ranks is a pre-requisite
-    uint8_t l_attrs_rtt_park[PORTS_PER_MCS][MAX_DIMM_PER_PORT][MAX_RANK_PER_DIMM] = {};
-    std::vector< uint64_t > l_ranks;
-
-    const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) );
-    const auto l_dimm_num = index(i_target);
-
-    FAPI_TRY( eff_rtt_park(l_mcs, &l_attrs_rtt_park[0][0][0]) );
-    FAPI_TRY( mss::ranks(i_target, l_ranks) );
-
-    for(const auto& l_rank : l_ranks)
-    {
-        l_attrs_rtt_park[l_port_num][l_dimm_num][index(l_rank)] = 0x00;
-    }
-
-    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_RTT_PARK, l_mcs, l_attrs_rtt_park) );
-
-fapi_try_exit:
-    return fapi2::current_err;
-}
-
-
-///
 /// @brief Determines & sets effective config for DIMM RC00
 /// @param[in] i_target FAPI2 target
 /// @return fapi2::FAPI2_RC_SUCCESS if okay
@@ -1875,37 +1843,6 @@ fapi_try_exit:
 }
 
 ///
-/// @brief Determines & sets effective config for RTT NOM
-/// @param[in] i_target FAPI2 target
-/// @return fapi2::FAPI2_RC_SUCCESS if okay
-///
-fapi2::ReturnCode eff_config::rtt_nom(const fapi2::Target<TARGET_TYPE_DIMM>& i_target)
-{
-    // TK - RIT skeleton. Need to finish - AAM
-    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
-
-    uint8_t l_attrs_rtt_nom[PORTS_PER_MCS][MAX_DIMM_PER_PORT][MAX_RANK_PER_DIMM] = {};
-    std::vector< uint64_t > l_ranks;
-
-    const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) );
-    const auto l_dimm_num = index(i_target);
-
-    FAPI_TRY( mss::ranks(i_target, l_ranks) );
-    FAPI_TRY( eff_dram_rtt_nom(l_mcs, &l_attrs_rtt_nom[0][0][0]) );
-
-    for(const auto& l_rank : l_ranks)
-    {
-        l_attrs_rtt_nom[l_port_num][l_dimm_num][index(l_rank)] = 0x28;
-    }
-
-    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_RTT_NOM, l_mcs, l_attrs_rtt_nom),
-              "Failed setting attribute for BL");
-
-fapi_try_exit:
-    return fapi2::current_err;
-}
-
-///
 /// @brief Determines & sets effective config for Write Level Enable
 /// @param[in] i_target FAPI2 target
 /// @return fapi2::FAPI2_RC_SUCCESS if okay
@@ -2791,38 +2728,6 @@ fapi_try_exit:
 }
 
 ///
-/// @brief Determines & sets effective config for RTT Write
-/// @param[in] i_target FAPI2 target
-/// @return fapi2::FAPI2_RC_SUCCESS if okay
-///
-fapi2::ReturnCode eff_config::rtt_write(const fapi2::Target<TARGET_TYPE_DIMM>& i_target)
-{
-    // TK - RIT skeleton. Need to finish - AAM
-    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
-
-    uint8_t l_attrs_rtt_wr[PORTS_PER_MCS][MAX_DIMM_PER_PORT][MAX_RANK_PER_DIMM] = {};
-    std::vector< uint64_t > l_ranks;
-
-    const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) );
-    const auto l_dimm_num = index(i_target);
-
-    // Attribute to set num dimm ranks is a pre-requisite
-    FAPI_TRY( eff_dram_rtt_wr(l_mcs, &l_attrs_rtt_wr[0][0][0]) );
-    FAPI_TRY( mss::ranks(i_target, l_ranks) );
-
-    for(const auto& l_rank : l_ranks)
-    {
-        l_attrs_rtt_wr[l_port_num][l_dimm_num][index(l_rank)] = 0x00;
-    }
-
-    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_RTT_WR, l_mcs, l_attrs_rtt_wr),
-              "Failed setting attribute for BL");
-
-fapi_try_exit:
-    return fapi2::current_err;
-}
-
-///
 /// @brief Determines & sets effective config for ZQ Calibration
 /// @param[in] i_target FAPI2 target
 /// @return fapi2::FAPI2_RC_SUCCESS if okay
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.H b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.H
index 5f5c200be..b124e5707 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.H
@@ -208,13 +208,6 @@ class eff_config
         fapi2::ReturnCode dram_tccd_l(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
 
         ///
-        /// @brief Determines & sets effective config for RTT Park
-        /// @param[in] i_target FAPI2 target
-        /// @return fapi2::FAPI2_RC_SUCCESS if okay
-        ///
-        fapi2::ReturnCode rtt_park(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
-
-        ///
         /// @brief Determines & sets effective config for DIMM RC00
         /// @param[in] i_target FAPI2 target
         /// @return fapi2::FAPI2_RC_SUCCESS if okay
@@ -470,13 +463,6 @@ class eff_config
         fapi2::ReturnCode dram_ron(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
 
         ///
-        /// @brief Determines & sets effective config for RTT NOM
-        /// @param[in] i_target FAPI2 target
-        /// @return fapi2::FAPI2_RC_SUCCESS if okay
-        ///
-        fapi2::ReturnCode rtt_nom(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
-
-        ///
         /// @brief Determines & sets effective config for Write Level Enable
         /// @param[in] i_target FAPI2 target
         /// @return fapi2::FAPI2_RC_SUCCESS if okay
@@ -681,13 +667,6 @@ class eff_config
         fapi2::ReturnCode write_crc(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
 
         ///
-        /// @brief Determines & sets effective config for RTT Write
-        /// @param[in] i_target FAPI2 target
-        /// @return fapi2::FAPI2_RC_SUCCESS if okay
-        ///
-        fapi2::ReturnCode rtt_write(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
-
-        ///
         /// @brief Determines & sets effective config for ZQ Calibration
         /// @param[in] i_target FAPI2 target
         /// @return fapi2::FAPI2_RC_SUCCESS if okay
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H
index 2307b0f4a..a062eb316 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H
@@ -8952,102 +8952,6 @@ fapi_try_exit:
 }
 
 ///
-/// @brief ATTR_EFF_RTT_PARK getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM>
-/// @param[out] uint8_t* memory to store the value
-/// @note Generated by gen_accessors.pl generateParameters (A)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RTT_Park value. This is for DDR4 MRS5. Computed in mss_eff_cnfg. Each memory
-/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware
-/// notes:
-/// none
-///
-inline fapi2::ReturnCode eff_rtt_park(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t* o_array)
-{
-    if (o_array == nullptr)
-    {
-        FAPI_ERR("nullptr passed to attribute accessor %s", __func__);
-        return fapi2::FAPI2_RC_INVALID_PARAMETER;
-    }
-
-    uint8_t l_value[2][2][4];
-    auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
-    auto l_mcs = l_mca.getParent<fapi2::TARGET_TYPE_MCS>();
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_RTT_PARK, l_mcs, l_value) );
-    memcpy(o_array, &(l_value[mss::index(l_mca)][mss::index(i_target)][0]), 4);
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_RTT_PARK: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_RTT_PARK getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA>
-/// @param[out] uint8_t* memory to store the value
-/// @note Generated by gen_accessors.pl generateParameters (B)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RTT_Park value. This is for DDR4 MRS5. Computed in mss_eff_cnfg. Each memory
-/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware
-/// notes:
-/// none
-///
-inline fapi2::ReturnCode eff_rtt_park(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array)
-{
-    if (o_array == nullptr)
-    {
-        FAPI_ERR("nullptr passed to attribute accessor %s", __func__);
-        return fapi2::FAPI2_RC_INVALID_PARAMETER;
-    }
-
-    uint8_t l_value[2][2][4];
-    auto l_mcs = i_target.getParent<fapi2::TARGET_TYPE_MCS>();
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_RTT_PARK, l_mcs, l_value) );
-    memcpy(o_array, &(l_value[mss::index(i_target)][0]), 8);
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_RTT_PARK: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_RTT_PARK getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS>
-/// @param[out] uint8_t* memory to store the value
-/// @note Generated by gen_accessors.pl generateParameters (C)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RTT_Park value. This is for DDR4 MRS5. Computed in mss_eff_cnfg. Each memory
-/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware
-/// notes:
-/// none
-///
-inline fapi2::ReturnCode eff_rtt_park(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
-{
-    if (o_array == nullptr)
-    {
-        FAPI_ERR("nullptr passed to attribute accessor %s", __func__);
-        return fapi2::FAPI2_RC_INVALID_PARAMETER;
-    }
-
-    uint8_t l_value[2][2][4];
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_RTT_PARK, i_target, l_value) );
-    memcpy(o_array, &l_value, 16);
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_RTT_PARK: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
 /// @brief ATTR_EFF_CA_PARITY getter
 /// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA>
 /// @param[out] ref to the value uint8_t
@@ -16513,186 +16417,6 @@ fapi_try_exit:
 }
 
 ///
-/// @brief ATTR_EFF_DRAM_RTT_NOM getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM>
-/// @param[out] uint8_t* memory to store the value
-/// @note Generated by gen_accessors.pl generateParameters (A)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  DRAM Rtt_Nom. Used in various locations and comes from the MT keyword of the
-/// VPD
-///
-inline fapi2::ReturnCode eff_dram_rtt_nom(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t* o_array)
-{
-    if (o_array == nullptr)
-    {
-        FAPI_ERR("nullptr passed to attribute accessor %s", __func__);
-        return fapi2::FAPI2_RC_INVALID_PARAMETER;
-    }
-
-    uint8_t l_value[2][2][4];
-    auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
-    auto l_mcs = l_mca.getParent<fapi2::TARGET_TYPE_MCS>();
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_RTT_NOM, l_mcs, l_value) );
-    memcpy(o_array, &(l_value[mss::index(l_mca)][mss::index(i_target)][0]), 4);
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_DRAM_RTT_NOM: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_DRAM_RTT_NOM getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA>
-/// @param[out] uint8_t* memory to store the value
-/// @note Generated by gen_accessors.pl generateParameters (B)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  DRAM Rtt_Nom. Used in various locations and comes from the MT keyword of the
-/// VPD
-///
-inline fapi2::ReturnCode eff_dram_rtt_nom(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array)
-{
-    if (o_array == nullptr)
-    {
-        FAPI_ERR("nullptr passed to attribute accessor %s", __func__);
-        return fapi2::FAPI2_RC_INVALID_PARAMETER;
-    }
-
-    uint8_t l_value[2][2][4];
-    auto l_mcs = i_target.getParent<fapi2::TARGET_TYPE_MCS>();
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_RTT_NOM, l_mcs, l_value) );
-    memcpy(o_array, &(l_value[mss::index(i_target)][0]), 8);
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_DRAM_RTT_NOM: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_DRAM_RTT_NOM getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS>
-/// @param[out] uint8_t* memory to store the value
-/// @note Generated by gen_accessors.pl generateParameters (C)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  DRAM Rtt_Nom. Used in various locations and comes from the MT keyword of the
-/// VPD
-///
-inline fapi2::ReturnCode eff_dram_rtt_nom(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
-{
-    if (o_array == nullptr)
-    {
-        FAPI_ERR("nullptr passed to attribute accessor %s", __func__);
-        return fapi2::FAPI2_RC_INVALID_PARAMETER;
-    }
-
-    uint8_t l_value[2][2][4];
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_RTT_NOM, i_target, l_value) );
-    memcpy(o_array, &l_value, 16);
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_DRAM_RTT_NOM: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_DRAM_RTT_WR getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM>
-/// @param[out] uint8_t* memory to store the value
-/// @note Generated by gen_accessors.pl generateParameters (A)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  DRAM Rtt_WR. Used in various locations and comes from the MT keyword of the
-/// VPD
-///
-inline fapi2::ReturnCode eff_dram_rtt_wr(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t* o_array)
-{
-    if (o_array == nullptr)
-    {
-        FAPI_ERR("nullptr passed to attribute accessor %s", __func__);
-        return fapi2::FAPI2_RC_INVALID_PARAMETER;
-    }
-
-    uint8_t l_value[2][2][4];
-    auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
-    auto l_mcs = l_mca.getParent<fapi2::TARGET_TYPE_MCS>();
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_RTT_WR, l_mcs, l_value) );
-    memcpy(o_array, &(l_value[mss::index(l_mca)][mss::index(i_target)][0]), 4);
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_DRAM_RTT_WR: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_DRAM_RTT_WR getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA>
-/// @param[out] uint8_t* memory to store the value
-/// @note Generated by gen_accessors.pl generateParameters (B)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  DRAM Rtt_WR. Used in various locations and comes from the MT keyword of the
-/// VPD
-///
-inline fapi2::ReturnCode eff_dram_rtt_wr(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array)
-{
-    if (o_array == nullptr)
-    {
-        FAPI_ERR("nullptr passed to attribute accessor %s", __func__);
-        return fapi2::FAPI2_RC_INVALID_PARAMETER;
-    }
-
-    uint8_t l_value[2][2][4];
-    auto l_mcs = i_target.getParent<fapi2::TARGET_TYPE_MCS>();
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_RTT_WR, l_mcs, l_value) );
-    memcpy(o_array, &(l_value[mss::index(i_target)][0]), 8);
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_DRAM_RTT_WR: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_DRAM_RTT_WR getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS>
-/// @param[out] uint8_t* memory to store the value
-/// @note Generated by gen_accessors.pl generateParameters (C)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  DRAM Rtt_WR. Used in various locations and comes from the MT keyword of the
-/// VPD
-///
-inline fapi2::ReturnCode eff_dram_rtt_wr(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
-{
-    if (o_array == nullptr)
-    {
-        FAPI_ERR("nullptr passed to attribute accessor %s", __func__);
-        return fapi2::FAPI2_RC_INVALID_PARAMETER;
-    }
-
-    uint8_t l_value[2][2][4];
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_RTT_WR, i_target, l_value) );
-    memcpy(o_array, &l_value, 16);
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_DRAM_RTT_WR: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
 /// @brief ATTR_VPD_GPO getter
 /// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA>
 /// @param[out] ref to the value uint8_t
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config.C
index 4d21b0434..64bba4d09 100644
--- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config.C
+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config.C
@@ -93,7 +93,6 @@ fapi2::ReturnCode p9_mss_eff_config( const fapi2::Target<fapi2::TARGET_TYPE_MCS>
         FAPI_TRY( l_eff_config.dram_dqs_time(l_dimm) );
         FAPI_TRY( l_eff_config.dram_tccd_l(l_dimm) );
         FAPI_TRY( l_eff_config.data_mask(l_dimm) );
-        FAPI_TRY( l_eff_config.rtt_park(l_dimm) );
         FAPI_TRY( l_eff_config.dimm_rc00(l_dimm) );
         FAPI_TRY( l_eff_config.dimm_rc01(l_dimm) );
         FAPI_TRY( l_eff_config.dimm_rc02(l_dimm) );
@@ -130,7 +129,6 @@ fapi2::ReturnCode p9_mss_eff_config( const fapi2::Target<fapi2::TARGET_TYPE_MCS>
         FAPI_TRY( l_eff_config.dll_enable(l_dimm) );
         FAPI_TRY( l_eff_config.dll_reset(l_dimm) );
         FAPI_TRY( l_eff_config.dram_ron(l_dimm) );
-        FAPI_TRY( l_eff_config.rtt_nom(l_dimm) );
         FAPI_TRY( l_eff_config.write_level_enable(l_dimm) );
         FAPI_TRY( l_eff_config.output_buffer(l_dimm) );
         FAPI_TRY( l_eff_config.vref_dq_train_value(l_dimm) );
@@ -159,7 +157,6 @@ fapi2::ReturnCode p9_mss_eff_config( const fapi2::Target<fapi2::TARGET_TYPE_MCS>
         FAPI_TRY( l_eff_config.mpr_page(l_dimm) );
         FAPI_TRY( l_eff_config.mpr_mode(l_dimm) );
         FAPI_TRY( l_eff_config.write_crc(l_dimm) );
-        FAPI_TRY( l_eff_config.rtt_write(l_dimm) );
         FAPI_TRY( l_eff_config.zqcal_interval(l_dimm) );
         FAPI_TRY( l_eff_config.memcal_interval(l_dimm) );
         FAPI_TRY( l_eff_config.dram_trp(l_dimm) );
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml
index 54fdfcb6c..7b982580c 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml
@@ -61,7 +61,7 @@
        <targetType>TARGET_TYPE_MCBIST</targetType>
         <description>
           FOR LAB USE ONLY: Frequency override of this memory channel in MT/s
-	  comprising of up to three DIMMs.
+          comprising of up to three DIMMs.
           Set by config file or an attribute writing program.
           Consumed by mss_freq.
           The default of AUTO means mss_freq will find the best frequencies given the DIMMs plugged in and other rules.
@@ -1808,24 +1808,6 @@
     </attribute>
 
     <attribute>
-        <id>ATTR_EFF_RTT_PARK</id>
-        <targetType>TARGET_TYPE_MCS</targetType>
-        <description>
-            RTT_Park value. This is for DDR4 MRS5.
-            Computed in mss_eff_cnfg. Each memory channel will have a value.
-            creator: mss_eff_cnfg
-            consumer: various
-            firmware notes: none
-        </description>
-        <initToZero></initToZero>
-        <valueType>uint8</valueType>
-        <enum>DISABLE = 0, 60OHM = 60, 120OHM = 120, 40OHM = 40, 240OHM = 240, 48OHM = 48, 80OHM = 80, 34OHM = 34</enum>
-        <writeable/>
-        <array> 2 2 4</array>
-        <mssAccessorName>eff_rtt_park</mssAccessorName>
-    </attribute>
-
-    <attribute>
         <id>ATTR_EFF_CA_PARITY</id>
         <targetType>TARGET_TYPE_MCS</targetType>
         <description>
@@ -2962,48 +2944,6 @@
     </attribute>
 
     <attribute>
-        <id>ATTR_EFF_DRAM_RTT_NOM</id>
-        <targetType>TARGET_TYPE_MCS</targetType>
-        <description>
-            DRAM Rtt_Nom.
-            Used in various locations and comes from the MT keyword of the VPD
-        </description>
-        <initToZero></initToZero>
-        <valueType>uint8</valueType>
-        <enum>
-          DISABLE = 0,
-          OHM20 = 20,
-          OHM30 = 30,
-          OHM34 = 34,
-          OHM40 = 40,
-          OHM48 = 48,
-          OHM60 = 60,
-          OHM80 = 80,
-          OHM120 = 120,
-          OHM240 = 240
-        </enum>
-        <array> 2 2 4</array>
-        <writeable/>
-        <mssAccessorName>eff_dram_rtt_nom</mssAccessorName>
-    </attribute>
-
-
-    <attribute>
-        <id>ATTR_EFF_DRAM_RTT_WR</id>
-        <targetType>TARGET_TYPE_MCS</targetType>
-        <description>
-            DRAM Rtt_WR.
-            Used in various locations and comes from the MT keyword of the VPD
-        </description>
-        <initToZero></initToZero>
-        <valueType>uint8</valueType>
-        <enum>DISABLE = 0, OHM60 = 60, OHM120 = 120, OHM240 = 240, HIGHZ = 1</enum>
-        <array>2 2 4</array>
-        <writeable/>
-        <mssAccessorName>eff_dram_rtt_wr</mssAccessorName>
-    </attribute>
-
-    <attribute>
         <id>ATTR_VPD_GPO</id>
         <targetType>TARGET_TYPE_MCS</targetType>
         <description>