diff options
author | Shelton Leung <sleung@us.ibm.com> | 2016-12-20 16:58:35 -0600 |
---|---|---|
committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2017-01-03 14:00:37 -0500 |
commit | 5420a2c00b7ab7012fe2b4cbdb291f0336814942 (patch) | |
tree | 74be4ecfb1f1d50fe90fffc56408df852eab3e8c /src/import | |
parent | 5ca6435c1d24050f0f6b7d79e0aa983cb23509ad (diff) | |
download | talos-hostboot-5420a2c00b7ab7012fe2b4cbdb291f0336814942.tar.gz talos-hostboot-5420a2c00b7ab7012fe2b4cbdb291f0336814942.zip |
new temporary rdtag_dly values
Change-Id: I105cfba8694ed6dc289557e3c16a8c167be030a5
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34117
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: ANUWAT SAETOW <asaetow@us.ibm.com>
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34118
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import')
-rw-r--r-- | src/import/chips/p9/initfiles/p9.mca.scom.initfile | 51 | ||||
-rw-r--r-- | src/import/chips/p9/procedures/hwp/initfiles/p9_mca_scom.C | 57 |
2 files changed, 48 insertions, 60 deletions
diff --git a/src/import/chips/p9/initfiles/p9.mca.scom.initfile b/src/import/chips/p9/initfiles/p9.mca.scom.initfile index 189da87f1..cbcd70b4c 100644 --- a/src/import/chips/p9/initfiles/p9.mca.scom.initfile +++ b/src/import/chips/p9/initfiles/p9.mca.scom.initfile @@ -27,11 +27,6 @@ #--****************************************************************************** #-- FUTURE ENHANCEMENTS #--****************************************************************************** -# Enhancements to be done later: ATTR_EFF_RDTAG_DLY and ATTR_EFF_WRDATA_DLY attributes -# What needs to be done to support other DIMMs -# ATTR_EFF_RDTAG_DLY and ATTR_EFF_WRDATA_DLY attributes (better to calculate in code than init file) -# MBA_DSM0Q_CFG_RDTAG_DLY to use ATTR_EFF_RDTAG_DLY -# MBA_DSM0Q_CFG_WRDATA_DLY to use ATTR_EFF_WRDATA_DLY # ATTR_EFF_TCCD_S attribute (hardcoded to 4 for now) @@ -277,38 +272,34 @@ ispy MCP.PORT0.SRQ.MBA_TMR1Q_CFG_ACT_TO_DIFF_RANK_DLY [when=S] { # DSM0 SCOM REGISTER # # DRAM TIMING PARAMETERS # -# TODO ANDRE will make ATTR_EFF_RDTAG_DLY a precalculated attribute -# Can tie this off CL and frequency +# TODO RTC: 166455 NEED TO GET THE FORMULA FOR THIS - CURRENTLY GUESSES! ispy MCP.PORT0.SRQ.MBA_DSM0Q_CFG_RDTAG_DLY [when=S] { # ATTR_EFF_DIMM_TYPE: CDIMM = 0 RDIMM = 1 UDIMM = 2 LRDIMM = 3 spyv, expr; 17, def_IS_SIM; - 19, ((def_MEM_TYPE_1866_13==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==1)) && def_IS_HW; - 20, ((def_MEM_TYPE_1866_14==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==1)) && def_IS_HW; - 21, ((def_MEM_TYPE_2133_15==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==1)) && def_IS_HW; - 22, ((def_MEM_TYPE_2133_16==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==1)) && def_IS_HW; - 22, ((def_MEM_TYPE_2400_16==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==1)) && def_IS_HW; - 23, ((def_MEM_TYPE_2400_17==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==1)) && def_IS_HW; - 24, ((def_MEM_TYPE_2400_18==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==1)) && def_IS_HW; - 24, ((def_MEM_TYPE_2667_18==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==1)) && def_IS_HW; - 25, ((def_MEM_TYPE_2667_19==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==1)) && def_IS_HW; - 26, ((def_MEM_TYPE_2667_20==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==1)) && def_IS_HW; - - 21, ((def_MEM_TYPE_1866_13==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==3)) && def_IS_HW; - 22, ((def_MEM_TYPE_1866_14==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==3)) && def_IS_HW; - 23, ((def_MEM_TYPE_2133_15==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==3)) && def_IS_HW; - 24, ((def_MEM_TYPE_2133_16==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==3)) && def_IS_HW; - 24, ((def_MEM_TYPE_2400_16==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==3)) && def_IS_HW; - 25, ((def_MEM_TYPE_2400_17==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==3)) && def_IS_HW; - 26, ((def_MEM_TYPE_2400_18==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==3)) && def_IS_HW; + 22, ((def_MEM_TYPE_1866_13==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==1)) && def_IS_HW; + 22, ((def_MEM_TYPE_1866_14==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==1)) && def_IS_HW; + 26, ((def_MEM_TYPE_2133_15==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==1)) && def_IS_HW; + 26, ((def_MEM_TYPE_2133_16==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==1)) && def_IS_HW; + 26, ((def_MEM_TYPE_2400_16==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==1)) && def_IS_HW; + 26, ((def_MEM_TYPE_2400_17==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==1)) && def_IS_HW; + 26, ((def_MEM_TYPE_2400_18==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==1)) && def_IS_HW; + 26, ((def_MEM_TYPE_2667_18==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==1)) && def_IS_HW; + 28, ((def_MEM_TYPE_2667_19==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==1)) && def_IS_HW; + 28, ((def_MEM_TYPE_2667_20==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==1)) && def_IS_HW; + + 24, ((def_MEM_TYPE_1866_13==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==3)) && def_IS_HW; + 24, ((def_MEM_TYPE_1866_14==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==3)) && def_IS_HW; + 28, ((def_MEM_TYPE_2133_15==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==3)) && def_IS_HW; + 28, ((def_MEM_TYPE_2133_16==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==3)) && def_IS_HW; + 28, ((def_MEM_TYPE_2400_16==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==3)) && def_IS_HW; + 28, ((def_MEM_TYPE_2400_17==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==3)) && def_IS_HW; + 28, ((def_MEM_TYPE_2400_18==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==3)) && def_IS_HW; 26, ((def_MEM_TYPE_2667_18==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==3)) && def_IS_HW; - 27, ((def_MEM_TYPE_2667_19==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==3)) && def_IS_HW; - 28, ((def_MEM_TYPE_2667_20==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==3)) && def_IS_HW; + 30, ((def_MEM_TYPE_2667_19==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==3)) && def_IS_HW; + 30, ((def_MEM_TYPE_2667_20==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==3)) && def_IS_HW; } -# TODO ANDRE will make ATTR_EFF_WRDATA_DLY a precalculated attribute ispy MCP.PORT0.SRQ.MBA_DSM0Q_CFG_WRDATA_DLY [when=S] { -# spyv; -# 5; # TEMPORARY since right now we only support 16-16-16 2400 spyv, expr; 3, ((def_MSS_FREQ_EQ_1866==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==1)); 4, ((def_MSS_FREQ_EQ_2133==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==1)); diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_mca_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_mca_scom.C index 55df43a00..bc1d3b20b 100644 --- a/src/import/chips/p9/procedures/hwp/initfiles/p9_mca_scom.C +++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_mca_scom.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016 */ +/* Contributors Listed Below - COPYRIGHT 2016,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -40,24 +40,21 @@ constexpr uint64_t literal_0 = 0; constexpr uint64_t literal_2 = 2; constexpr uint64_t literal_13 = 13; constexpr uint64_t literal_1867 = 1867; -constexpr uint64_t literal_19 = 19; +constexpr uint64_t literal_22 = 22; constexpr uint64_t literal_14 = 14; -constexpr uint64_t literal_20 = 20; constexpr uint64_t literal_15 = 15; constexpr uint64_t literal_2134 = 2134; -constexpr uint64_t literal_21 = 21; +constexpr uint64_t literal_26 = 26; constexpr uint64_t literal_16 = 16; -constexpr uint64_t literal_22 = 22; constexpr uint64_t literal_2401 = 2401; -constexpr uint64_t literal_23 = 23; constexpr uint64_t literal_18 = 18; -constexpr uint64_t literal_24 = 24; constexpr uint64_t literal_2667 = 2667; -constexpr uint64_t literal_25 = 25; -constexpr uint64_t literal_26 = 26; -constexpr uint64_t literal_3 = 3; -constexpr uint64_t literal_27 = 27; +constexpr uint64_t literal_19 = 19; constexpr uint64_t literal_28 = 28; +constexpr uint64_t literal_20 = 20; +constexpr uint64_t literal_3 = 3; +constexpr uint64_t literal_24 = 24; +constexpr uint64_t literal_30 = 30; constexpr uint64_t literal_5 = 5; constexpr uint64_t literal_6 = 6; constexpr uint64_t literal_7 = 7; @@ -201,87 +198,87 @@ fapi2::ReturnCode p9_mca_scom(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& TGT0, else if ((((l_def_MEM_TYPE_1866_13 == literal_1) && (l_TGT2_ATTR_EFF_DIMM_TYPE[l_def_PORT_INDEX][literal_0] == literal_1)) && l_def_IS_HW)) { - l_scom_buffer.insert<36, 6, 58, uint64_t>(literal_19 ); + l_scom_buffer.insert<36, 6, 58, uint64_t>(literal_22 ); } else if ((((l_def_MEM_TYPE_1866_14 == literal_1) && (l_TGT2_ATTR_EFF_DIMM_TYPE[l_def_PORT_INDEX][literal_0] == literal_1)) && l_def_IS_HW)) { - l_scom_buffer.insert<36, 6, 58, uint64_t>(literal_20 ); + l_scom_buffer.insert<36, 6, 58, uint64_t>(literal_22 ); } else if ((((l_def_MEM_TYPE_2133_15 == literal_1) && (l_TGT2_ATTR_EFF_DIMM_TYPE[l_def_PORT_INDEX][literal_0] == literal_1)) && l_def_IS_HW)) { - l_scom_buffer.insert<36, 6, 58, uint64_t>(literal_21 ); + l_scom_buffer.insert<36, 6, 58, uint64_t>(literal_26 ); } else if ((((l_def_MEM_TYPE_2133_16 == literal_1) && (l_TGT2_ATTR_EFF_DIMM_TYPE[l_def_PORT_INDEX][literal_0] == literal_1)) && l_def_IS_HW)) { - l_scom_buffer.insert<36, 6, 58, uint64_t>(literal_22 ); + l_scom_buffer.insert<36, 6, 58, uint64_t>(literal_26 ); } else if ((((l_def_MEM_TYPE_2400_16 == literal_1) && (l_TGT2_ATTR_EFF_DIMM_TYPE[l_def_PORT_INDEX][literal_0] == literal_1)) && l_def_IS_HW)) { - l_scom_buffer.insert<36, 6, 58, uint64_t>(literal_22 ); + l_scom_buffer.insert<36, 6, 58, uint64_t>(literal_26 ); } else if ((((l_def_MEM_TYPE_2400_17 == literal_1) && (l_TGT2_ATTR_EFF_DIMM_TYPE[l_def_PORT_INDEX][literal_0] == literal_1)) && l_def_IS_HW)) { - l_scom_buffer.insert<36, 6, 58, uint64_t>(literal_23 ); + l_scom_buffer.insert<36, 6, 58, uint64_t>(literal_26 ); } else if ((((l_def_MEM_TYPE_2400_18 == literal_1) && (l_TGT2_ATTR_EFF_DIMM_TYPE[l_def_PORT_INDEX][literal_0] == literal_1)) && l_def_IS_HW)) { - l_scom_buffer.insert<36, 6, 58, uint64_t>(literal_24 ); + l_scom_buffer.insert<36, 6, 58, uint64_t>(literal_26 ); } else if ((((l_def_MEM_TYPE_2667_18 == literal_1) && (l_TGT2_ATTR_EFF_DIMM_TYPE[l_def_PORT_INDEX][literal_0] == literal_1)) && l_def_IS_HW)) { - l_scom_buffer.insert<36, 6, 58, uint64_t>(literal_24 ); + l_scom_buffer.insert<36, 6, 58, uint64_t>(literal_26 ); } else if ((((l_def_MEM_TYPE_2667_19 == literal_1) && (l_TGT2_ATTR_EFF_DIMM_TYPE[l_def_PORT_INDEX][literal_0] == literal_1)) && l_def_IS_HW)) { - l_scom_buffer.insert<36, 6, 58, uint64_t>(literal_25 ); + l_scom_buffer.insert<36, 6, 58, uint64_t>(literal_28 ); } else if ((((l_def_MEM_TYPE_2667_20 == literal_1) && (l_TGT2_ATTR_EFF_DIMM_TYPE[l_def_PORT_INDEX][literal_0] == literal_1)) && l_def_IS_HW)) { - l_scom_buffer.insert<36, 6, 58, uint64_t>(literal_26 ); + l_scom_buffer.insert<36, 6, 58, uint64_t>(literal_28 ); } else if ((((l_def_MEM_TYPE_1866_13 == literal_1) && (l_TGT2_ATTR_EFF_DIMM_TYPE[l_def_PORT_INDEX][literal_0] == literal_3)) && l_def_IS_HW)) { - l_scom_buffer.insert<36, 6, 58, uint64_t>(literal_21 ); + l_scom_buffer.insert<36, 6, 58, uint64_t>(literal_24 ); } else if ((((l_def_MEM_TYPE_1866_14 == literal_1) && (l_TGT2_ATTR_EFF_DIMM_TYPE[l_def_PORT_INDEX][literal_0] == literal_3)) && l_def_IS_HW)) { - l_scom_buffer.insert<36, 6, 58, uint64_t>(literal_22 ); + l_scom_buffer.insert<36, 6, 58, uint64_t>(literal_24 ); } else if ((((l_def_MEM_TYPE_2133_15 == literal_1) && (l_TGT2_ATTR_EFF_DIMM_TYPE[l_def_PORT_INDEX][literal_0] == literal_3)) && l_def_IS_HW)) { - l_scom_buffer.insert<36, 6, 58, uint64_t>(literal_23 ); + l_scom_buffer.insert<36, 6, 58, uint64_t>(literal_28 ); } else if ((((l_def_MEM_TYPE_2133_16 == literal_1) && (l_TGT2_ATTR_EFF_DIMM_TYPE[l_def_PORT_INDEX][literal_0] == literal_3)) && l_def_IS_HW)) { - l_scom_buffer.insert<36, 6, 58, uint64_t>(literal_24 ); + l_scom_buffer.insert<36, 6, 58, uint64_t>(literal_28 ); } else if ((((l_def_MEM_TYPE_2400_16 == literal_1) && (l_TGT2_ATTR_EFF_DIMM_TYPE[l_def_PORT_INDEX][literal_0] == literal_3)) && l_def_IS_HW)) { - l_scom_buffer.insert<36, 6, 58, uint64_t>(literal_24 ); + l_scom_buffer.insert<36, 6, 58, uint64_t>(literal_28 ); } else if ((((l_def_MEM_TYPE_2400_17 == literal_1) && (l_TGT2_ATTR_EFF_DIMM_TYPE[l_def_PORT_INDEX][literal_0] == literal_3)) && l_def_IS_HW)) { - l_scom_buffer.insert<36, 6, 58, uint64_t>(literal_25 ); + l_scom_buffer.insert<36, 6, 58, uint64_t>(literal_28 ); } else if ((((l_def_MEM_TYPE_2400_18 == literal_1) && (l_TGT2_ATTR_EFF_DIMM_TYPE[l_def_PORT_INDEX][literal_0] == literal_3)) && l_def_IS_HW)) { - l_scom_buffer.insert<36, 6, 58, uint64_t>(literal_26 ); + l_scom_buffer.insert<36, 6, 58, uint64_t>(literal_28 ); } else if ((((l_def_MEM_TYPE_2667_18 == literal_1) && (l_TGT2_ATTR_EFF_DIMM_TYPE[l_def_PORT_INDEX][literal_0] == literal_3)) && l_def_IS_HW)) @@ -291,12 +288,12 @@ fapi2::ReturnCode p9_mca_scom(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& TGT0, else if ((((l_def_MEM_TYPE_2667_19 == literal_1) && (l_TGT2_ATTR_EFF_DIMM_TYPE[l_def_PORT_INDEX][literal_0] == literal_3)) && l_def_IS_HW)) { - l_scom_buffer.insert<36, 6, 58, uint64_t>(literal_27 ); + l_scom_buffer.insert<36, 6, 58, uint64_t>(literal_30 ); } else if ((((l_def_MEM_TYPE_2667_20 == literal_1) && (l_TGT2_ATTR_EFF_DIMM_TYPE[l_def_PORT_INDEX][literal_0] == literal_3)) && l_def_IS_HW)) { - l_scom_buffer.insert<36, 6, 58, uint64_t>(literal_28 ); + l_scom_buffer.insert<36, 6, 58, uint64_t>(literal_30 ); } if (((l_def_MSS_FREQ_EQ_1866 == literal_1) && (l_TGT2_ATTR_EFF_DIMM_TYPE[l_def_PORT_INDEX][literal_0] == literal_1))) |